blob: 5f266d5ec80c30d0180e09d7400c786a9d5e2294 [file] [log] [blame]
Gireesh Hiremathc900eb12021-06-11 16:13:48 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * (C) Copyright 2011
4 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * (C) Copyright 2018 Robert Bosch Power Tools GmbH.
6 *
7 * A bootcount driver for the RTC IP block found on many TI platforms.
8 * This requires the RTC clocks, etc, to be enabled prior to use and
9 * not all boards with this IP block on it will have the RTC in use.
10 */
11
12#include <bootcount.h>
13#include <asm/davinci_rtc.h>
14
15#define BC_VERSION 2
16
17void bootcount_store(ulong bootcount)
18{
19 u8 upgrade_available = 0;
20 ulong val = 0;
21 struct davinci_rtc *reg =
22 (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
23
24 val = raw_bootcount_load(&reg->scratch2);
25 upgrade_available = (val >> 8) & 0x000000ff;
26
27 /* Only update bootcount during upgrade process */
28 if (!upgrade_available)
29 bootcount = 0;
30
31 val = (bootcount & 0x000000ff) |
32 (upgrade_available << 8) |
33 (BC_VERSION << 16) |
34 (CONFIG_SYS_BOOTCOUNT_MAGIC << 24);
35
36 /*
37 * write RTC kick registers to enable write
38 * for RTC Scratch registers. Scratch register 2 is
39 * used for bootcount value.
40 */
41 writel(RTC_KICK0R_WE, &reg->kick0r);
42 writel(RTC_KICK1R_WE, &reg->kick1r);
43 raw_bootcount_store(&reg->scratch2, val);
44}
45
46ulong bootcount_load(void)
47{
48 unsigned long val = 0;
49 struct davinci_rtc *reg =
50 (struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
51
52 val = raw_bootcount_load(&reg->scratch2);
53 if ((val >> 24) != CONFIG_SYS_BOOTCOUNT_MAGIC)
54 return 0;
55 else
56 return val & 0x000000ff;
57}