commit c900eb11e8b23305d13976a54d8f7579000aa223
author Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com> Fri Jun 11 16:13:48 2021 +0000
committer Lokesh Vutla <lokeshvutla@ti.com> Thu Jul 15 17:56:03 2021 +0530
tree 00f9715250a7e32103cfa4f1666ac9506edd7443
parent 6b755fa5828b25d7362eb8ffd61f8cd947c2049f

am335x, guardian: software update available status is stored in AM3352 RTC scracth register

RTC second scratch register[32-bit]:
  -zero byte hold boot count value
  -first byte hold update available state
  -second byte hold version
  -third byte hold magic number

Signed-off-by: Gireesh Hiremath <Gireesh.Hiremath@in.bosch.com>

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Link: https://lore.kernel.org/r/20210611161350.2141-17-Gireesh.Hiremath@in.bosch.com
Gbp-Pq: Topic apertis/guardian
Gbp-Pq: Name am335x-guardian-software-update-available-status-is-store.patch

drivers/bootcount/bootcount_nvmem.c

diff --git a/drivers/bootcount/bootcount_nvmem.c b/drivers/bootcount/bootcount_nvmem.c
new file mode 100644
index 0000000..5f266d5
--- /dev/null
+++ b/drivers/bootcount/bootcount_nvmem.c
@@ -0,0 +1,57 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * (C) Copyright 2011
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ * (C) Copyright 2018 Robert Bosch Power Tools GmbH.
+ *
+ * A bootcount driver for the RTC IP block found on many TI platforms.
+ * This requires the RTC clocks, etc, to be enabled prior to use and
+ * not all boards with this IP block on it will have the RTC in use.
+ */
+
+#include <bootcount.h>
+#include <asm/davinci_rtc.h>
+
+#define	BC_VERSION	2
+
+void bootcount_store(ulong bootcount)
+{
+	u8 upgrade_available = 0;
+	ulong val = 0;
+	struct davinci_rtc *reg =
+		(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+	val = raw_bootcount_load(&reg->scratch2);
+	upgrade_available = (val >> 8) & 0x000000ff;
+
+	/* Only update bootcount during upgrade process */
+	if (!upgrade_available)
+		bootcount = 0;
+
+	val = (bootcount & 0x000000ff) |
+	      (upgrade_available << 8) |
+	      (BC_VERSION << 16) |
+	      (CONFIG_SYS_BOOTCOUNT_MAGIC << 24);
+
+	/*
+	 * write RTC kick registers to enable write
+	 * for RTC Scratch registers. Scratch register 2 is
+	 * used for bootcount value.
+	 */
+	writel(RTC_KICK0R_WE, &reg->kick0r);
+	writel(RTC_KICK1R_WE, &reg->kick1r);
+	raw_bootcount_store(&reg->scratch2, val);
+}
+
+ulong bootcount_load(void)
+{
+	unsigned long val = 0;
+	struct davinci_rtc *reg =
+		(struct davinci_rtc *)CONFIG_SYS_BOOTCOUNT_ADDR;
+
+	val = raw_bootcount_load(&reg->scratch2);
+	if ((val >> 24) != CONFIG_SYS_BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return val & 0x000000ff;
+}