blob: 4391a8cbc82407400215695d9187c0c74b11cd97 [file] [log] [blame]
Ian Campbell6efe3692014-05-05 11:52:26 +01001/*
2 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
3 *
4 * (C) Copyright 2007-2011
5 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
6 * Tom Cubie <tangliang@allwinnertech.com>
7 *
8 * Configuration settings for the Allwinner sunxi series of boards.
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef _SUNXI_COMMON_CONFIG_H
14#define _SUNXI_COMMON_CONFIG_H
15
Hans de Goede22a1a532015-09-13 17:29:33 +020016#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020017#include <linux/stringify.h>
18
Siarhei Siamashka15aca902015-02-21 07:34:09 +020019#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
20/*
21 * The U-Boot workarounds bugs in the outdated buggy sunxi-3.4 kernels at the
22 * expense of restricting some features, so the regular machine id values can
23 * be used.
24 */
25# define CONFIG_MACH_TYPE_COMPAT_REV 0
26#else
27/*
28 * A compatibility guard to prevent loading outdated buggy sunxi-3.4 kernels.
29 * Only sunxi-3.4 kernels with appropriate fixes applied are able to pass
30 * beyond the machine id check.
31 */
32# define CONFIG_MACH_TYPE_COMPAT_REV 1
33#endif
34
Andre Przywarad8362162017-04-26 01:32:48 +010035#ifdef CONFIG_ARM64
36#define CONFIG_BUILD_TARGET "u-boot.itb"
37#endif
38
Ian Campbell6efe3692014-05-05 11:52:26 +010039/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010040#define CONFIG_SYS_NS16550_SERIAL
41/* ns16550 reg in the low bits of cpu reg */
Ian Campbell6efe3692014-05-05 11:52:26 +010042#define CONFIG_SYS_NS16550_CLK 24000000
Thomas Chou00ad1f02015-11-19 21:48:13 +080043#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060044# define CONFIG_SYS_NS16550_REG_SIZE -4
45# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
46# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
47# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
48# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
49# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
50#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010051
Paul Kocialkowskide05f942015-05-16 19:52:11 +020052/* CPU */
Andre Przywara70c78932017-02-16 01:20:19 +000053#define COUNTER_FREQUENCY 24000000
Paul Kocialkowskide05f942015-05-16 19:52:11 +020054
Hans de Goeded241ecf2015-05-19 22:12:31 +020055/*
56 * The DRAM Base differs between some models. We cannot use macros for the
57 * CONFIG_FOO defines which contain the DRAM base address since they end
58 * up unexpanded in include/autoconf.mk .
59 *
60 * So we have to have this #ifdef #else #endif block for these.
61 */
62#ifdef CONFIG_MACH_SUN9I
63#define SDRAM_OFFSET(x) 0x2##x
64#define CONFIG_SYS_SDRAM_BASE 0x20000000
65#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* default load address */
66#define CONFIG_SYS_TEXT_BASE 0x2a000000
Hans de Goede66ab79d2015-09-13 13:02:48 +020067/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
68 * since it needs to fit in with the other values. By also #defining it
69 * we get warnings if the Kconfig value mismatches. */
70#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
Hans de Goeded241ecf2015-05-19 22:12:31 +020071#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
72#else
73#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010074#define CONFIG_SYS_SDRAM_BASE 0x40000000
Hans de Goeded241ecf2015-05-19 22:12:31 +020075#define CONFIG_SYS_LOAD_ADDR 0x42000000 /* default load address */
Icenowy Zheng52e61882017-04-08 15:30:12 +080076/* V3s do not have enough memory to place code at 0x4a000000 */
77#ifndef CONFIG_MACH_SUN8I_V3S
Hans de Goeded241ecf2015-05-19 22:12:31 +020078#define CONFIG_SYS_TEXT_BASE 0x4a000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080079#else
80#define CONFIG_SYS_TEXT_BASE 0x42e00000
81#endif
Hans de Goede66ab79d2015-09-13 13:02:48 +020082/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
83 * since it needs to fit in with the other values. By also #defining it
84 * we get warnings if the Kconfig value mismatches. */
85#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
Hans de Goeded241ecf2015-05-19 22:12:31 +020086#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
87#endif
88
89#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goeded241ecf2015-05-19 22:12:31 +020090
Andre Przywarade454ec2017-02-16 01:20:23 +000091#ifdef CONFIG_SUNXI_HIGH_SRAM
Hans de Goede0b95a282015-05-20 15:27:16 +020092/*
93 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
94 * slightly bigger. Note that it is possible to map the first 32 KiB of the
95 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
96 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
97 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
98 */
99#define CONFIG_SYS_INIT_RAM_ADDR 0x10000
Andre Przywarae0e28ee2016-09-05 01:32:38 +0100100#define CONFIG_SYS_INIT_RAM_SIZE 0x08000 /* FIXME: 40 KiB ? */
Hans de Goede0b95a282015-05-20 15:27:16 +0200101#else
Ian Campbell6efe3692014-05-05 11:52:26 +0100102#define CONFIG_SYS_INIT_RAM_ADDR 0x0
103#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Hans de Goede0b95a282015-05-20 15:27:16 +0200104#endif
Ian Campbell6efe3692014-05-05 11:52:26 +0100105
106#define CONFIG_SYS_INIT_SP_OFFSET \
107 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
108#define CONFIG_SYS_INIT_SP_ADDR \
109 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
110
111#define CONFIG_NR_DRAM_BANKS 1
112#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
113#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
114
Ian Campbella2ebf922014-07-18 20:38:41 +0100115#ifdef CONFIG_AHCI
116#define CONFIG_LIBATA
117#define CONFIG_SCSI_AHCI
118#define CONFIG_SCSI_AHCI_PLAT
119#define CONFIG_SUNXI_AHCI
Bernhard Nortmannb4946db2015-06-10 10:51:40 +0200120#define CONFIG_SYS_64BIT_LBA
Ian Campbella2ebf922014-07-18 20:38:41 +0100121#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
122#define CONFIG_SYS_SCSI_MAX_LUN 1
123#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
124 CONFIG_SYS_SCSI_MAX_LUN)
Ian Campbella2ebf922014-07-18 20:38:41 +0100125#endif
126
Ian Campbell6efe3692014-05-05 11:52:26 +0100127#define CONFIG_SETUP_MEMORY_TAGS
128#define CONFIG_CMDLINE_TAG
129#define CONFIG_INITRD_TAG
Paul Kocialkowski99ae0f62015-03-28 18:35:36 +0100130#define CONFIG_SERIAL_TAG
Ian Campbell6efe3692014-05-05 11:52:26 +0100131
Hans de Goede3ce35f92015-08-16 14:48:22 +0200132#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +0200133#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +0200134#define CONFIG_SYS_NAND_ONFI_DETECTION
135#define CONFIG_SYS_MAX_NAND_DEVICE 8
Hans de Goedefd42c052017-02-27 18:22:10 +0100136
137#define CONFIG_MTD_DEVICE
138#define CONFIG_MTD_PARTITIONS
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +0200139#endif
140
Siarhei Siamashka6f3ea202016-06-07 14:28:34 +0300141#ifdef CONFIG_SPL_SPI_SUNXI
Siarhei Siamashka6f3ea202016-06-07 14:28:34 +0300142#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x8000
143#endif
144
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100145/* mmc config */
Maxime Riparde0c7aa42015-10-15 22:04:07 +0200146#ifdef CONFIG_MMC
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100147#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +0100148#endif
149
150#if defined(CONFIG_ENV_IS_IN_MMC)
Maxime Ripard65cefba2017-08-23 10:12:22 +0200151#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
152/* If we have two devices (most likely eMMC + MMC), favour the eMMC */
153#define CONFIG_SYS_MMC_ENV_DEV 1
154#else
155/* Otherwise, use the only device we have */
156#define CONFIG_SYS_MMC_ENV_DEV 0
157#endif
Emmanuel Vadot63b45782016-11-05 20:51:11 +0100158#define CONFIG_SYS_MMC_MAX_DEVICE 4
Maxime Ripard435f1182017-03-20 15:57:22 +0100159#elif defined(CONFIG_ENV_IS_NOWHERE)
160#define CONFIG_ENV_SIZE (128 << 10)
Chen-Yu Tsaid4ea92b2014-10-22 16:47:42 +0800161#endif
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100162
Icenowy Zheng52e61882017-04-08 15:30:12 +0800163#ifndef CONFIG_MACH_SUN8I_V3S
Hans de Goede9f7dc802015-09-13 17:16:54 +0200164/* 64MB of malloc() pool */
165#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (64 << 20))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800166#else
167/* 2MB of malloc() pool */
168#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (2 << 20))
169#endif
Ian Campbell6efe3692014-05-05 11:52:26 +0100170
171/*
172 * Miscellaneous configurable options
173 */
Ian Campbell428734e2014-10-07 14:20:30 +0100174#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
175#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbell6efe3692014-05-05 11:52:26 +0100176
Ian Campbell6efe3692014-05-05 11:52:26 +0100177/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +0200178#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +0100179
Ian Campbell6efe3692014-05-05 11:52:26 +0100180/* FLASH and environment organization */
181
Boris Brezillon8646f2a2015-07-27 16:21:26 +0200182#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +0100183
Ian Campbell6efe3692014-05-05 11:52:26 +0100184#define CONFIG_SPL_FRAMEWORK
Ian Campbell6efe3692014-05-05 11:52:26 +0100185
Andre Przywaraa563adc2017-01-02 11:48:45 +0000186#ifndef CONFIG_ARM64 /* AArch64 FEL support is not ready yet */
Simon Glass5debe1f2015-02-07 10:47:30 -0700187#define CONFIG_SPL_BOARD_LOAD_IMAGE
Andre Przywaraa563adc2017-01-02 11:48:45 +0000188#endif
Simon Glass5debe1f2015-02-07 10:47:30 -0700189
Andre Przywarade454ec2017-02-16 01:20:23 +0000190#ifdef CONFIG_SUNXI_HIGH_SRAM
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100191#define CONFIG_SPL_TEXT_BASE 0x10060 /* sram start+header */
192#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywaracced7482017-04-26 01:32:42 +0100193#ifdef CONFIG_ARM64
194/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
195#define LOW_LEVEL_SRAM_STACK 0x00054000
196#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000197#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100198#endif /* !CONFIG_ARM64 */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200199#else
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100200#define CONFIG_SPL_TEXT_BASE 0x60 /* sram start+header */
201#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarade454ec2017-02-16 01:20:23 +0000202#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200203#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100204
Andre Przywarade454ec2017-02-16 01:20:23 +0000205#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
206
Ian Campbell140d8322014-05-05 11:52:30 +0100207#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
208
Ian Campbell6efe3692014-05-05 11:52:26 +0100209
Hans de Goede3352b222014-06-13 22:55:49 +0200210/* I2C */
Jelle van der Waa3f3a3092016-02-23 18:47:19 +0100211#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
212 defined CONFIG_SY8106A_POWER
Hans de Goede606fa4a2015-01-23 15:28:22 +0100213#endif
214
Paul Kocialkowski0a3ec0a2015-04-10 23:09:52 +0200215#if defined CONFIG_I2C0_ENABLE || defined CONFIG_I2C1_ENABLE || \
216 defined CONFIG_I2C2_ENABLE || defined CONFIG_I2C3_ENABLE || \
Jelle van der Waa8d3d7c12016-01-14 14:06:26 +0100217 defined CONFIG_I2C4_ENABLE || defined CONFIG_R_I2C_ENABLE
Hans de Goede3352b222014-06-13 22:55:49 +0200218#define CONFIG_SYS_I2C_MVTWSI
Jernej Skrabec9220d502017-04-27 00:03:36 +0200219#ifndef CONFIG_DM_I2C
220#define CONFIG_SYS_I2C
Hans de Goede3352b222014-06-13 22:55:49 +0200221#define CONFIG_SYS_I2C_SPEED 400000
222#define CONFIG_SYS_I2C_SLAVE 0x7f
Hans de Goede6ef998d2015-04-23 17:47:22 +0200223#endif
Jernej Skrabec9220d502017-04-27 00:03:36 +0200224#endif
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100225
226#if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD)
227#define CONFIG_SYS_I2C_SOFT
228#define CONFIG_SYS_I2C_SOFT_SPEED 50000
229#define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100230/* We use pin names in Kconfig and sunxi_name_to_gpio() */
231#define CONFIG_SOFT_I2C_GPIO_SDA soft_i2c_gpio_sda
232#define CONFIG_SOFT_I2C_GPIO_SCL soft_i2c_gpio_scl
233#ifndef __ASSEMBLY__
234extern int soft_i2c_gpio_sda;
235extern int soft_i2c_gpio_scl;
236#endif
Hans de Goede6de9f762015-03-07 12:00:02 +0100237#define CONFIG_VIDEO_LCD_I2C_BUS 0 /* The lcd panel soft i2c is bus 0 */
238#define CONFIG_SYS_SPD_BUS_NUM 1 /* And the axp209 i2c bus is bus 1 */
239#else
240#define CONFIG_SYS_SPD_BUS_NUM 0 /* The axp209 i2c bus is bus 0 */
241#define CONFIG_VIDEO_LCD_I2C_BUS -1 /* NA, but necessary to compile */
Hans de Goedea5b4cfe2015-02-16 17:23:25 +0100242#endif
243
Henrik Nordstromaa382ad2014-06-13 22:55:50 +0200244/* PMU */
vishnupatekar1895dfd2015-11-29 01:07:22 +0800245#if defined CONFIG_AXP152_POWER || defined CONFIG_AXP209_POWER || \
Jelle van der Waa3f3a3092016-02-23 18:47:19 +0100246 defined CONFIG_AXP221_POWER || defined CONFIG_AXP818_POWER || \
247 defined CONFIG_SY8106A_POWER
Henrik Nordstromaa382ad2014-06-13 22:55:50 +0200248#endif
249
Hans de Goedec7ab3f52015-08-01 14:44:29 +0200250#ifdef CONFIG_REQUIRE_SERIAL_CONSOLE
Hans de Goede2ab05fe2015-02-20 16:55:12 +0100251#if CONFIG_CONS_INDEX == 1
252#ifdef CONFIG_MACH_SUN9I
253#define OF_STDOUT_PATH "/soc/serial@07000000:115200"
254#else
255#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28000:115200"
256#endif
257#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
258#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
Laurent Itti20dfe002015-05-05 17:02:00 -0700259#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
260#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
Hans de Goede2ab05fe2015-02-20 16:55:12 +0100261#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
262#define OF_STDOUT_PATH "/soc@01c00000/serial@01f02800:115200"
263#else
264#error Unsupported console port nr. Please fix stdout-path in sunxi-common.h.
265#endif
Hans de Goedec7ab3f52015-08-01 14:44:29 +0200266#endif /* ifdef CONFIG_REQUIRE_SERIAL_CONSOLE */
Hans de Goede2ab05fe2015-02-20 16:55:12 +0100267
Ian Campbellaf471472014-06-05 19:00:15 +0100268/* GPIO */
269#define CONFIG_SUNXI_GPIO
Ian Campbellaf471472014-06-05 19:00:15 +0100270
Icenowy Zheng1fa956f2017-10-26 11:14:44 +0800271#ifdef CONFIG_VIDEO_SUNXI
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200272/*
Hans de Goede6c912862015-02-02 17:13:29 +0100273 * The amount of RAM to keep free at the top of RAM when relocating u-boot,
274 * to use as framebuffer. This must be a multiple of 4096.
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200275 */
Hans de Goede9f7dc802015-09-13 17:16:54 +0200276#define CONFIG_SUNXI_MAX_FB_SIZE (16 << 20)
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200277
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200278#define CONFIG_VIDEO_LOGO
Hans de Goedeccb0ed52014-12-19 13:46:33 +0100279#define CONFIG_VIDEO_STD_TIMINGS
Hans de Goedea5aa95f2014-12-19 16:05:12 +0100280#define CONFIG_I2C_EDID
Hans de Goeded955f442015-08-05 00:06:47 +0200281#define VIDEO_LINE_LEN (pGD->plnSizeX)
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200282
283/* allow both serial and cfb console. */
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200284/* stop x86 thinking in cfbconsole from trying to init a pc keyboard */
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200285
Icenowy Zheng1fa956f2017-10-26 11:14:44 +0800286#endif /* CONFIG_VIDEO_SUNXI */
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200287
Hans de Goede73d7d422014-06-09 11:37:00 +0200288/* Ethernet support */
Artturi Almf523a5c2017-11-08 05:08:57 +0200289#ifdef CONFIG_SUN4I_EMAC
Hans de Goede81174e12015-04-16 21:47:06 +0200290#define CONFIG_PHY_ADDR 1
Hans de Goede73d7d422014-06-09 11:37:00 +0200291#define CONFIG_MII /* MII PHY management */
292#endif
293
Dave Pruedc1436c2017-08-31 19:21:01 +0200294#ifdef CONFIG_SUN7I_GMAC
Ian Campbellba8311f2014-05-05 11:52:28 +0100295#define CONFIG_PHY_ADDR 1
296#define CONFIG_MII /* MII PHY management */
Hans de Goede6e16a932016-03-16 13:46:22 +0100297#define CONFIG_PHY_REALTEK
Ian Campbellba8311f2014-05-05 11:52:28 +0100298#endif
299
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200300#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede804fa572015-05-10 14:10:27 +0200301#define CONFIG_USB_OHCI_NEW
302#define CONFIG_USB_OHCI_SUNXI
303#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goedef494cad2015-01-11 17:17:00 +0100304#endif
305
306#ifdef CONFIG_USB_MUSB_SUNXI
Paul Kocialkowskif34dfcb2015-08-04 17:04:06 +0200307#define CONFIG_USB_MUSB_PIO_ONLY
Hans de Goedef494cad2015-01-11 17:17:00 +0100308#endif
309
Paul Kocialkowskia5310eb2015-08-04 17:04:11 +0200310#ifdef CONFIG_USB_MUSB_GADGET
Sam Protsenko4d2439d2016-04-13 14:20:26 +0300311#define CONFIG_USB_FUNCTION_MASS_STORAGE
Paul Kocialkowskia5310eb2015-08-04 17:04:11 +0200312#endif
313
Paul Kocialkowskia5310eb2015-08-04 17:04:11 +0200314#ifdef CONFIG_USB_FUNCTION_MASS_STORAGE
Paul Kocialkowskia5310eb2015-08-04 17:04:11 +0200315#endif
316
Hans de Goede16030822014-09-18 21:03:34 +0200317#ifdef CONFIG_USB_KEYBOARD
Hans de Goede16030822014-09-18 21:03:34 +0200318#define CONFIG_PREBOOT
Hans de Goede16030822014-09-18 21:03:34 +0200319#endif
320
Jonathan Liuabc1aae2014-06-14 08:59:09 +0200321#define CONFIG_MISC_INIT_R
322
Ian Campbell6efe3692014-05-05 11:52:26 +0100323#ifndef CONFIG_SPL_BUILD
324#include <config_distro_defaults.h>
Hans de Goede6f2da072014-07-31 23:04:45 +0200325
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100326#ifdef CONFIG_ARM64
327/*
328 * Boards seem to come with at least 512MB of DRAM.
329 * The kernel should go at 512K, which is the default text offset (that will
330 * be adjusted at runtime if needed).
331 * There is no compression for arm64 kernels (yet), so leave some space
332 * for really big kernels, say 256MB for now.
333 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
334 * Align the initrd to a 2MB page.
335 */
Icenowy Zheng52e61882017-04-08 15:30:12 +0800336#define BOOTM_SIZE __stringify(0xa000000)
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100337#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
338#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
339#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
340#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
341#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
342
343#else
Hans de Goede3400a7c2014-12-24 16:08:30 +0100344/*
Hans de Goede9f7dc802015-09-13 17:16:54 +0200345 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100346 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
347 * 1M script, 1M pxe and the ramdisk at the end.
348 */
Icenowy Zheng52e61882017-04-08 15:30:12 +0800349#ifndef CONFIG_MACH_SUN8I_V3S
350#define BOOTM_SIZE __stringify(0xa000000)
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200351#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
352#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
353#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
354#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
355#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3300000))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800356#else
357/*
358 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
359 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
360 * 1M script, 1M pxe and the ramdisk at the end.
361 */
362#define BOOTM_SIZE __stringify(0x2e00000)
363#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
364#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
365#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
366#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
367#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
368#endif
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100369#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200370
Hans de Goede2f60c312014-08-01 09:37:58 +0200371#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800372 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200373 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
374 "fdt_addr_r=" FDT_ADDR_R "\0" \
375 "scriptaddr=" SCRIPT_ADDR_R "\0" \
376 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
377 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
378
379#define DFU_ALT_INFO_RAM \
380 "dfu_alt_info_ram=" \
381 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
382 "fdt ram " FDT_ADDR_R " 0x100000;" \
383 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200384
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800385#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100386#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200387#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
388 BOOTENV_DEV_MMC(MMC, mmc, 0) \
389 BOOTENV_DEV_MMC(MMC, mmc, 1) \
390 "bootcmd_mmc_auto=" \
391 "if test ${mmc_bootdev} -eq 1; then " \
392 "run bootcmd_mmc1; " \
393 "run bootcmd_mmc0; " \
394 "elif test ${mmc_bootdev} -eq 0; then " \
395 "run bootcmd_mmc0; " \
396 "run bootcmd_mmc1; " \
397 "fi\0"
398
399#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
400 "mmc_auto "
401
402#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100403#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200404#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100405#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800406#else
407#define BOOT_TARGET_DEVICES_MMC(func)
408#endif
409
Hans de Goede6f2da072014-07-31 23:04:45 +0200410#ifdef CONFIG_AHCI
411#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
412#else
413#define BOOT_TARGET_DEVICES_SCSI(func)
414#endif
415
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200416#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800417#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
418#else
419#define BOOT_TARGET_DEVICES_USB(func)
420#endif
421
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200422/* FEL boot support, auto-execute boot.scr if a script address was provided */
423#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
424 "bootcmd_fel=" \
425 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
426 "echo '(FEL boot)'; " \
427 "source ${fel_scriptaddr}; " \
428 "fi\0"
429#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
430 "fel "
431
Hans de Goede6f2da072014-07-31 23:04:45 +0200432#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200433 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800434 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200435 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800436 BOOT_TARGET_DEVICES_USB(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200437 func(PXE, pxe, na) \
438 func(DHCP, dhcp, na)
439
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100440#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
441#define BOOTCMD_SUNXI_COMPAT \
442 "bootcmd_sunxi_compat=" \
443 "setenv root /dev/mmcblk0p3 rootwait; " \
444 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
445 "echo Loaded environment from uEnv.txt; " \
446 "env import -t 0x44000000 ${filesize}; " \
447 "fi; " \
448 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
449 "ext2load mmc 0 0x43000000 script.bin && " \
450 "ext2load mmc 0 0x48000000 uImage && " \
451 "bootm 0x48000000\0"
452#else
453#define BOOTCMD_SUNXI_COMPAT
454#endif
455
Hans de Goede6f2da072014-07-31 23:04:45 +0200456#include <config_distro_bootcmd.h>
457
Hans de Goede16030822014-09-18 21:03:34 +0200458#ifdef CONFIG_USB_KEYBOARD
459#define CONSOLE_STDIN_SETTINGS \
460 "preboot=usb start\0" \
461 "stdin=serial,usbkbd\0"
462#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200463#define CONSOLE_STDIN_SETTINGS \
464 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200465#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200466
467#ifdef CONFIG_VIDEO
468#define CONSOLE_STDOUT_SETTINGS \
469 "stdout=serial,vga\0" \
470 "stderr=serial,vga\0"
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200471#elif CONFIG_DM_VIDEO
472#define CONFIG_SYS_WHITE_ON_BLACK
473#define CONSOLE_STDOUT_SETTINGS \
474 "stdout=serial,vidconsole\0" \
475 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200476#else
477#define CONSOLE_STDOUT_SETTINGS \
478 "stdout=serial\0" \
479 "stderr=serial\0"
480#endif
481
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100482#ifdef CONFIG_MTDIDS_DEFAULT
483#define SUNXI_MTDIDS_DEFAULT \
484 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
485#else
486#define SUNXI_MTDIDS_DEFAULT
487#endif
488
489#ifdef CONFIG_MTDPARTS_DEFAULT
490#define SUNXI_MTDPARTS_DEFAULT \
491 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
492#else
493#define SUNXI_MTDPARTS_DEFAULT
494#endif
495
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200496#define CONSOLE_ENV_SETTINGS \
497 CONSOLE_STDIN_SETTINGS \
498 CONSOLE_STDOUT_SETTINGS
499
Andreas Färber26f00d22017-04-14 18:44:47 +0200500#ifdef CONFIG_ARM64
501#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
502#else
503#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
504#endif
505
Hans de Goede6f2da072014-07-31 23:04:45 +0200506#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200507 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200508 MEM_LAYOUT_ENV_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200509 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200510 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200511 "console=ttyS0,115200\0" \
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100512 SUNXI_MTDIDS_DEFAULT \
513 SUNXI_MTDPARTS_DEFAULT \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100514 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200515 BOOTENV
516
517#else /* ifndef CONFIG_SPL_BUILD */
518#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbell6efe3692014-05-05 11:52:26 +0100519#endif
520
521#endif /* _SUNXI_COMMON_CONFIG_H */