blob: b19b8a5a26ea286ca28e98dcb2ff4f3fca0ebd77 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +02002/*
3 * (C) Copyright 2003
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +02005 */
6
7/*
8 * This file contains the configuration parameters for qemu-mips64 target.
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020014#define CONFIG_QEMU_MIPS
Daniel Schwierzeckac25adf2014-11-15 23:30:01 +010015
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020016#define CONFIG_TIMESTAMP /* Print image info with timestamp */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020017
18#define CONFIG_EXTRA_ENV_SETTINGS \
19 "addmisc=setenv bootargs ${bootargs} " \
20 "console=ttyS0,${baudrate} " \
21 "panic=1\0" \
22 "bootfile=/tftpboot/vmlinux\0" \
23 "load=tftp ffffffff80500000 ${u-boot}\0" \
24 ""
25
26#define CONFIG_BOOTCOMMAND "bootp;bootelf"
27
28/*
29 * BOOTP options
30 */
31#define CONFIG_BOOTP_BOOTFILESIZE
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020032
33/*
34 * Command line configuration.
35 */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020036
37#define CONFIG_DRIVER_NE2000
38#define CONFIG_DRIVER_NE2000_BASE 0xffffffffb4000300
39
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020040#define CONFIG_SYS_NS16550_SERIAL
41#define CONFIG_SYS_NS16550_REG_SIZE 1
42#define CONFIG_SYS_NS16550_CLK 115200
43#define CONFIG_SYS_NS16550_COM1 0xffffffffb40003f8
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020044
Stanislav Galabov19030fd2016-02-17 15:23:30 +020045#ifdef CONFIG_SYS_BIG_ENDIAN
46#define CONFIG_IDE_SWAP_IO
47#endif
48
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020049#define CONFIG_SYS_IDE_MAXBUS 2
50#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
51#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
52#define CONFIG_SYS_ATA_DATA_OFFSET 0
53#define CONFIG_SYS_ATA_REG_OFFSET 0
54#define CONFIG_SYS_ATA_BASE_ADDR 0xffffffffb4000000
55
56#define CONFIG_SYS_IDE_MAXDEVICE 4
57
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020058/*
59 * Miscellaneous configurable options
60 */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020061
Kyle Edwards27e5e132017-04-12 22:42:32 -040062#define CONFIG_SYS_MALLOC_LEN (256 << 10)
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020063
64#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
65
66#define CONFIG_SYS_MHZ 132
67
68#define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000)
69
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020070/* Cached addr */
71#define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000
72
73/* default load address */
74#define CONFIG_SYS_LOAD_ADDR 0xffffffff81000000
75
76#define CONFIG_SYS_MEMTEST_START 0xffffffff80100000
77#define CONFIG_SYS_MEMTEST_END 0xffffffff80800000
78
79/*-----------------------------------------------------------------------
80 * FLASH and environment organization
81 */
82/* The following #defines are needed to get flash environment right */
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020083#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020084
85#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
86
87/* We boot from this flash, selected with dip switch */
88#define CONFIG_SYS_FLASH_BASE 0xffffffffbfc00000
89#define CONFIG_SYS_MAX_FLASH_BANKS 1
90#define CONFIG_SYS_MAX_FLASH_SECT 128
91#define CONFIG_SYS_FLASH_CFI
92#define CONFIG_FLASH_CFI_DRIVER
93#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
94
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020095/* Address and size of Primary Environment Sector */
96#define CONFIG_ENV_SIZE 0x8000
Kyle Edwards07531c12017-04-12 22:42:31 -040097#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE)
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +020098
99#define CONFIG_ENV_OVERWRITE 1
100
101#define MEM_SIZE 128
102
Zhi-zhou Zhange0d6df52012-10-16 15:02:08 +0200103#endif /* __CONFIG_H */