blob: b010a6300cbf81964feae7596edab5363a02e184 [file] [log] [blame]
Wasim Khan54e44ef2020-01-06 12:05:57 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2019-2020 NXP
4 *
5 * PCIe DT fixup for NXP Layerscape SoCs
6 * Author: Wasim Khan <wasim.khan@nxp.com>
7 *
8 */
9
10#include <common.h>
11#include <asm/arch/clock.h>
12#include <asm/arch/soc.h>
13#include "pcie_layerscape_fixup_common.h"
14
15void ft_pci_setup(void *blob, bd_t *bd)
16{
17#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
18 uint svr;
19
20 svr = SVR_SOC_VER(get_svr());
21
22 if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 1, 0))
23 ft_pci_setup_ls_gen4(blob, bd);
24 else
25#endif /* CONFIG_PCIE_LAYERSCAPE_GEN4 */
26 ft_pci_setup_ls(blob, bd);
27}
Wasim Khan9d3d2302020-01-06 12:05:59 +000028
29#if defined(CONFIG_FSL_LAYERSCAPE)
Wasim Khan70bec5c2020-01-06 12:06:00 +000030int lx2_board_fix_fdt(void *fdt)
31{
32 char *reg_name, *old_str, *new_str;
33 const char *reg_names;
34 int names_len, old_str_len, new_str_len, remaining_str_len;
35 struct str_map {
36 char *old_str;
37 char *new_str;
38 } reg_names_map[] = {
39 { "csr_axi_slave", "regs" },
40 { "config_axi_slave", "config" }
41 };
42 int off = -1, i;
43
44 off = fdt_node_offset_by_compatible(fdt, -1, "fsl,lx2160a-pcie");
45 while (off != -FDT_ERR_NOTFOUND) {
46 fdt_setprop(fdt, off, "compatible", "fsl,ls2088a-pcie",
47 strlen("fsl,ls2088a-pcie") + 1);
48
49 reg_names = fdt_getprop(fdt, off, "reg-names", &names_len);
50 if (!reg_names)
51 continue;
52 reg_name = (char *)reg_names;
53 remaining_str_len = names_len - (reg_name - reg_names);
54 i = 0;
55 while ((i < ARRAY_SIZE(reg_names_map)) && remaining_str_len) {
56 old_str = reg_names_map[i].old_str;
57 new_str = reg_names_map[i].new_str;
58 old_str_len = strlen(old_str);
59 new_str_len = strlen(new_str);
60 if (memcmp(reg_name, old_str, old_str_len) == 0) {
61 /* first only leave required bytes for new_str
62 * and copy rest of the string after it
63 */
64 memcpy(reg_name + new_str_len,
65 reg_name + old_str_len,
66 remaining_str_len - old_str_len);
67
68 /* Now copy new_str */
69 memcpy(reg_name, new_str, new_str_len);
70 names_len -= old_str_len;
71 names_len += new_str_len;
72 i++;
73 }
74
75 reg_name = memchr(reg_name, '\0', remaining_str_len);
76 if (!reg_name)
77 break;
78 reg_name += 1;
79
80 remaining_str_len = names_len - (reg_name - reg_names);
81 }
82 fdt_setprop(fdt, off, "reg-names", reg_names, names_len);
83 fdt_delprop(fdt, off, "apio-wins");
84 fdt_delprop(fdt, off, "ppio-wins");
85 off = fdt_node_offset_by_compatible(fdt, off,
86 "fsl,lx2160a-pcie");
87 }
88 return 0;
89}
90
91int pcie_board_fix_fdt(void *fdt)
92{
93 uint svr;
94
95 svr = SVR_SOC_VER(get_svr());
96
97 if (svr == SVR_LX2160A && IS_SVR_REV(get_svr(), 2, 0))
98 return lx2_board_fix_fdt(fdt);
99
100 return 0;
101}
102
Wasim Khan9d3d2302020-01-06 12:05:59 +0000103#ifdef CONFIG_ARCH_LX2160A
104/* returns the next available streamid for pcie, -errno if failed */
105int pcie_next_streamid(int currentid, int idx)
106{
107 if (currentid > FSL_PEX_STREAM_ID_END)
108 return -EINVAL;
109
110 return currentid | ((idx + 1) << 11);
111}
112#else
113/* returns the next available streamid for pcie, -errno if failed */
114int pcie_next_streamid(int currentid, int idx)
115{
116 static int next_stream_id = FSL_PEX_STREAM_ID_START;
117
118 if (next_stream_id > FSL_PEX_STREAM_ID_END)
119 return -EINVAL;
120
121 return next_stream_id++;
122}
123#endif
124#endif /* CONFIG_FSL_LAYERSCAPE */