blob: 88bdc4904508a51db694303d7c4a7ddcae0c383c [file] [log] [blame]
Simon Glass0c24f372014-09-04 16:27:35 -06001#include <dt-bindings/clock/tegra114-car.h>
Simon Glass9d3eefd2014-06-11 23:29:52 -06002#include <dt-bindings/gpio/tegra-gpio.h>
3#include <dt-bindings/interrupt-controller/arm-gic.h>
4
Tom Warrenf6236152013-02-21 12:31:27 +00005#include "skeleton.dtsi"
Tom Warrenf11e89f2013-01-28 13:32:11 +00006
7/ {
8 compatible = "nvidia,tegra114";
Tom Warren36092ff2013-02-08 07:25:31 +00009
Tom Warren0ea64952013-02-27 05:52:52 +000010 tegra_car: clock {
Tom Warren36092ff2013-02-08 07:25:31 +000011 compatible = "nvidia,tegra114-car";
12 reg = <0x60006000 0x1000>;
13 #clock-cells = <1>;
14 };
15
Allen Martin2a293d42013-03-16 18:58:10 +000016 apbdma: dma {
17 compatible = "nvidia,tegra114-apbdma", "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
18 reg = <0x6000a000 0x1400>;
19 interrupts = <0 104 0x04
20 0 105 0x04
21 0 106 0x04
22 0 107 0x04
23 0 108 0x04
24 0 109 0x04
25 0 110 0x04
26 0 111 0x04
27 0 112 0x04
28 0 113 0x04
29 0 114 0x04
30 0 115 0x04
31 0 116 0x04
32 0 117 0x04
33 0 118 0x04
34 0 119 0x04
35 0 128 0x04
36 0 129 0x04
37 0 130 0x04
38 0 131 0x04
39 0 132 0x04
40 0 133 0x04
41 0 134 0x04
42 0 135 0x04
43 0 136 0x04
44 0 137 0x04
45 0 138 0x04
46 0 139 0x04
47 0 140 0x04
48 0 141 0x04
49 0 142 0x04
50 0 143 0x04>;
51 };
52
Simon Glass9d3eefd2014-06-11 23:29:52 -060053 gpio: gpio@6000d000 {
Tom Warren0ea64952013-02-27 05:52:52 +000054 compatible = "nvidia,tegra114-gpio", "nvidia,tegra30-gpio";
55 reg = <0x6000d000 0x1000>;
Simon Glass9d3eefd2014-06-11 23:29:52 -060056 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
57 <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
58 <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
63 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
Tom Warren0ea64952013-02-27 05:52:52 +000064 #gpio-cells = <2>;
65 gpio-controller;
66 #interrupt-cells = <2>;
67 interrupt-controller;
68 };
69
Tom Warren36092ff2013-02-08 07:25:31 +000070 i2c@7000c000 {
71 compatible = "nvidia,tegra114-i2c";
72 reg = <0x7000c000 0x100>;
73 interrupts = <0 38 0x04>;
74 #address-cells = <1>;
75 #size-cells = <0>;
76 clocks = <&tegra_car 12>;
77 status = "disabled";
78 };
79
80 i2c@7000c400 {
81 compatible = "nvidia,tegra114-i2c";
82 reg = <0x7000c400 0x100>;
83 interrupts = <0 84 0x04>;
84 #address-cells = <1>;
85 #size-cells = <0>;
86 clocks = <&tegra_car 54>;
87 status = "disabled";
88 };
89
90 i2c@7000c500 {
91 compatible = "nvidia,tegra114-i2c";
92 reg = <0x7000c500 0x100>;
93 interrupts = <0 92 0x04>;
94 #address-cells = <1>;
95 #size-cells = <0>;
96 clocks = <&tegra_car 67>;
97 status = "disabled";
98 };
99
100 i2c@7000c700 {
101 compatible = "nvidia,tegra114-i2c";
102 reg = <0x7000c700 0x100>;
103 interrupts = <0 120 0x04>;
104 #address-cells = <1>;
105 #size-cells = <0>;
106 clocks = <&tegra_car 103>;
107 status = "disabled";
108 };
109
110 i2c@7000d000 {
111 compatible = "nvidia,tegra114-i2c";
112 reg = <0x7000d000 0x100>;
113 interrupts = <0 53 0x04>;
114 #address-cells = <1>;
115 #size-cells = <0>;
116 clocks = <&tegra_car 47>;
117 status = "disabled";
118 };
Allen Martin461b80f2013-03-16 18:58:11 +0000119
Simon Glass0c24f372014-09-04 16:27:35 -0600120 uarta: serial@70006000 {
121 compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
122 reg = <0x70006000 0x40>;
123 reg-shift = <2>;
124 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
125 clocks = <&tegra_car TEGRA114_CLK_UARTA>;
126 resets = <&tegra_car 6>;
127 reset-names = "serial";
128 dmas = <&apbdma 8>, <&apbdma 8>;
129 dma-names = "rx", "tx";
130 status = "disabled";
131 };
132
133 uartb: serial@70006040 {
134 compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
135 reg = <0x70006040 0x40>;
136 reg-shift = <2>;
137 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
138 clocks = <&tegra_car TEGRA114_CLK_UARTB>;
139 resets = <&tegra_car 7>;
140 reset-names = "serial";
141 dmas = <&apbdma 9>, <&apbdma 9>;
142 dma-names = "rx", "tx";
143 status = "disabled";
144 };
145
146 uartc: serial@70006200 {
147 compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
148 reg = <0x70006200 0x100>;
149 reg-shift = <2>;
150 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
151 clocks = <&tegra_car TEGRA114_CLK_UARTC>;
152 resets = <&tegra_car 55>;
153 reset-names = "serial";
154 dmas = <&apbdma 10>, <&apbdma 10>;
155 dma-names = "rx", "tx";
156 status = "disabled";
157 };
158
159 uartd: serial@70006300 {
160 compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart";
161 reg = <0x70006300 0x100>;
162 reg-shift = <2>;
163 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
164 clocks = <&tegra_car TEGRA114_CLK_UARTD>;
165 resets = <&tegra_car 65>;
166 reset-names = "serial";
167 dmas = <&apbdma 19>, <&apbdma 19>;
168 dma-names = "rx", "tx";
169 status = "disabled";
170 };
171
Allen Martin461b80f2013-03-16 18:58:11 +0000172 spi@7000d400 {
173 compatible = "nvidia,tegra114-spi";
174 reg = <0x7000d400 0x200>;
175 interrupts = <0 59 0x04>;
176 nvidia,dma-request-selector = <&apbdma 15>;
177 #address-cells = <1>;
178 #size-cells = <0>;
179 status = "disabled";
180 /* PERIPH_ID_SBC1, PLLP_OUT0 */
181 clocks = <&tegra_car 41>;
182 };
183
184 spi@7000d600 {
185 compatible = "nvidia,tegra114-spi";
186 reg = <0x7000d600 0x200>;
187 interrupts = <0 82 0x04>;
188 nvidia,dma-request-selector = <&apbdma 16>;
189 #address-cells = <1>;
190 #size-cells = <0>;
191 status = "disabled";
192 /* PERIPH_ID_SBC2, PLLP_OUT0 */
193 clocks = <&tegra_car 44>;
194 };
195
196 spi@7000d800 {
197 compatible = "nvidia,tegra114-spi";
Stephen Warrenc68a6822014-01-24 12:46:12 -0700198 reg = <0x7000d800 0x200>;
Allen Martin461b80f2013-03-16 18:58:11 +0000199 interrupts = <0 83 0x04>;
200 nvidia,dma-request-selector = <&apbdma 17>;
201 #address-cells = <1>;
202 #size-cells = <0>;
203 status = "disabled";
204 /* PERIPH_ID_SBC3, PLLP_OUT0 */
205 clocks = <&tegra_car 46>;
206 };
207
208 spi@7000da00 {
209 compatible = "nvidia,tegra114-spi";
210 reg = <0x7000da00 0x200>;
211 interrupts = <0 93 0x04>;
212 nvidia,dma-request-selector = <&apbdma 18>;
213 #address-cells = <1>;
214 #size-cells = <0>;
215 status = "disabled";
216 /* PERIPH_ID_SBC4, PLLP_OUT0 */
217 clocks = <&tegra_car 68>;
218 };
219
220 spi@7000dc00 {
221 compatible = "nvidia,tegra114-spi";
222 reg = <0x7000dc00 0x200>;
223 interrupts = <0 94 0x04>;
224 nvidia,dma-request-selector = <&apbdma 27>;
225 #address-cells = <1>;
226 #size-cells = <0>;
227 status = "disabled";
228 /* PERIPH_ID_SBC5, PLLP_OUT0 */
229 clocks = <&tegra_car 104>;
230 };
231
232 spi@7000de00 {
233 compatible = "nvidia,tegra114-spi";
234 reg = <0x7000de00 0x200>;
235 interrupts = <0 79 0x04>;
236 nvidia,dma-request-selector = <&apbdma 28>;
237 #address-cells = <1>;
238 #size-cells = <0>;
239 status = "disabled";
240 /* PERIPH_ID_SBC6, PLLP_OUT0 */
241 clocks = <&tegra_car 105>;
242 };
Tom Warrenbe479a82013-03-18 14:46:46 -0700243
244 sdhci@78000000 {
245 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
246 reg = <0x78000000 0x200>;
247 interrupts = <0 14 0x04>;
248 clocks = <&tegra_car 14>;
249 status = "disable";
250 };
251
252 sdhci@78000200 {
253 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
254 reg = <0x78000200 0x200>;
255 interrupts = <0 15 0x04>;
256 clocks = <&tegra_car 9>;
257 status = "disable";
258 };
259
260 sdhci@78000400 {
261 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
262 reg = <0x78000400 0x200>;
263 interrupts = <0 19 0x04>;
264 clocks = <&tegra_car 69>;
265 status = "disable";
266 };
267
268 sdhci@78000600 {
269 compatible = "nvidia,tegra114-sdhci", "nvidia,tegra30-sdhci";
270 reg = <0x78000600 0x200>;
271 interrupts = <0 31 0x04>;
272 clocks = <&tegra_car 15>;
273 status = "disable";
274 };
Jim Lindfed30e2013-06-21 19:05:46 +0800275
276 usb@7d000000 {
277 compatible = "nvidia,tegra114-ehci";
278 reg = <0x7d000000 0x4000>;
279 interrupts = <52>;
280 phy_type = "utmi";
281 clocks = <&tegra_car 22>; /* PERIPH_ID_USBD */
282 status = "disabled";
283 };
284
285 usb@7d004000 {
286 compatible = "nvidia,tegra114-ehci";
287 reg = <0x7d004000 0x4000>;
288 interrupts = <53>;
289 phy_type = "hsic";
290 clocks = <&tegra_car 58>; /* PERIPH_ID_USB2 */
291 status = "disabled";
292 };
293
294 usb@7d008000 {
295 compatible = "nvidia,tegra114-ehci";
296 reg = <0x7d008000 0x4000>;
297 interrupts = <129>;
298 phy_type = "utmi";
299 clocks = <&tegra_car 59>; /* PERIPH_ID_USB3 */
300 status = "disabled";
301 };
Tom Warrenf11e89f2013-01-28 13:32:11 +0000302};