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git01.mediatek.com / filogic / uboot / 32822d011e20e14fa069b965cec69486f85e4963 / . / configs / socfpga_arria10_defconfig
blob: 8fdd21c0d37d0d6c5d064c5e783b133f4220450a [file] [log] [blame]
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_SOCFPGA=y
Tom Rini5cd7ece2019-11-18 20:02:10 -0500[diff] [blame]3CONFIG_ENV_SIZE=0x2000
4CONFIG_ENV_OFFSET=0x4400
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]5CONFIG_DM_GPIO=y
Tom Rini0332a1a2020-07-06 13:54:25 -0400[diff] [blame]6CONFIG_SPL_TEXT_BASE=0xFFE00000
Tom Rinif6e6e1a2020-01-22 13:38:00 -0500[diff] [blame]7CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]8CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y
9CONFIG_IDENT_STRING="socfpga_arria10"
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]10CONFIG_SPL_FS_FAT=y
Tom Rini90fa4e92020-07-06 15:46:38 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc"
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]12CONFIG_DISTRO_DEFAULTS=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]13CONFIG_FIT=y
14CONFIG_SPL_FIT=y
Simon Glass5d144112020-07-19 13:56:10 -0600[diff] [blame]15# CONFIG_USE_SPL_FIT_GENERATOR is not set
Sam Protsenkobd7bffe2017-08-14 20:22:17 +0300[diff] [blame]16CONFIG_USE_BOOTARGS=y
17CONFIG_BOOTARGS="console=ttyS0,115200"
Tom Rini732aa4a2018-02-10 16:54:38 -0500[diff] [blame]18# CONFIG_USE_BOOTCOMMAND is not set
Tien Fong Cheedf0544a2019-05-07 17:42:31 +0800[diff] [blame]19CONFIG_SYS_CONSOLE_IS_IN_ENV=y
20CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y
21CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]22CONFIG_DEFAULT_FDT_FILE="socfpga_arria10_socdk_sdmmc.dtb"
Tien Fong Cheedf0544a2019-05-07 17:42:31 +0800[diff] [blame]23CONFIG_VERSION_VARIABLE=y
Mario Sixf7055442018-03-28 14:38:17 +0200[diff] [blame]24CONFIG_DISPLAY_BOARDINFO_LATE=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]25CONFIG_SPL_ENV_SUPPORT=y
Tien Fong Chee486d59a2017-07-26 13:05:42 +0800[diff] [blame]26CONFIG_SPL_FPGA_SUPPORT=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]27CONFIG_CMD_ASKENV=y
28CONFIG_CMD_GREPENV=y
29# CONFIG_CMD_FLASH is not set
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]30CONFIG_CMD_GPIO=y
Tom Rini78873cd2017-08-14 19:58:53 -0400[diff] [blame]31CONFIG_CMD_MMC=y
Ley Foon Tan0bf9acc2020-04-22 10:06:45 +0800[diff] [blame]32CONFIG_CMD_USB=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]33CONFIG_CMD_CACHE=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]34CONFIG_CMD_EXT4_WRITE=y
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]35CONFIG_MTDIDS_DEFAULT="nor0=ff705000.spi.0"
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]36CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-parent dmas dma-names"
Tom Rini5b0b0402017-08-28 07:16:32 -0400[diff] [blame]37CONFIG_ENV_IS_IN_MMC=y
Tom Rinica63e712019-11-12 22:46:36 -0500[diff] [blame]38CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]39CONFIG_SPL_DM_SEQ_ALIAS=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]40CONFIG_DWAPB_GPIO=y
Tom Rini66ea5c72019-05-26 14:45:25 -0400[diff] [blame]41CONFIG_FS_LOADER=y
Ley Foon Tan10b69642017-04-26 02:44:46 +0800[diff] [blame]42CONFIG_DM_MMC=y
Tien Fong Cheedf0544a2019-05-07 17:42:31 +0800[diff] [blame]43CONFIG_MMC_DW=y
Miquel Raynal2e35dbb2019-10-03 19:50:05 +0200[diff] [blame]44CONFIG_MTD=y
Tien Fong Cheedf0544a2019-05-07 17:42:31 +0800[diff] [blame]45CONFIG_PHY_MICREL=y
46CONFIG_PHY_MICREL_KSZ90X1=y
Marek Vasutc5757c92018-08-13 21:02:54 +0200[diff] [blame]47CONFIG_DM_ETH=y
48CONFIG_ETH_DESIGNWARE=y
Adam Ford53705472018-07-20 23:03:57 -0500[diff] [blame]49CONFIG_MII=y
Adam Ford4e96ff82018-04-15 13:51:26 -0400[diff] [blame]50CONFIG_SPI=y
Marek Vasutaaa40e72018-08-18 16:00:31 +0200[diff] [blame]51CONFIG_TIMER=y
52CONFIG_SPL_TIMER=y
53CONFIG_DESIGNWARE_APB_TIMER=y
Ley Foon Tan0bf9acc2020-04-22 10:06:45 +0800[diff] [blame]54CONFIG_USB=y
55CONFIG_DM_USB=y
56CONFIG_USB_DWC2=y
Simon Goldschmidtfe6275f2019-10-05 22:10:11 +0200[diff] [blame]57# CONFIG_SPL_WDT is not set