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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stelian Pop78379932008-03-26 18:52:33 +01002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Stelian Pop78379932008-03-26 18:52:33 +01005 * Lead Tech Design <www.leadtechdesign.com>
Stelian Pop78379932008-03-26 18:52:33 +01006 */
7
Tom Rinidec7ea02024-05-20 13:35:03 -06008#include <config.h>
Wenyou Yangde56d372017-04-18 15:18:49 +08009#include <debug_uart.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070010#include <init.h>
Simon Glass0c364412019-12-28 10:44:48 -070011#include <net.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060012#include <asm/global_data.h>
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000013#include <asm/io.h>
Stelian Pop78379932008-03-26 18:52:33 +010014#include <asm/arch/at91sam9260_matrix.h>
Stelian Popd57846e2008-05-08 22:52:10 +020015#include <asm/arch/at91sam9_smc.h>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010016#include <asm/arch/at91_common.h>
Wenyou Yang78f89762016-02-03 10:16:50 +080017#include <asm/arch/clk.h>
Stelian Pop78379932008-03-26 18:52:33 +010018#include <asm/arch/gpio.h>
Stelian Pop78379932008-03-26 18:52:33 +010019
20DECLARE_GLOBAL_DATA_PTR;
21
22/* ------------------------------------------------------------------------- */
23/*
24 * Miscelaneous platform dependent initialisations
25 */
26
Stelian Pop78379932008-03-26 18:52:33 +010027#ifdef CONFIG_CMD_NAND
28static void at91sam9260ek_nand_hw_init(void)
29{
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000030 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
31 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
Stelian Pop78379932008-03-26 18:52:33 +010032 unsigned long csa;
33
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000034 /* Assign CS3 to NAND/SmartMedia Interface */
35 csa = readl(&matrix->ebicsa);
36 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
37 writel(csa, &matrix->ebicsa);
Stelian Pop78379932008-03-26 18:52:33 +010038
39 /* Configure SMC CS3 for NAND/SmartMedia */
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000040 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
41 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
42 &smc->cs[3].setup);
43 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
44 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
45 &smc->cs[3].pulse);
46 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
47 &smc->cs[3].cycle);
48 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
49 AT91_SMC_MODE_EXNW_DISABLE |
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020050#ifdef CONFIG_SYS_NAND_DBW_16
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000051 AT91_SMC_MODE_DBW_16 |
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020052#else /* CONFIG_SYS_NAND_DBW_8 */
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000053 AT91_SMC_MODE_DBW_8 |
Stelian Popa35a4f82008-05-08 20:52:18 +020054#endif
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000055 AT91_SMC_MODE_TDF_CYCLE(2),
56 &smc->cs[3].mode);
Stelian Pop78379932008-03-26 18:52:33 +010057
58 /* Configure RDY/BSY */
Tom Rinib4213492022-11-12 17:36:51 -050059 at91_set_gpio_input(CFG_SYS_NAND_READY_PIN, 1);
Stelian Pop78379932008-03-26 18:52:33 +010060
61 /* Enable NandFlash */
Tom Rinib4213492022-11-12 17:36:51 -050062 at91_set_gpio_output(CFG_SYS_NAND_ENABLE_PIN, 1);
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000063
Stelian Pop78379932008-03-26 18:52:33 +010064}
65#endif
66
Wenyou Yangde56d372017-04-18 15:18:49 +080067#ifdef CONFIG_DEBUG_UART_BOARD_INIT
68void board_debug_uart_init(void)
69{
70 at91_seriald_hw_init();
71}
72#endif
73
74#ifdef CONFIG_BOARD_EARLY_INIT_F
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000075int board_early_init_f(void)
Stelian Pop78379932008-03-26 18:52:33 +010076{
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000077 return 0;
78}
Wenyou Yangde56d372017-04-18 15:18:49 +080079#endif
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000080
81int board_init(void)
82{
Stelian Pop78379932008-03-26 18:52:33 +010083 /* adress of boot parameters */
Tom Rinibb4dd962022-11-16 13:10:37 -050084 gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
Stelian Pop78379932008-03-26 18:52:33 +010085
Stelian Pop78379932008-03-26 18:52:33 +010086#ifdef CONFIG_CMD_NAND
87 at91sam9260ek_nand_hw_init();
88#endif
Stelian Pop78379932008-03-26 18:52:33 +010089 return 0;
90}
91
92int dram_init(void)
93{
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000094 gd->ram_size = get_ram_size(
Tom Rinibb4dd962022-11-16 13:10:37 -050095 (void *)CFG_SYS_SDRAM_BASE,
96 CFG_SYS_SDRAM_SIZE);
Stelian Pop78379932008-03-26 18:52:33 +010097 return 0;
98}
99
100#ifdef CONFIG_RESET_PHY_R
101void reset_phy(void)
102{
Stelian Pop78379932008-03-26 18:52:33 +0100103}
104#endif