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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stelian Pop78379932008-03-26 18:52:33 +01002/*
3 * (C) Copyright 2007-2008
Stelian Pop5ee0c7f2011-11-01 00:00:39 +01004 * Stelian Pop <stelian@popies.net>
Stelian Pop78379932008-03-26 18:52:33 +01005 * Lead Tech Design <www.leadtechdesign.com>
Stelian Pop78379932008-03-26 18:52:33 +01006 */
7
8#include <common.h>
Wenyou Yangde56d372017-04-18 15:18:49 +08009#include <debug_uart.h>
Simon Glass8e16b1e2019-12-28 10:45:05 -070010#include <init.h>
Simon Glass0c364412019-12-28 10:44:48 -070011#include <net.h>
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000012#include <asm/io.h>
Stelian Pop78379932008-03-26 18:52:33 +010013#include <asm/arch/at91sam9260_matrix.h>
Stelian Popd57846e2008-05-08 22:52:10 +020014#include <asm/arch/at91sam9_smc.h>
Jean-Christophe PLAGNIOL-VILLARD6b0b3db2009-03-21 21:07:59 +010015#include <asm/arch/at91_common.h>
Wenyou Yang78f89762016-02-03 10:16:50 +080016#include <asm/arch/clk.h>
Stelian Pop78379932008-03-26 18:52:33 +010017#include <asm/arch/gpio.h>
Stelian Pop78379932008-03-26 18:52:33 +010018
19DECLARE_GLOBAL_DATA_PTR;
20
21/* ------------------------------------------------------------------------- */
22/*
23 * Miscelaneous platform dependent initialisations
24 */
25
Stelian Pop78379932008-03-26 18:52:33 +010026#ifdef CONFIG_CMD_NAND
27static void at91sam9260ek_nand_hw_init(void)
28{
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000029 struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
30 struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
Stelian Pop78379932008-03-26 18:52:33 +010031 unsigned long csa;
32
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000033 /* Assign CS3 to NAND/SmartMedia Interface */
34 csa = readl(&matrix->ebicsa);
35 csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
36 writel(csa, &matrix->ebicsa);
Stelian Pop78379932008-03-26 18:52:33 +010037
38 /* Configure SMC CS3 for NAND/SmartMedia */
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000039 writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
40 AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
41 &smc->cs[3].setup);
42 writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
43 AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
44 &smc->cs[3].pulse);
45 writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
46 &smc->cs[3].cycle);
47 writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
48 AT91_SMC_MODE_EXNW_DISABLE |
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020049#ifdef CONFIG_SYS_NAND_DBW_16
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000050 AT91_SMC_MODE_DBW_16 |
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020051#else /* CONFIG_SYS_NAND_DBW_8 */
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000052 AT91_SMC_MODE_DBW_8 |
Stelian Popa35a4f82008-05-08 20:52:18 +020053#endif
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000054 AT91_SMC_MODE_TDF_CYCLE(2),
55 &smc->cs[3].mode);
Stelian Pop78379932008-03-26 18:52:33 +010056
57 /* Configure RDY/BSY */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010058 at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
Stelian Pop78379932008-03-26 18:52:33 +010059
60 /* Enable NandFlash */
Jean-Christophe PLAGNIOL-VILLARDc9539ba2009-03-22 10:22:34 +010061 at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000062
Stelian Pop78379932008-03-26 18:52:33 +010063}
64#endif
65
Wenyou Yangde56d372017-04-18 15:18:49 +080066#ifdef CONFIG_DEBUG_UART_BOARD_INIT
67void board_debug_uart_init(void)
68{
69 at91_seriald_hw_init();
70}
71#endif
72
73#ifdef CONFIG_BOARD_EARLY_INIT_F
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000074int board_early_init_f(void)
Stelian Pop78379932008-03-26 18:52:33 +010075{
Wenyou Yangde56d372017-04-18 15:18:49 +080076#ifdef CONFIG_DEBUG_UART
77 debug_uart_init();
78#endif
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000079 return 0;
80}
Wenyou Yangde56d372017-04-18 15:18:49 +080081#endif
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000082
83int board_init(void)
84{
Stelian Pop78379932008-03-26 18:52:33 +010085 /* adress of boot parameters */
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000086 gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
Stelian Pop78379932008-03-26 18:52:33 +010087
Stelian Pop78379932008-03-26 18:52:33 +010088#ifdef CONFIG_CMD_NAND
89 at91sam9260ek_nand_hw_init();
90#endif
Stelian Pop78379932008-03-26 18:52:33 +010091 return 0;
92}
93
94int dram_init(void)
95{
Reinhard Meyer0bda5f22011-06-06 00:13:10 +000096 gd->ram_size = get_ram_size(
97 (void *)CONFIG_SYS_SDRAM_BASE,
98 CONFIG_SYS_SDRAM_SIZE);
Stelian Pop78379932008-03-26 18:52:33 +010099 return 0;
100}
101
102#ifdef CONFIG_RESET_PHY_R
103void reset_phy(void)
104{
Stelian Pop78379932008-03-26 18:52:33 +0100105}
106#endif