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git01.mediatek.com / filogic / uboot / 32301eef09ec4519e17dc049bf65b50c30999fcc / . / configs / phycore-imx8mm_defconfig
blob: 9b8c09a73abe696ac4e41f4858bf505eb59a1a8e [file] [log] [blame]
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_IMX8M=y
3CONFIG_SYS_TEXT_BASE=0x40200000
Tom Rinie25a03a2021-11-01 12:19:22 +0000[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x2000000
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]5CONFIG_SPL_GPIO=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]8CONFIG_ENV_SIZE=0x10000
9CONFIG_ENV_OFFSET=0x3C0000
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]10CONFIG_DM_GPIO=y
Tom Rinia20e51f2021-06-28 10:17:29 -0400[diff] [blame]11CONFIG_DEFAULT_DEVICE_TREE="phycore-imx8mm"
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]12CONFIG_SPL_TEXT_BASE=0x7E1000
13CONFIG_TARGET_PHYCORE_IMX8MM=y
Tom Rinice53ec82022-08-23 15:24:14 -0400[diff] [blame]14CONFIG_SYS_PROMPT="u-boot=> "
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]15CONFIG_SPL_MMC=y
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]16CONFIG_SPL_SERIAL=y
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]17CONFIG_SPL_DRIVERS_MISC=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]18CONFIG_SPL=y
19CONFIG_ENV_OFFSET_REDUND=0x3E0000
Tom Rini0997ee02021-08-23 10:25:31 -0400[diff] [blame]20CONFIG_SYS_LOAD_ADDR=0x40480000
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]21CONFIG_FIT=y
22CONFIG_FIT_EXTERNAL_OFFSET=0x3000
23CONFIG_SPL_LOAD_FIT=y
Teresa Remmetb93fc942021-10-06 11:56:54 +0200[diff] [blame]24# CONFIG_USE_SPL_FIT_GENERATOR is not set
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]25CONFIG_OF_SYSTEM_SETUP=y
Tom Rini5ddf1722021-11-10 09:11:40 -0500[diff] [blame]26CONFIG_USE_BOOTCOMMAND=y
27CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;"
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]28CONFIG_DEFAULT_FDT_FILE="oftree"
29CONFIG_BOARD_LATE_INIT=y
Tom Rini65aa1242022-05-27 10:19:45 -0400[diff] [blame]30CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
31CONFIG_SPL_BSS_START_ADDR=0x910000
Tom Rini0cb89e72022-05-19 15:09:22 -0400[diff] [blame]32CONFIG_SPL_BSS_MAX_SIZE=0x2000
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]33CONFIG_SPL_BOARD_INIT=y
Tom Rini8a14ac42022-05-26 13:13:21 -0400[diff] [blame]34# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
35CONFIG_SPL_STACK=0x920000
Tom Rini166e3222022-05-27 12:48:32 -0400[diff] [blame]36CONFIG_SYS_SPL_MALLOC=y
37CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y
38CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000
39CONFIG_SYS_SPL_MALLOC_SIZE=0x80000
Tom Rinid391d8b2021-12-11 14:55:51 -0500[diff] [blame]40CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
41CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x300
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]42CONFIG_SPL_I2C=y
Simon Glasse91ac4c2021-07-10 21:14:24 -0600[diff] [blame]43CONFIG_SPL_POWER=y
Teresa Remmeta4f01882021-10-06 11:56:52 +0200[diff] [blame]44CONFIG_SPL_SPI_FLASH_MTD=y
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]45CONFIG_SPL_WATCHDOG=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]46CONFIG_HUSH_PARSER=y
Tom Riniba5c2b02022-05-11 16:21:06 -0400[diff] [blame]47CONFIG_SYS_MAXARGS=64
Tom Riniae17fa32022-05-11 18:01:06 -0400[diff] [blame]48CONFIG_SYS_CBSIZE=2048
Tom Rinicbfa1392022-05-11 17:38:09 -0400[diff] [blame]49CONFIG_SYS_PBSIZE=2074
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]50# CONFIG_CMD_EXPORTENV is not set
51# CONFIG_CMD_IMPORTENV is not set
52# CONFIG_CMD_CRC32 is not set
53CONFIG_CMD_EEPROM=y
Tom Rinifaed5672021-08-17 17:59:45 -0400[diff] [blame]54CONFIG_SYS_I2C_EEPROM_ADDR_LEN=2
55CONFIG_SYS_EEPROM_SIZE=4096
56CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=5
57CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
Teresa Remmetdf2c5a02021-10-06 11:56:53 +0200[diff] [blame]58CONFIG_CMD_CLK=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]59CONFIG_CMD_FUSE=y
60CONFIG_CMD_GPIO=y
61CONFIG_CMD_I2C=y
62CONFIG_CMD_MMC=y
Teresa Remmeta4f01882021-10-06 11:56:52 +0200[diff] [blame]63CONFIG_CMD_SF_TEST=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]64CONFIG_CMD_DHCP=y
65CONFIG_CMD_MII=y
66CONFIG_CMD_PING=y
67CONFIG_CMD_CACHE=y
68CONFIG_CMD_REGULATOR=y
69CONFIG_CMD_EXT2=y
70CONFIG_CMD_EXT4=y
71CONFIG_CMD_EXT4_WRITE=y
72CONFIG_CMD_FAT=y
73CONFIG_OF_CONTROL=y
74CONFIG_SPL_OF_CONTROL=y
75CONFIG_ENV_OVERWRITE=y
76CONFIG_ENV_IS_IN_MMC=y
77CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
78CONFIG_SYS_RELOC_GD_ENV_ADDR=y
79CONFIG_SYS_MMC_ENV_DEV=2
80CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
81CONFIG_SPL_DM=y
82CONFIG_SPL_CLK_COMPOSITE_CCF=y
83CONFIG_CLK_COMPOSITE_CCF=y
84CONFIG_SPL_CLK_IMX8MM=y
85CONFIG_CLK_IMX8MM=y
86CONFIG_MXC_GPIO=y
87CONFIG_DM_I2C=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]88CONFIG_MISC=y
89CONFIG_I2C_EEPROM=y
90CONFIG_SYS_I2C_EEPROM_ADDR=0x51
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]91CONFIG_SUPPORT_EMMC_BOOT=y
92CONFIG_MMC_IO_VOLTAGE=y
93CONFIG_MMC_UHS_SUPPORT=y
94CONFIG_MMC_HS400_ES_SUPPORT=y
95CONFIG_MMC_HS400_SUPPORT=y
Tom Rinid479a9f2021-11-07 22:59:37 -0500[diff] [blame]96CONFIG_FSL_USDHC=y
Teresa Remmeta4f01882021-10-06 11:56:52 +0200[diff] [blame]97CONFIG_MTD=y
98CONFIG_DM_MTD=y
99CONFIG_DM_SPI_FLASH=y
100CONFIG_SF_DEFAULT_BUS=3
Teresa Remmeta4f01882021-10-06 11:56:52 +0200[diff] [blame]101CONFIG_SF_DEFAULT_SPEED=80000000
102CONFIG_SPI_FLASH_BAR=y
103CONFIG_SPI_FLASH_MACRONIX=y
104CONFIG_SPI_FLASH_SPANSION=y
105CONFIG_SPI_FLASH_STMICRO=y
106CONFIG_SPI_FLASH_SST=y
107CONFIG_SPI_FLASH_WINBOND=y
108# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
109CONFIG_SPI_FLASH_MTD=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]110CONFIG_PHYLIB=y
111CONFIG_PHY_TI_DP83867=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]112CONFIG_PHY_GIGE=y
113CONFIG_FEC_MXC=y
114CONFIG_MII=y
115CONFIG_PINCTRL=y
116CONFIG_SPL_PINCTRL=y
117CONFIG_PINCTRL_IMX8M=y
118CONFIG_DM_REGULATOR=y
119CONFIG_DM_REGULATOR_FIXED=y
120CONFIG_DM_REGULATOR_GPIO=y
Peng Fan38aeb5f2022-06-11 20:20:58 +0800[diff] [blame]121CONFIG_DM_SERIAL=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]122CONFIG_MXC_UART=y
Teresa Remmeta4f01882021-10-06 11:56:52 +0200[diff] [blame]123CONFIG_SPI=y
124CONFIG_DM_SPI=y
125CONFIG_NXP_FSPI=y
Teresa Remmet82750c22020-08-21 09:55:53 +0200[diff] [blame]126CONFIG_SYSRESET=y
127CONFIG_SPL_SYSRESET=y
128CONFIG_SYSRESET_PSCI=y
129CONFIG_SYSRESET_WATCHDOG=y
130CONFIG_DM_THERMAL=y
131CONFIG_IMX_WATCHDOG=y