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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Bin Meng00ffb4d2015-02-02 22:35:23 +08002/*
3 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
Bin Meng00ffb4d2015-02-02 22:35:23 +08004 */
5
6#ifndef _QUARK_DEVICE_H_
7#define _QUARK_DEVICE_H_
8
Bin Meng5efb4152016-05-25 19:19:09 -07009/*
10 * Internal PCI device numbers within the SoC.
11 *
12 * Note it must start with 0x_ prefix, as the device number macro will be
13 * included in the ACPI ASL files (see irq_helper.h and irq_route.h).
14 */
Bin Meng00ffb4d2015-02-02 22:35:23 +080015
Bin Meng5efb4152016-05-25 19:19:09 -070016#define QUARK_HOST_BRIDGE_DEV 0x00
Bin Mengef9e9f92015-05-25 22:35:06 +080017#define QUARK_HOST_BRIDGE_FUNC 0
18
Bin Meng5efb4152016-05-25 19:19:09 -070019#define QUARK_DEV_20 0x14
Bin Mengef9e9f92015-05-25 22:35:06 +080020#define QUARK_MMC_SDIO_FUNC 0
21#define QUARK_UART0_FUNC 1
22#define QUARK_USB_DEVICE_FUNC 2
23#define QUARK_USB_EHCI_FUNC 3
24#define QUARK_USB_OHCI_FUNC 4
25#define QUARK_UART1_FUNC 5
26#define QUARK_EMAC0_FUNC 6
27#define QUARK_EMAC1_FUNC 7
28
Bin Meng5efb4152016-05-25 19:19:09 -070029#define QUARK_DEV_21 0x15
Bin Mengef9e9f92015-05-25 22:35:06 +080030#define QUARK_SPI0_FUNC 0
31#define QUARK_SPI1_FUNC 1
32#define QUARK_I2C_GPIO_FUNC 2
33
Bin Meng5efb4152016-05-25 19:19:09 -070034#define QUARK_DEV_23 0x17
Bin Mengef9e9f92015-05-25 22:35:06 +080035#define QUARK_PCIE0_FUNC 0
36#define QUARK_PCIE1_FUNC 1
37
Bin Meng5efb4152016-05-25 19:19:09 -070038#define QUARK_LGC_BRIDGE_DEV 0x1f
Bin Mengef9e9f92015-05-25 22:35:06 +080039#define QUARK_LGC_BRIDGE_FUNC 0
40
Bin Meng5efb4152016-05-25 19:19:09 -070041#ifndef __ASSEMBLY__
42#include <pci.h>
43
Bin Mengef9e9f92015-05-25 22:35:06 +080044#define QUARK_HOST_BRIDGE \
45 PCI_BDF(0, QUARK_HOST_BRIDGE_DEV, QUARK_HOST_BRIDGE_FUNC)
46#define QUARK_MMC_SDIO \
47 PCI_BDF(0, QUARK_DEV_20, QUARK_MMC_SDIO_FUNC)
48#define QUARK_UART0 \
49 PCI_BDF(0, QUARK_DEV_20, QUARK_UART0_FUNC)
50#define QUARK_USB_DEVICE \
51 PCI_BDF(0, QUARK_DEV_20, QUARK_USB_DEVICE_FUNC)
52#define QUARK_USB_EHCI \
53 PCI_BDF(0, QUARK_DEV_20, QUARK_USB_EHCI_FUNC)
54#define QUARK_USB_OHCI \
55 PCI_BDF(0, QUARK_DEV_20, QUARK_USB_OHCI_FUNC)
56#define QUARK_UART1 \
57 PCI_BDF(0, QUARK_DEV_20, QUARK_UART1_FUNC)
58#define QUARK_EMAC0 \
59 PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC0_FUNC)
60#define QUARK_EMAC1 \
61 PCI_BDF(0, QUARK_DEV_20, QUARK_EMAC1_FUNC)
62#define QUARK_SPI0 \
63 PCI_BDF(0, QUARK_DEV_21, QUARK_SPI0_FUNC)
64#define QUARK_SPI1 \
65 PCI_BDF(0, QUARK_DEV_21, QUARK_SPI1_FUNC)
66#define QUARK_I2C_GPIO \
67 PCI_BDF(0, QUARK_DEV_21, QUARK_I2C_GPIO_FUNC)
68#define QUARK_PCIE0 \
69 PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE0_FUNC)
70#define QUARK_PCIE1 \
71 PCI_BDF(0, QUARK_DEV_23, QUARK_PCIE1_FUNC)
72#define QUARK_LEGACY_BRIDGE \
73 PCI_BDF(0, QUARK_LGC_BRIDGE_DEV, QUARK_LGC_BRIDGE_FUNC)
Bin Meng5efb4152016-05-25 19:19:09 -070074#endif /* __ASSEMBLY__ */
Bin Meng00ffb4d2015-02-02 22:35:23 +080075
76#endif /* _QUARK_DEVICE_H_ */