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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stelian Pop61e69d72008-05-08 20:52:22 +02002/*
3 * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9261.h]
4 *
5 * Copyright (C) SAN People
Reinhard Meyer87b561b2010-11-19 10:04:37 +01006 * (C) Copyright 2010
7 * Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
Stelian Pop61e69d72008-05-08 20:52:22 +02008 *
Reinhard Meyer87b561b2010-11-19 10:04:37 +01009 * Definitions for the SoCs:
10 * AT91SAM9261, AT91SAM9G10
11 *
12 * Note that those SoCs are mostly software and pin compatible,
13 * therefore this file applies to all of them. Differences between
14 * those SoCs are concentrated at the end of this file.
Stelian Pop61e69d72008-05-08 20:52:22 +020015 */
16
17#ifndef AT91SAM9261_H
18#define AT91SAM9261_H
19
20/*
Reinhard Meyer87b561b2010-11-19 10:04:37 +010021 * Peripheral identifiers/interrupts.
22 */
23#define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */
24#define ATMEL_ID_SYS 1 /* System Peripherals */
25#define ATMEL_ID_PIOA 2 /* Parallel IO Controller A */
26#define ATMEL_ID_PIOB 3 /* Parallel IO Controller B */
27#define ATMEL_ID_PIOC 4 /* Parallel IO Controller C */
28/* Reserved: 5 */
29#define ATMEL_ID_USART0 6 /* USART 0 */
30#define ATMEL_ID_USART1 7 /* USART 1 */
31#define ATMEL_ID_USART2 8 /* USART 2 */
32#define ATMEL_ID_MCI 9 /* Multimedia Card Interface */
33#define ATMEL_ID_UDP 10 /* USB Device Port */
34#define ATMEL_ID_TWI0 11 /* Two-Wire Interface 0 */
35#define ATMEL_ID_SPI0 12 /* Serial Peripheral Interface 0 */
36#define ATMEL_ID_SPI1 13 /* Serial Peripheral Interface 1 */
37#define ATMEL_ID_SSC0 14 /* Serial Synchronous Controller 0 */
38#define ATMEL_ID_SSC1 15 /* Serial Synchronous Controller 1 */
39#define ATMEL_ID_SSC2 16 /* Serial Synchronous Controller 2 */
40#define ATMEL_ID_TC0 17 /* Timer Counter 0 */
41#define ATMEL_ID_TC1 18 /* Timer Counter 1 */
42#define ATMEL_ID_TC2 19 /* Timer Counter 2 */
43#define ATMEL_ID_UHP 20 /* USB Host port */
44#define ATMEL_ID_LCDC 21 /* LDC Controller */
45/* Reserved: 22-28 */
46#define ATMEL_ID_IRQ0 29 /* Advanced Interrupt Controller (IRQ0) */
47#define ATMEL_ID_IRQ1 30 /* Advanced Interrupt Controller (IRQ1) */
48#define ATMEL_ID_IRQ2 31 /* Advanced Interrupt Controller (IRQ2) */
Jens Scharsig698ad062010-02-03 22:46:01 +010049
Reinhard Meyer87b561b2010-11-19 10:04:37 +010050/*
51 * User Peripherals physical base addresses.
52 */
53#define ATMEL_BASE_TCB0 0xfffa0000
54#define ATMEL_BASE_TC0 0xfffa0000
55#define ATMEL_BASE_TC1 0xfffa0040
56#define ATMEL_BASE_TC2 0xfffa0080
57#define ATMEL_BASE_UDP0 0xfffa4000
58#define ATMEL_BASE_MCI 0xfffa8000
59#define ATMEL_BASE_TWI0 0xfffac000
60#define ATMEL_BASE_USART0 0xfffb0000
61#define ATMEL_BASE_USART1 0xfffb4000
62#define ATMEL_BASE_USART2 0xfffb8000
63#define ATMEL_BASE_SSC0 0xfffbc000
64#define ATMEL_BASE_SSC1 0xfffc0000
65#define ATMEL_BASE_SSC2 0xfffc4000
66#define ATMEL_BASE_SPI0 0xfffc8000
67#define ATMEL_BASE_SPI1 0xfffcc000
68/* Reserved: 0xfffc4000 - 0xffffe9ff */
Stelian Pop61e69d72008-05-08 20:52:22 +020069
70/*
Reinhard Meyer87b561b2010-11-19 10:04:37 +010071 * System Peripherals physical base addresses.
Stelian Pop61e69d72008-05-08 20:52:22 +020072 */
Reinhard Meyer87b561b2010-11-19 10:04:37 +010073#define ATMEL_BASE_SYS 0xffffea00
74#define ATMEL_BASE_SDRAMC 0xffffea00
75#define ATMEL_BASE_SMC 0xffffec00
76#define ATMEL_BASE_MATRIX 0xffffee00
77#define ATMEL_BASE_AIC 0xfffff000
78#define ATMEL_BASE_DBGU 0xfffff200
79#define ATMEL_BASE_PIOA 0xfffff400
80#define ATMEL_BASE_PIOB 0xfffff600
81#define ATMEL_BASE_PIOC 0xfffff800
82#define ATMEL_BASE_PMC 0xfffffc00
83#define ATMEL_BASE_RSTC 0xfffffd00
84#define ATMEL_BASE_SHDWN 0xfffffd10
85#define ATMEL_BASE_RTT 0xfffffd20
86#define ATMEL_BASE_PIT 0xfffffd30
87#define ATMEL_BASE_WDT 0xfffffd40
88#define ATMEL_BASE_GPBR 0xfffffd50
Stelian Pop61e69d72008-05-08 20:52:22 +020089
Stelian Pop61e69d72008-05-08 20:52:22 +020090/*
Reinhard Meyer87b561b2010-11-19 10:04:37 +010091 * Internal Memory common on all these SoCs
Stelian Pop61e69d72008-05-08 20:52:22 +020092 */
Reinhard Meyer87b561b2010-11-19 10:04:37 +010093#define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */
94#define ATMEL_SIZE_SRAM 0x00028000 /* Internal SRAM size (160Kb) */
Stelian Pop61e69d72008-05-08 20:52:22 +020095
Reinhard Meyer87b561b2010-11-19 10:04:37 +010096#define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */
Asen Dimov2be3b312011-07-26 01:23:39 +000097#define ATMEL_SIZE_ROM 0x00008000 /* Internal ROM size (32Kb) */
Stelian Pop61e69d72008-05-08 20:52:22 +020098
Reinhard Meyer87b561b2010-11-19 10:04:37 +010099#define ATMEL_BASE_UHP 0x00500000 /* USB Host controller */
100#define ATMEL_BASE_LCDC 0x00600000 /* LDC controller */
Stelian Pop61e69d72008-05-08 20:52:22 +0200101
102/*
Reinhard Meyer87b561b2010-11-19 10:04:37 +0100103 * External memory
Stelian Pop61e69d72008-05-08 20:52:22 +0200104 */
Reinhard Meyer87b561b2010-11-19 10:04:37 +0100105#define ATMEL_BASE_CS0 0x10000000 /* typically NOR */
106#define ATMEL_BASE_CS1 0x20000000 /* SDRAM */
107#define ATMEL_BASE_CS2 0x30000000
108#define ATMEL_BASE_CS3 0x40000000 /* typically NAND */
109#define ATMEL_BASE_CS4 0x50000000
110#define ATMEL_BASE_CS5 0x60000000
111#define ATMEL_BASE_CS6 0x70000000
112#define ATMEL_BASE_CS7 0x80000000
Stelian Pop61e69d72008-05-08 20:52:22 +0200113
Bo Shen568079a2015-02-04 15:53:01 +0800114/* Timer */
Tom Rini6a5dccc2022-11-16 13:10:41 -0500115#define CFG_SYS_TIMER_COUNTER 0xfffffd3c
Bo Shen568079a2015-02-04 15:53:01 +0800116
Reinhard Meyer87b561b2010-11-19 10:04:37 +0100117/*
118 * Other misc defines
119 */
120#define ATMEL_PIO_PORTS 3 /* theese SoCs have 3 PIO */
Asen Dimov2be3b312011-07-26 01:23:39 +0000121#define ATMEL_PMC_UHP AT91SAM926x_PMC_UHP
Eric Benard470a57b2011-06-06 22:48:27 +0000122#define ATMEL_BASE_PIO ATMEL_BASE_PIOA
Stelian Pop61e69d72008-05-08 20:52:22 +0200123
Jean-Christophe PLAGNIOL-VILLARDb21aa662009-05-31 12:44:46 +0200124/*
Reinhard Meyer87b561b2010-11-19 10:04:37 +0100125 * SoC specific defines
Jean-Christophe PLAGNIOL-VILLARDb21aa662009-05-31 12:44:46 +0200126 */
Reinhard Meyer87b561b2010-11-19 10:04:37 +0100127#if defined(CONFIG_AT91SAM9261)
128# define ATMEL_CPU_NAME "AT91SAM9261"
129#elif defined(CONFIG_AT91SAM9G10)
130# define ATMEL_CPU_NAME "AT91SAM9G10"
131#endif
Stelian Pop61e69d72008-05-08 20:52:22 +0200132
133#endif