Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 1 | /* |
Bin Meng | 7557405 | 2016-02-05 19:30:11 -0800 | [diff] [blame] | 2 | * U-Boot - Configuration file for BF537 STAMP board |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 3 | */ |
| 4 | |
| 5 | #ifndef __CONFIG_BF527_EZKIT_H__ |
| 6 | #define __CONFIG_BF527_EZKIT_H__ |
| 7 | |
Mike Frysinger | 18a407c | 2009-04-24 17:22:40 -0400 | [diff] [blame] | 8 | #include <asm/config-pre.h> |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 9 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 10 | /* |
| 11 | * Processor Settings |
| 12 | */ |
Mike Frysinger | 5b0c128 | 2010-12-23 14:58:37 -0500 | [diff] [blame] | 13 | #define CONFIG_BFIN_CPU bf527-0.0 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 14 | #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA |
| 15 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 16 | /* |
| 17 | * Clock Settings |
| 18 | * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV |
| 19 | * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV |
| 20 | */ |
| 21 | /* CONFIG_CLKIN_HZ is any value in Hz */ |
| 22 | #define CONFIG_CLKIN_HZ 25000000 |
| 23 | /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ |
| 24 | /* 1 = CLKIN / 2 */ |
| 25 | #define CONFIG_CLKIN_HALF 0 |
| 26 | /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ |
| 27 | /* 1 = bypass PLL */ |
| 28 | #define CONFIG_PLL_BYPASS 0 |
| 29 | /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ |
| 30 | /* Values can range from 0-63 (where 0 means 64) */ |
| 31 | #define CONFIG_VCO_MULT 21 |
| 32 | /* CCLK_DIV controls the core clock divider */ |
| 33 | /* Values can be 1, 2, 4, or 8 ONLY */ |
| 34 | #define CONFIG_CCLK_DIV 1 |
| 35 | /* SCLK_DIV controls the system clock divider */ |
| 36 | /* Values can range from 1-15 */ |
| 37 | #define CONFIG_SCLK_DIV 4 |
| 38 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 39 | /* |
| 40 | * Memory Settings |
| 41 | */ |
| 42 | #define CONFIG_MEM_ADD_WDTH 10 |
| 43 | #define CONFIG_MEM_SIZE 64 |
| 44 | |
| 45 | #define CONFIG_EBIU_SDRRC_VAL 0x03F6 |
| 46 | #define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS) |
| 47 | |
| 48 | #define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) |
| 49 | #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) |
| 50 | #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) |
| 51 | |
| 52 | #define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
| 53 | #define CONFIG_SYS_MALLOC_LEN (640 * 1024) |
| 54 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 55 | /* |
| 56 | * NAND Settings |
| 57 | * (can't be used same time as ethernet) |
| 58 | */ |
| 59 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) |
Mike Frysinger | 9344139 | 2009-11-11 17:29:35 -0500 | [diff] [blame] | 60 | # define CONFIG_BFIN_NFC |
| 61 | # define CONFIG_BFIN_NFC_BOOTROM_ECC |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 62 | #endif |
| 63 | #ifdef CONFIG_BFIN_NFC |
| 64 | #define CONFIG_BFIN_NFC_CTL_VAL 0x0033 |
| 65 | #define CONFIG_DRIVER_NAND_BFIN |
| 66 | #define CONFIG_SYS_NAND_BASE 0 /* not actually used */ |
| 67 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 68 | #endif |
| 69 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 70 | /* |
| 71 | * Network Settings |
| 72 | */ |
| 73 | #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ |
| 74 | !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) |
| 75 | #define ADI_CMDS_NETWORK 1 |
| 76 | #define CONFIG_BFIN_MAC |
| 77 | #define CONFIG_RMII |
| 78 | #define CONFIG_NETCONSOLE 1 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 79 | #endif |
| 80 | #define CONFIG_HOSTNAME bf527-ezkit |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 81 | |
| 82 | /* |
| 83 | * Flash Settings |
| 84 | */ |
| 85 | #define CONFIG_FLASH_CFI_DRIVER |
| 86 | #define CONFIG_SYS_FLASH_BASE 0x20000000 |
| 87 | #define CONFIG_SYS_FLASH_CFI |
| 88 | #define CONFIG_SYS_FLASH_PROTECTION |
| 89 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 90 | #define CONFIG_SYS_MAX_FLASH_SECT 259 |
| 91 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 92 | /* |
| 93 | * SPI Settings |
| 94 | */ |
| 95 | #define CONFIG_BFIN_SPI |
| 96 | #define CONFIG_ENV_SPI_MAX_HZ 30000000 |
Mike Frysinger | 9a440646 | 2009-06-14 22:29:35 -0400 | [diff] [blame] | 97 | #define CONFIG_SF_DEFAULT_SPEED 30000000 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 98 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 99 | /* |
| 100 | * Env Storage Settings |
| 101 | */ |
| 102 | #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) |
| 103 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
Mike Frysinger | 470ff86 | 2009-05-05 01:35:41 -0400 | [diff] [blame] | 104 | #define CONFIG_ENV_OFFSET 0x10000 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 105 | #define CONFIG_ENV_SIZE 0x2000 |
Mike Frysinger | 470ff86 | 2009-05-05 01:35:41 -0400 | [diff] [blame] | 106 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
Mike Frysinger | 9344139 | 2009-11-11 17:29:35 -0500 | [diff] [blame] | 107 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
| 108 | #elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) |
| 109 | #define CONFIG_ENV_IS_IN_NAND |
| 110 | #define CONFIG_ENV_OFFSET 0x40000 |
| 111 | #define CONFIG_ENV_SIZE 0x20000 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 112 | #else |
| 113 | #define CONFIG_ENV_IS_IN_FLASH |
| 114 | #define CONFIG_ENV_OFFSET 0x4000 |
| 115 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) |
| 116 | #define CONFIG_ENV_SIZE 0x2000 |
| 117 | #define CONFIG_ENV_SECT_SIZE 0x2000 |
Mike Frysinger | 45b57bd | 2009-07-21 22:17:36 -0400 | [diff] [blame] | 118 | #define CONFIG_ENV_IS_EMBEDDED_IN_LDR |
Mike Frysinger | 9344139 | 2009-11-11 17:29:35 -0500 | [diff] [blame] | 119 | #endif |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 120 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 121 | /* |
| 122 | * I2C Settings |
| 123 | */ |
Scott Jiang | 80d27fa | 2014-11-13 15:30:55 +0800 | [diff] [blame] | 124 | #define CONFIG_SYS_I2C |
Scott Jiang | 655761e | 2014-11-13 15:30:53 +0800 | [diff] [blame] | 125 | #define CONFIG_SYS_I2C_ADI |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 126 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 127 | /* |
| 128 | * USB Settings |
| 129 | */ |
| 130 | #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) |
Paul Kocialkowski | f34dfcb | 2015-08-04 17:04:06 +0200 | [diff] [blame] | 131 | #define CONFIG_USB_MUSB_HCD |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 132 | #define CONFIG_USB_BLACKFIN |
Paul Kocialkowski | f34dfcb | 2015-08-04 17:04:06 +0200 | [diff] [blame] | 133 | #define CONFIG_USB_MUSB_TIMEOUT 100000 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 134 | #endif |
| 135 | |
Sonic Zhang | ae26b40 | 2013-02-20 18:05:16 +0800 | [diff] [blame] | 136 | /* Don't waste time transferring a logo over the UART */ |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 137 | |
| 138 | /* |
Michael Hennerich | e962162 | 2009-12-10 09:19:21 +0000 | [diff] [blame] | 139 | * Video Settings |
| 140 | */ |
Sonic Zhang | ae26b40 | 2013-02-20 18:05:16 +0800 | [diff] [blame] | 141 | #ifdef CONFIG_VIDEO |
Wolfgang Denk | dc25d15 | 2010-10-04 19:58:00 +0200 | [diff] [blame] | 142 | #ifdef CONFIG_BF527_EZKIT_REV_2_1 |
Michael Hennerich | e962162 | 2009-12-10 09:19:21 +0000 | [diff] [blame] | 143 | # define CONFIG_LQ035Q1_SPI_BUS 0 |
| 144 | # define CONFIG_LQ035Q1_SPI_CS 7 |
Mike Frysinger | 05015c0 | 2012-02-03 20:44:54 -0500 | [diff] [blame] | 145 | # define CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI |
| 146 | #else |
| 147 | # define CONFIG_LQ035Q1_USE_RGB888_8_BIT_PPI |
| 148 | #endif |
| 149 | |
| 150 | #ifdef CONFIG_LQ035Q1_USE_RGB565_8_BIT_PPI |
| 151 | # define EASYLOGO_HEADER <asm/bfin_logo_rgb565_230x230_lzma.h> |
| 152 | #else |
| 153 | # define EASYLOGO_HEADER <asm/bfin_logo_230x230_lzma.h> |
Michael Hennerich | e962162 | 2009-12-10 09:19:21 +0000 | [diff] [blame] | 154 | #endif |
Sonic Zhang | ae26b40 | 2013-02-20 18:05:16 +0800 | [diff] [blame] | 155 | #endif /* CONFIG_VIDEO */ |
Michael Hennerich | e962162 | 2009-12-10 09:19:21 +0000 | [diff] [blame] | 156 | |
| 157 | /* |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 158 | * Misc Settings |
| 159 | */ |
| 160 | #define CONFIG_MISC_INIT_R |
| 161 | #define CONFIG_RTC_BFIN |
| 162 | #define CONFIG_UART_CONSOLE 1 |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 163 | |
| 164 | /* |
| 165 | * Pull in common ADI header for remaining command/environment setup |
| 166 | */ |
| 167 | #include <configs/bfin_adi_common.h> |
| 168 | |
Mike Frysinger | 3cced46 | 2008-10-12 20:59:12 -0400 | [diff] [blame] | 169 | #endif |