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git01.mediatek.com / filogic / uboot / 9344139e940bb8f11a76fc66501498f60951879d / . / include / configs / bf527-ezkit.h
blob: c7322b8ed35e6145279ebe3a389a82e81419a677 [file] [log] [blame]
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]1/*
2 * U-boot - Configuration file for BF537 STAMP board
3 */
4
5#ifndef __CONFIG_BF527_EZKIT_H__
6#define __CONFIG_BF527_EZKIT_H__
7
Mike Frysinger18a407c2009-04-24 17:22:40 -0400[diff] [blame]8#include <asm/config-pre.h>
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]9
10
11/*
12 * Processor Settings
13 */
14#define CONFIG_BFIN_CPU bf527-0.0
15#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA
16
17
18/*
19 * Clock Settings
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 */
23/* CONFIG_CLKIN_HZ is any value in Hz */
24#define CONFIG_CLKIN_HZ 25000000
25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26/* 1 = CLKIN / 2 */
27#define CONFIG_CLKIN_HALF 0
28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29/* 1 = bypass PLL */
30#define CONFIG_PLL_BYPASS 0
31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32/* Values can range from 0-63 (where 0 means 64) */
33#define CONFIG_VCO_MULT 21
34/* CCLK_DIV controls the core clock divider */
35/* Values can be 1, 2, 4, or 8 ONLY */
36#define CONFIG_CCLK_DIV 1
37/* SCLK_DIV controls the system clock divider */
38/* Values can range from 1-15 */
39#define CONFIG_SCLK_DIV 4
40
41
42/*
43 * Memory Settings
44 */
45#define CONFIG_MEM_ADD_WDTH 10
46#define CONFIG_MEM_SIZE 64
47
48#define CONFIG_EBIU_SDRRC_VAL 0x03F6
49#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS)
50
51#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL)
52#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL)
53#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL)
54
55#define CONFIG_SYS_MONITOR_LEN (768 * 1024)
56#define CONFIG_SYS_MALLOC_LEN (640 * 1024)
57
58
59/*
60 * NAND Settings
61 * (can't be used same time as ethernet)
62 */
63#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
Mike Frysinger93441392009-11-11 17:29:35 -0500[diff] [blame^]64# define CONFIG_BFIN_NFC
65# define CONFIG_BFIN_NFC_BOOTROM_ECC
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]66#endif
67#ifdef CONFIG_BFIN_NFC
68#define CONFIG_BFIN_NFC_CTL_VAL 0x0033
69#define CONFIG_DRIVER_NAND_BFIN
70#define CONFIG_SYS_NAND_BASE 0 /* not actually used */
71#define CONFIG_SYS_MAX_NAND_DEVICE 1
72#define NAND_MAX_CHIPS 1
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]73#endif
74
75
76/*
77 * Network Settings
78 */
79#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \
80 !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC)
81#define ADI_CMDS_NETWORK 1
82#define CONFIG_BFIN_MAC
83#define CONFIG_RMII
84#define CONFIG_NETCONSOLE 1
85#define CONFIG_NET_MULTI 1
86#endif
87#define CONFIG_HOSTNAME bf527-ezkit
88/* Uncomment next line to use fixed MAC address */
89/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
90
91
92/*
93 * Flash Settings
94 */
95#define CONFIG_FLASH_CFI_DRIVER
96#define CONFIG_SYS_FLASH_BASE 0x20000000
97#define CONFIG_SYS_FLASH_CFI
98#define CONFIG_SYS_FLASH_PROTECTION
99#define CONFIG_SYS_MAX_FLASH_BANKS 1
100#define CONFIG_SYS_MAX_FLASH_SECT 259
101
102
103/*
104 * SPI Settings
105 */
106#define CONFIG_BFIN_SPI
107#define CONFIG_ENV_SPI_MAX_HZ 30000000
Mike Frysinger9a4406462009-06-14 22:29:35 -0400[diff] [blame]108#define CONFIG_SF_DEFAULT_SPEED 30000000
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]109#define CONFIG_SPI_FLASH
110#define CONFIG_SPI_FLASH_STMICRO
111
112
113/*
114 * Env Storage Settings
115 */
116#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
117#define CONFIG_ENV_IS_IN_SPI_FLASH
Mike Frysinger470ff862009-05-05 01:35:41 -0400[diff] [blame]118#define CONFIG_ENV_OFFSET 0x10000
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]119#define CONFIG_ENV_SIZE 0x2000
Mike Frysinger470ff862009-05-05 01:35:41 -0400[diff] [blame]120#define CONFIG_ENV_SECT_SIZE 0x10000
Mike Frysinger93441392009-11-11 17:29:35 -0500[diff] [blame^]121#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
122#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND)
123#define CONFIG_ENV_IS_IN_NAND
124#define CONFIG_ENV_OFFSET 0x40000
125#define CONFIG_ENV_SIZE 0x20000
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]126#else
127#define CONFIG_ENV_IS_IN_FLASH
128#define CONFIG_ENV_OFFSET 0x4000
129#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
130#define CONFIG_ENV_SIZE 0x2000
131#define CONFIG_ENV_SECT_SIZE 0x2000
Mike Frysinger45b57bd2009-07-21 22:17:36 -0400[diff] [blame]132#define CONFIG_ENV_IS_EMBEDDED_IN_LDR
Mike Frysinger93441392009-11-11 17:29:35 -0500[diff] [blame^]133#endif
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]134
135
136/*
137 * I2C Settings
138 */
139#define CONFIG_BFIN_TWI_I2C 1
140#define CONFIG_HARD_I2C 1
141#define CONFIG_SYS_I2C_SPEED 50000
142#define CONFIG_SYS_I2C_SLAVE 0
143
144
145/*
146 * USB Settings
147 */
148#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__)
149#define CONFIG_USB
150#define CONFIG_MUSB_HCD
151#define CONFIG_USB_BLACKFIN
152#define CONFIG_USB_STORAGE
153#define CONFIG_MUSB_TIMEOUT 100000
154#endif
155
156
157/*
158 * Misc Settings
159 */
160#define CONFIG_MISC_INIT_R
161#define CONFIG_RTC_BFIN
162#define CONFIG_UART_CONSOLE 1
163
164/* Don't waste time transferring a logo over the UART */
165#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART)
166# define CONFIG_VIDEO
167#endif
168
169
170/*
171 * Pull in common ADI header for remaining command/environment setup
172 */
173#include <configs/bfin_adi_common.h>
174
Mike Frysinger3cced462008-10-12 20:59:12 -0400[diff] [blame]175#endif