Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 1 | /* |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 2 | * Copyright (C) 2010 Andreas Bießmann <biessmann.devel@googlemail.com> |
| 3 | * |
| 4 | * based on previous work by |
| 5 | * |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 6 | * Ulf Samuelsson <ulf@atmel.com> |
| 7 | * Rick Bronson <rick@efn.org> |
| 8 | * |
| 9 | * Configuration settings for the AT91RM9200EK board. |
| 10 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 11 | * SPDX-License-Identifier: GPL-2.0+ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 12 | */ |
| 13 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 14 | #ifndef __AT91RM9200EK_CONFIG_H__ |
| 15 | #define __AT91RM9200EK_CONFIG_H__ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 16 | |
Alexey Brodkin | 267d8e2 | 2014-02-26 17:47:58 +0400 | [diff] [blame] | 17 | #include <linux/sizes.h> |
Jens Scharsig | 128ecd0 | 2010-02-03 22:45:42 +0100 | [diff] [blame] | 18 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 19 | /* |
Andreas Bießmann | 334548e | 2010-11-30 09:45:03 +0000 | [diff] [blame] | 20 | * set some initial configurations depending on configure target |
| 21 | * |
| 22 | * at91rm9200ek_config -> boot from 0x0 in NOR Flash at CS0 |
| 23 | * at91rm9200ek_ram_config -> continue booting from 0x20100000 in RAM; lowlevel |
| 24 | * initialisation was done by some preloader |
| 25 | */ |
| 26 | #ifdef CONFIG_RAMBOOT |
| 27 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 28 | #define CONFIG_SYS_TEXT_BASE 0x20100000 |
| 29 | #else |
| 30 | #define CONFIG_SYS_TEXT_BASE 0x10000000 |
| 31 | #endif |
| 32 | |
| 33 | /* |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 34 | * AT91C_XTAL_CLOCK is the frequency of external xtal in hertz |
| 35 | * AT91C_MAIN_CLOCK is the frequency of PLLA output |
| 36 | * AT91C_MASTER_CLOCK is the peripherial clock |
| 37 | * CONFIG_SYS_HZ_CLOCK is the value for CCR in tc0 (divider 2 is implicitely |
| 38 | * set in arch/arm/cpu/arm920t/at91/timer.c) |
| 39 | * CONFIG_SYS_HZ is the tick rate for timer tc0 |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 40 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 41 | #define AT91C_XTAL_CLOCK 18432000 |
Andreas Bießmann | c2a1f0f | 2011-06-12 01:49:12 +0000 | [diff] [blame] | 42 | #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 43 | #define AT91C_MAIN_CLOCK ((AT91C_XTAL_CLOCK / 4) * 39) |
| 44 | #define AT91C_MASTER_CLOCK (AT91C_MAIN_CLOCK / 3 ) |
| 45 | #define CONFIG_SYS_HZ_CLOCK (AT91C_MASTER_CLOCK / 2) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 46 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 47 | /* CPU configuration */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 48 | #define CONFIG_AT91RM9200 |
| 49 | #define CONFIG_AT91RM9200EK |
| 50 | #define CONFIG_CPUAT91 |
| 51 | #define USE_920T_MMU |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 52 | |
Andreas Bießmann | c2a1f0f | 2011-06-12 01:49:12 +0000 | [diff] [blame] | 53 | #include <asm/hardware.h> /* needed for port definitions */ |
| 54 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 55 | #define CONFIG_CMDLINE_TAG |
| 56 | #define CONFIG_SETUP_MEMORY_TAGS |
| 57 | #define CONFIG_INITRD_TAG |
| 58 | |
Andreas Bießmann | f9d3f91 | 2011-06-12 01:49:14 +0000 | [diff] [blame] | 59 | #define CONFIG_BOARD_EARLY_INIT_F |
| 60 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 61 | /* |
| 62 | * Memory Configuration |
| 63 | */ |
| 64 | #define CONFIG_NR_DRAM_BANKS 1 |
| 65 | #define CONFIG_SYS_SDRAM_BASE 0x20000000 |
| 66 | #define CONFIG_SYS_SDRAM_SIZE SZ_32M |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 67 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 68 | #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
| 69 | #define CONFIG_SYS_MEMTEST_END \ |
| 70 | (CONFIG_SYS_MEMTEST_START + CONFIG_SYS_SDRAM_SIZE - SZ_256K) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 71 | |
| 72 | /* |
| 73 | * LowLevel Init |
| 74 | */ |
| 75 | #ifndef CONFIG_SKIP_LOWLEVEL_INIT |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 76 | #define CONFIG_SYS_USE_MAIN_OSCILLATOR |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 77 | /* flash */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 78 | #define CONFIG_SYS_EBI_CFGR_VAL 0x00000000 |
| 79 | #define CONFIG_SYS_SMC_CSR0_VAL 0x00003284 /* 16bit, 2 TDF, 4 WS */ |
| 80 | |
| 81 | /* clocks */ |
| 82 | #define CONFIG_SYS_PLLAR_VAL 0x20263E04 /* 179.712000 MHz for PCK */ |
| 83 | #define CONFIG_SYS_PLLBR_VAL 0x10483E0E /* 48.054857 MHz (divider by 2 for USB) */ |
| 84 | /* PCK/3 = MCK Master Clock = 59.904000MHz from PLLA */ |
| 85 | #define CONFIG_SYS_MCKR_VAL 0x00000202 |
| 86 | |
| 87 | /* sdram */ |
| 88 | #define CONFIG_SYS_PIOC_ASR_VAL 0xFFFF0000 /* Configure PIOC as peripheral (D16/D31) */ |
| 89 | #define CONFIG_SYS_PIOC_BSR_VAL 0x00000000 |
| 90 | #define CONFIG_SYS_PIOC_PDR_VAL 0xFFFF0000 |
| 91 | #define CONFIG_SYS_EBI_CSA_VAL 0x00000002 /* CS1=CONFIG_SYS_SDRAM */ |
| 92 | #define CONFIG_SYS_SDRC_CR_VAL 0x2188c155 /* set up the CONFIG_SYS_SDRAM */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 93 | #define CONFIG_SYS_SDRAM CONFIG_SYS_SDRAM_BASE /* address of the SDRAM */ |
Andreas Bießmann | 309aeaf | 2010-12-04 11:31:46 +0000 | [diff] [blame] | 94 | #define CONFIG_SYS_SDRAM1 (CONFIG_SYS_SDRAM_BASE+0x80) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 95 | #define CONFIG_SYS_SDRAM_VAL 0x00000000 /* value written to CONFIG_SYS_SDRAM */ |
| 96 | #define CONFIG_SYS_SDRC_MR_VAL 0x00000002 /* Precharge All */ |
| 97 | #define CONFIG_SYS_SDRC_MR_VAL1 0x00000004 /* refresh */ |
| 98 | #define CONFIG_SYS_SDRC_MR_VAL2 0x00000003 /* Load Mode Register */ |
| 99 | #define CONFIG_SYS_SDRC_MR_VAL3 0x00000000 /* Normal Mode */ |
| 100 | #define CONFIG_SYS_SDRC_TR_VAL 0x000002E0 /* Write refresh rate */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 101 | #endif /* CONFIG_SKIP_LOWLEVEL_INIT */ |
| 102 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 103 | /* |
| 104 | * Hardware drivers |
| 105 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 106 | /* |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 107 | * Choose a USART for serial console |
| 108 | * CONFIG_DBGU is DBGU unit on J10 |
| 109 | * CONFIG_USART1 is USART1 on J14 |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 110 | */ |
Andreas Bießmann | f9d3f91 | 2011-06-12 01:49:14 +0000 | [diff] [blame] | 111 | #define CONFIG_ATMEL_USART |
| 112 | #define CONFIG_USART_BASE ATMEL_BASE_DBGU |
| 113 | #define CONFIG_USART_ID 0/* ignored in arm */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 114 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 115 | #define CONFIG_BAUDRATE 115200 |
| 116 | |
| 117 | /* |
| 118 | * Command line configuration. |
| 119 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 120 | |
| 121 | /* |
| 122 | * Network Driver Setting |
| 123 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 124 | #define CONFIG_DRIVER_AT91EMAC |
| 125 | #define CONFIG_SYS_RX_ETH_BUFFER 16 |
| 126 | #define CONFIG_RMII |
| 127 | #define CONFIG_MII |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 128 | |
| 129 | /* |
| 130 | * NOR Flash |
| 131 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 132 | #define CONFIG_FLASH_CFI_DRIVER |
| 133 | #define CONFIG_SYS_FLASH_CFI |
| 134 | #define CONFIG_SYS_FLASH_BASE 0x10000000 |
| 135 | #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE |
| 136 | #define PHYS_FLASH_SIZE SZ_8M |
| 137 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 138 | #define CONFIG_SYS_MAX_FLASH_SECT 256 |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 139 | #define CONFIG_SYS_FLASH_PROTECTION |
| 140 | |
| 141 | /* |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 142 | * USB Config |
| 143 | */ |
| 144 | #define CONFIG_USB_ATMEL 1 |
Bo Shen | 4a985df | 2013-10-21 16:14:00 +0800 | [diff] [blame] | 145 | #define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 146 | #define CONFIG_USB_OHCI_NEW 1 |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 147 | #define CONFIG_DOS_PARTITION 1 |
| 148 | |
| 149 | #define CONFIG_SYS_USB_OHCI_CPU_INIT 1 |
Jens Scharsig | 58aa563 | 2011-02-19 06:17:02 +0000 | [diff] [blame] | 150 | #define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_USB_HOST_BASE |
Andreas Bießmann | 0058d82 | 2010-10-18 22:58:31 +0200 | [diff] [blame] | 151 | #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91rm9200" |
| 152 | #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15 |
| 153 | |
| 154 | /* |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 155 | * Environment Settings |
| 156 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 157 | #define CONFIG_ENV_IS_IN_FLASH |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 158 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 159 | /* |
| 160 | * after u-boot.bin |
| 161 | */ |
| 162 | #define CONFIG_ENV_ADDR \ |
| 163 | (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 164 | #define CONFIG_ENV_SIZE SZ_64K /* sectors are 64K here */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 165 | /* The following #defines are needed to get flash environment right */ |
| 166 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 167 | #define CONFIG_SYS_MONITOR_LEN SZ_256K |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 168 | |
| 169 | /* |
| 170 | * Boot option |
| 171 | */ |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 172 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 173 | /* default load address */ |
| 174 | #define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + SZ_16M |
| 175 | #define CONFIG_ENV_OVERWRITE |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 176 | |
| 177 | /* |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 178 | * Shell Settings |
| 179 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 180 | #define CONFIG_CMDLINE_EDITING |
| 181 | #define CONFIG_SYS_LONGHELP |
| 182 | #define CONFIG_AUTO_COMPLETE |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 183 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 184 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 185 | /* Print Buffer Size */ |
| 186 | #define CONFIG_SYS_PBSIZE \ |
| 187 | (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 188 | |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 189 | /* |
| 190 | * Size of malloc() pool |
| 191 | */ |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 192 | #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + SZ_128K, \ |
| 193 | SZ_4K) |
Ulf Samuelsson | 07f9b4e | 2009-03-27 23:26:43 +0100 | [diff] [blame] | 194 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 195 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + SZ_4K \ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 196 | - GENERATED_GBL_DATA_SIZE) |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 197 | |
Andreas Bießmann | 65c6567 | 2010-10-18 22:58:29 +0200 | [diff] [blame] | 198 | #endif /* __AT91RM9200EK_CONFIG_H__ */ |