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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +09002/*
Masahiro Yamada3a67e9d2017-01-15 14:59:07 +09003 * Copyright (C) 2011-2014 Panasonic Corporation
4 * Copyright (C) 2015-2016 Socionext Inc.
5 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +09006 */
7
Masahiro Yamada663a23f2015-05-29 17:30:00 +09008#include <linux/io.h>
Masahiro Yamadaefdf3402016-01-09 01:51:13 +09009
10#include "../init.h"
11#include "bcu-regs.h"
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090012
13#define ch(x) ((x) >= 32 ? 0 : (x) < 0 ? 0x11111111 : 0x11111111 << (x))
14
Masahiro Yamada3a67e9d2017-01-15 14:59:07 +090015void uniphier_ld4_bcu_init(const struct uniphier_board_data *bd)
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090016{
17 int shift;
18
19 writel(0x44444444, BCSCR0); /* 0x20000000-0x3fffffff: ASM bus */
20 writel(0x11111111, BCSCR2); /* 0x80000000-0x9fffffff: IPPC/IPPD-bus */
21 writel(0x11111111, BCSCR3); /* 0xa0000000-0xbfffffff: IPPC/IPPD-bus */
22 writel(0x11111111, BCSCR4); /* 0xc0000000-0xdfffffff: IPPC/IPPD-bus */
23 writel(0x11111111, BCSCR5); /* 0xe0000000-0Xffffffff: IPPC/IPPD-bus */
24
25 /* Specify DDR channel */
Masahiro Yamada3dc80972017-02-05 10:52:12 +090026 shift = bd->dram_ch[0].size / 0x04000000 * 4;
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090027 writel(ch(shift), BCIPPCCHR2); /* 0x80000000-0x9fffffff */
28
29 shift -= 32;
30 writel(ch(shift), BCIPPCCHR3); /* 0xa0000000-0xbfffffff */
31
32 shift -= 32;
33 writel(ch(shift), BCIPPCCHR4); /* 0xc0000000-0xdfffffff */
Masahiro Yamadabb2ff9d2014-10-03 19:21:06 +090034}