blob: a5cba1cf2a766680e3e1b8ab6290bee2aa8a0191 [file] [log] [blame]
wdenk591dda52002-11-18 00:14:45 +00001/*
Bin Meng8c5acf42014-12-12 21:05:22 +08002 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00003 *
Graeme Russ45fc1d82011-04-13 19:43:26 +10004 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02008 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +00009 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
wdenk591dda52002-11-18 00:14:45 +000011 */
12
wdenk591dda52002-11-18 00:14:45 +000013#include <config.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110014#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070015#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110016#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110017#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110018#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080019#include <generated/asm-offsets.h>
wdenk591dda52002-11-18 00:14:45 +000020
Simon Glassb4ded742016-03-16 07:44:40 -060021/*
22 * Define this to boot U-Boot from a 32-bit program which sets the GDT
23 * differently. This can be used to boot directly from any stage of coreboot,
24 * for example, bypassing the normal payload-loading feature.
25 * This is only useful for development.
26 */
27#undef LOAD_FROM_32_BIT
28
wdenk591dda52002-11-18 00:14:45 +000029.section .text
30.code32
31.globl _start
wdenk57b2d802003-06-27 21:31:46 +000032.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100033.globl _x86boot_start
34_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100035 /*
Simon Glass611f7492015-07-31 09:31:25 -060036 * This is the fail-safe 32-bit bootstrap entry point.
37 *
38 * This code is used when booting from another boot loader like
39 * coreboot or EFI. So we repeat some of the same init found in
40 * start16.
Graeme Russ8accbb92010-04-24 00:05:42 +100041 */
42 cli
43 cld
44
Graeme Russc379b5d2011-11-08 02:33:23 +000045 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100046 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110047 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100048 movl %eax, %cr0
49 wbinvd
50
Gabe Blackef899322012-11-03 11:41:28 +000051 /* Tell 32-bit code it is being entered from an in-RAM copy */
Simon Glass5d18dc92015-07-31 09:31:28 -060052 movl $GD_FLG_WARM_BOOT, %ebx
Simon Glassf95ad8c2015-08-04 12:33:57 -060053
54 /*
55 * Zero the BIST (Built-In Self Test) value since we don't have it.
56 * It must be 0 or the previous loader would have reported an error.
57 */
58 movl $0, %ebp
59
Gabe Blackef899322012-11-03 11:41:28 +000060 jmp 1f
Simon Glass5d18dc92015-07-31 09:31:28 -060061
62 /* Add a way for tools to discover the _start entry point */
63 .align 4
64 .long 0x12345678
wdenk57b2d802003-06-27 21:31:46 +000065_start:
Gabe Blackef899322012-11-03 11:41:28 +000066 /*
Simon Glass611f7492015-07-31 09:31:25 -060067 * This is the 32-bit cold-reset entry point, coming from start16.
Simon Glass5d18dc92015-07-31 09:31:28 -060068 * Set %ebx to GD_FLG_COLD_BOOT to indicate this.
Gabe Blackef899322012-11-03 11:41:28 +000069 */
Simon Glass5d18dc92015-07-31 09:31:28 -060070 movl $GD_FLG_COLD_BOOT, %ebx
Simon Glassf95ad8c2015-08-04 12:33:57 -060071
Simon Glass1f4476c2014-11-06 13:20:10 -070072 /* Save BIST */
73 movl %eax, %ebp
Simon Glassf95ad8c2015-08-04 12:33:57 -0600741:
75
76 /* Save table pointer */
77 movl %ecx, %esi
Graeme Russ8accbb92010-04-24 00:05:42 +100078
Simon Glassb4ded742016-03-16 07:44:40 -060079#ifdef LOAD_FROM_32_BIT
80 lgdt gdt_ptr2
81#endif
82
Simon Glass611f7492015-07-31 09:31:25 -060083 /* Load the segement registers to match the GDT loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110084 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110085 movw %ax, %fs
86 movw %ax, %ds
87 movw %ax, %gs
88 movw %ax, %es
89 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000090
Mike Williamsbf895ad2011-07-22 04:01:30 +000091 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100092 lidt blank_idt_ptr
93
Simon Glass611f7492015-07-31 09:31:25 -060094 /*
95 * Critical early platform init - generally not used, we prefer init
96 * to happen later when we have a console, in case something goes
97 * wrong.
98 */
wdenk591dda52002-11-18 00:14:45 +000099 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +1100100.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +0000101early_board_init_ret:
Simon Glass245561d2014-11-12 22:42:09 -0700102 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +0000103
Graeme Russbc761932011-02-12 15:11:52 +1100104 /* Initialise Cache-As-RAM */
105 jmp car_init
106.globl car_init_ret
107car_init_ret:
Bin Meng005f0af2014-12-12 21:05:31 +0800108#ifndef CONFIG_HAVE_FSP
Graeme Russbc761932011-02-12 15:11:52 +1100109 /*
110 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
111 * or fully initialised SDRAM - we really don't care which)
112 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass611f7492015-07-31 09:31:25 -0600113 * and early malloc() area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -0700114 *
115 * Stack grows down from top of CAR. We have:
116 *
117 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -0700118 * MRC area
Simon Glass0e27b872015-08-10 20:44:32 -0600119 * global_data with x86 global descriptor table
Simon Glassa4fd0db2014-11-06 13:20:04 -0700120 * early malloc area
121 * stack
122 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +1100123 */
Simon Glass268eefd2014-11-12 22:42:28 -0700124 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
125#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
126 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
127#endif
Bin Meng005f0af2014-12-12 21:05:31 +0800128#else
129 /*
Bin Meng73574dc2015-08-20 06:40:20 -0700130 * U-Boot enters here twice. For the first time it comes from
131 * car_init_done() with esp points to a temporary stack and esi
132 * set to zero. For the second time it comes from fsp_init_done()
133 * with esi holding the HOB list address returned by the FSP.
Bin Meng005f0af2014-12-12 21:05:31 +0800134 */
135#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600136 /* Set up global data */
137 mov %esp, %eax
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100138 call board_init_f_alloc_reserve
Simon Glass0e27b872015-08-10 20:44:32 -0600139 mov %eax, %esp
Albert ARIBAUD6cb4c462015-11-25 17:56:32 +0100140 call board_init_f_init_reserve
Graeme Russ007818a2012-11-27 15:38:36 +0000141
Simon Glass47730122015-10-18 19:51:26 -0600142#ifdef CONFIG_DEBUG_UART
143 call debug_uart_init
144#endif
Simon Glass9bbb37f2015-08-02 18:07:21 -0600145
Simon Glass0e27b872015-08-10 20:44:32 -0600146 /* Get address of global_data */
147 mov %fs:0, %edx
Bin Meng005f0af2014-12-12 21:05:31 +0800148#ifdef CONFIG_HAVE_FSP
Simon Glass0e27b872015-08-10 20:44:32 -0600149 /* Store the HOB list if we have one */
Bin Mengd560c5c2015-06-07 11:33:14 +0800150 test %esi, %esi
151 jz skip_hob
Simon Glass0e27b872015-08-10 20:44:32 -0600152 movl %esi, GD_HOB_LIST(%edx)
Bin Meng005f0af2014-12-12 21:05:31 +0800153
Bin Meng12440cd2015-08-20 06:40:19 -0700154 /*
155 * After fsp_init() returns, the stack has already been switched to a
156 * place within system memory as defined by CONFIG_FSP_TEMP_RAM_ADDR.
157 * Enlarge the size of malloc() pool before relocation since we have
158 * plenty of memory now.
159 */
160 subl $CONFIG_FSP_SYS_MALLOC_F_LEN, %esp
161 movl %esp, GD_MALLOC_BASE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800162skip_hob:
Simon Glassf95ad8c2015-08-04 12:33:57 -0600163#else
164 /* Store table pointer */
Simon Glass0e27b872015-08-10 20:44:32 -0600165 movl %esi, GD_TABLE(%edx)
Bin Mengd560c5c2015-06-07 11:33:14 +0800166#endif
Simon Glass0e27b872015-08-10 20:44:32 -0600167 /* Store BIST */
168 movl %ebp, GD_BIST(%edx)
Graeme Russ35368962011-12-31 22:58:15 +1100169
Graeme Russ38183932011-02-12 15:11:54 +1100170 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700171 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000172 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100173
Simon Glass611f7492015-07-31 09:31:25 -0600174 /* Enter, U-Boot! */
Graeme Russ45fc1d82011-04-13 19:43:26 +1000175 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000176
177 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000178 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100179 jmp die
180
Graeme Russd7755b42012-01-01 15:06:39 +1100181.globl board_init_f_r_trampoline
182.type board_init_f_r_trampoline, @function
183board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100184 /*
185 * SDRAM has been initialised, U-Boot code has been copied into
186 * RAM, BSS has been cleared and relocation adjustments have been
187 * made. It is now time to jump into the in-RAM copy of U-Boot
188 *
Graeme Russd7755b42012-01-01 15:06:39 +1100189 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100190 */
191
Graeme Russ007818a2012-11-27 15:38:36 +0000192 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100193 movl %eax, %esp
194
Simon Glass0e27b872015-08-10 20:44:32 -0600195 /* See if we need to disable CAR */
Simon Glass78da72c2015-01-01 16:18:13 -0700196.weak car_uninit
197 movl $car_uninit, %eax
198 cmpl $0, %eax
199 jz 1f
200
201 call car_uninit
2021:
Simon Glass611f7492015-07-31 09:31:25 -0600203 /* Re-enter U-Boot by calling board_init_f_r() */
Graeme Russd7755b42012-01-01 15:06:39 +1100204 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100205
Graeme Russc379b5d2011-11-08 02:33:23 +0000206die:
207 hlt
wdenk591dda52002-11-18 00:14:45 +0000208 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000209 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000210
211blank_idt_ptr:
212 .word 0 /* limit */
213 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000214
215 .p2align 2 /* force 4-byte alignment */
216
Simon Glass611f7492015-07-31 09:31:25 -0600217 /* Add a multiboot header so U-Boot can be loaded by GRUB2 */
Graeme Russ786c3952011-11-08 02:33:19 +0000218multiboot_header:
219 /* magic */
Simon Glass611f7492015-07-31 09:31:25 -0600220 .long 0x1badb002
Graeme Russ786c3952011-11-08 02:33:19 +0000221 /* flags */
222 .long (1 << 16)
223 /* checksum */
224 .long -0x1BADB002 - (1 << 16)
225 /* header addr */
226 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
227 /* load addr */
228 .long CONFIG_SYS_TEXT_BASE
229 /* load end addr */
230 .long 0
231 /* bss end addr */
232 .long 0
233 /* entry addr */
234 .long CONFIG_SYS_TEXT_BASE
Simon Glassb4ded742016-03-16 07:44:40 -0600235
236#ifdef LOAD_FROM_32_BIT
237 /*
238 * The following Global Descriptor Table is just enough to get us into
239 * 'Flat Protected Mode' - It will be discarded as soon as the final
240 * GDT is setup in a safe location in RAM
241 */
242gdt_ptr2:
243 .word 0x1f /* limit (31 bytes = 4 GDT entries - 1) */
244 .long gdt_rom2 /* base */
245
246 /* Some CPUs are picky about GDT alignment... */
247 .align 16
248.globl gdt_rom2
249gdt_rom2:
250 /*
251 * The GDT table ...
252 *
253 * Selector Type
254 * 0x00 NULL
255 * 0x08 Unused
256 * 0x10 32bit code
257 * 0x18 32bit data/stack
258 */
259 /* The NULL Desciptor - Mandatory */
260 .word 0x0000 /* limit_low */
261 .word 0x0000 /* base_low */
262 .byte 0x00 /* base_middle */
263 .byte 0x00 /* access */
264 .byte 0x00 /* flags + limit_high */
265 .byte 0x00 /* base_high */
266
267 /* Unused Desciptor - (matches Linux) */
268 .word 0x0000 /* limit_low */
269 .word 0x0000 /* base_low */
270 .byte 0x00 /* base_middle */
271 .byte 0x00 /* access */
272 .byte 0x00 /* flags + limit_high */
273 .byte 0x00 /* base_high */
274
275 /*
276 * The Code Segment Descriptor:
277 * - Base = 0x00000000
278 * - Size = 4GB
279 * - Access = Present, Ring 0, Exec (Code), Readable
280 * - Flags = 4kB Granularity, 32-bit
281 */
282 .word 0xffff /* limit_low */
283 .word 0x0000 /* base_low */
284 .byte 0x00 /* base_middle */
285 .byte 0x9b /* access */
286 .byte 0xcf /* flags + limit_high */
287 .byte 0x00 /* base_high */
288
289 /*
290 * The Data Segment Descriptor:
291 * - Base = 0x00000000
292 * - Size = 4GB
293 * - Access = Present, Ring 0, Non-Exec (Data), Writable
294 * - Flags = 4kB Granularity, 32-bit
295 */
296 .word 0xffff /* limit_low */
297 .word 0x0000 /* base_low */
298 .byte 0x00 /* base_middle */
299 .byte 0x93 /* access */
300 .byte 0xcf /* flags + limit_high */
301 .byte 0x00 /* base_high */
302#endif