Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2011-2012 |
Pali Rohár | 10a953d | 2020-04-01 00:35:08 +0200 | [diff] [blame] | 4 | * Pali Rohár <pali@kernel.org> |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 5 | * |
| 6 | * (C) Copyright 2010 |
| 7 | * Alistair Buxton <a.j.buxton@gmail.com> |
| 8 | * |
| 9 | * Derived from Beagle Board code: |
| 10 | * (C) Copyright 2006-2008 |
| 11 | * Texas Instruments. |
| 12 | * Richard Woodruff <r-woodruff2@ti.com> |
| 13 | * Syed Mohammed Khasim <x0khasim@ti.com> |
| 14 | * |
| 15 | * Configuration settings for the Nokia RX-51 aka N900. |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 16 | */ |
| 17 | |
| 18 | #ifndef __CONFIG_H |
| 19 | #define __CONFIG_H |
| 20 | |
| 21 | /* |
| 22 | * High Level Configuration Options |
| 23 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 24 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 25 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame] | 26 | #include <asm/arch/omap.h> |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 27 | #include <asm/arch/mem.h> |
| 28 | #include <linux/stringify.h> |
| 29 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 30 | /* Clock Defines */ |
| 31 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 32 | #define V_SCLK (V_OSCK >> 1) |
| 33 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 34 | /* |
| 35 | * Hardware drivers |
| 36 | */ |
| 37 | |
| 38 | /* |
| 39 | * NS16550 Configuration |
| 40 | */ |
| 41 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 42 | |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 43 | #define CFG_SYS_NS16550_CLK V_NS16550_CLK |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 44 | |
| 45 | /* |
| 46 | * select serial console configuration |
| 47 | */ |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 48 | #define CFG_SYS_NS16550_COM3 OMAP34XX_UART3 |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 49 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 50 | #define CFG_SYS_BAUDRATE_TABLE { 4800, 9600, 19200, 38400, 57600, 115200 } |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 51 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 52 | #define GPIO_SLIDE 71 |
| 53 | |
| 54 | /* |
| 55 | * Board ONENAND Info. |
| 56 | */ |
| 57 | |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 58 | #define CFG_SYS_ONENAND_BASE ONENAND_MAP |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 59 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 60 | /* Environment information */ |
Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 61 | #define CFG_EXTRA_ENV_SETTINGS \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 62 | "usbtty=cdc_acm\0" \ |
Pali Rohár | 54a3014 | 2022-02-03 19:38:50 +0100 | [diff] [blame] | 63 | "stdin=usbtty,serial,keyboard\0" \ |
Pali Rohár | 1d701a5 | 2022-03-09 20:46:01 +0100 | [diff] [blame] | 64 | "stdout=usbtty,serial,vidconsole\0" \ |
| 65 | "stderr=usbtty,serial,vidconsole\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 66 | "slide=gpio input " __stringify(GPIO_SLIDE) "\0" \ |
| 67 | "switchmmc=mmc dev ${mmcnum}\0" \ |
| 68 | "kernaddr=0x82008000\0" \ |
| 69 | "initrdaddr=0x84008000\0" \ |
| 70 | "scriptaddr=0x86008000\0" \ |
Pali Rohár | 0dff39f | 2022-11-20 17:56:28 +0100 | [diff] [blame] | 71 | "fileloadaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 72 | "fileload=${mmctype}load mmc ${mmcnum}:${mmcpart} " \ |
Pali Rohár | 0dff39f | 2022-11-20 17:56:28 +0100 | [diff] [blame] | 73 | "${fileloadaddr} ${mmcfile}\0" \ |
| 74 | "kernload=setenv fileloadaddr ${kernaddr};" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 75 | "setenv mmcfile ${mmckernfile};" \ |
| 76 | "run fileload\0" \ |
Pali Rohár | 0dff39f | 2022-11-20 17:56:28 +0100 | [diff] [blame] | 77 | "initrdload=setenv fileloadaddr ${initrdaddr};" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 78 | "setenv mmcfile ${mmcinitrdfile};" \ |
| 79 | "run fileload\0" \ |
Pali Rohár | 0dff39f | 2022-11-20 17:56:28 +0100 | [diff] [blame] | 80 | "scriptload=setenv fileloadaddr ${scriptaddr};" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 81 | "setenv mmcfile ${mmcscriptfile};" \ |
| 82 | "run fileload\0" \ |
| 83 | "scriptboot=echo Running ${mmcscriptfile} from mmc " \ |
| 84 | "${mmcnum}:${mmcpart} ...; source ${scriptaddr}\0" \ |
| 85 | "kernboot=echo Booting ${mmckernfile} from mmc " \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 86 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} || " \ |
| 87 | "bootz ${kernaddr}\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 88 | "kerninitrdboot=echo Booting ${mmckernfile} ${mmcinitrdfile} from mmc "\ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 89 | "${mmcnum}:${mmcpart} ...; bootm ${kernaddr} ${initrdaddr} || " \ |
| 90 | "bootz ${kernaddr} ${initrdaddr}\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 91 | "attachboot=echo Booting attached kernel image ...;" \ |
| 92 | "setenv setup_omap_atag 1;" \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 93 | "bootm ${attkernaddr} || bootz ${attkernaddr};" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 94 | "setenv setup_omap_atag\0" \ |
Pali Rohár | 5e0f513 | 2021-06-18 15:27:04 +0200 | [diff] [blame] | 95 | "trymmcscriptboot=run switchmmc && run scriptload && run scriptboot\0" \ |
| 96 | "trymmckernboot=run switchmmc && run kernload && run kernboot\0" \ |
| 97 | "trymmckerninitrdboot=run switchmmc && run initrdload && " \ |
| 98 | "run kernload && run kerninitrdboot\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 99 | "trymmcpartboot=setenv mmcscriptfile boot.scr; run trymmcscriptboot;" \ |
Pali Rohár | 0a8825c | 2021-06-18 15:27:03 +0200 | [diff] [blame] | 100 | "setenv mmckernfile uImage; run trymmckernboot;" \ |
| 101 | "setenv mmckernfile zImage; run trymmckernboot\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 102 | "trymmcallpartboot=setenv mmcpart 1; run trymmcpartboot;" \ |
| 103 | "setenv mmcpart 2; run trymmcpartboot;" \ |
| 104 | "setenv mmcpart 3; run trymmcpartboot;" \ |
| 105 | "setenv mmcpart 4; run trymmcpartboot\0" \ |
| 106 | "trymmcboot=if run switchmmc; then " \ |
| 107 | "setenv mmctype fat;" \ |
| 108 | "run trymmcallpartboot;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 109 | "setenv mmctype ext4;" \ |
| 110 | "run trymmcallpartboot;" \ |
| 111 | "fi\0" \ |
| 112 | "emmcboot=setenv mmcnum 1; run trymmcboot\0" \ |
| 113 | "sdboot=setenv mmcnum 0; run trymmcboot\0" \ |
Pali Rohár | 5e0f513 | 2021-06-18 15:27:04 +0200 | [diff] [blame] | 114 | "trymmcbootmenu=setenv mmctype fat && run trymmcscriptboot || " \ |
| 115 | "setenv mmctype ext4 && run trymmcscriptboot\0" \ |
| 116 | "preboot=setenv mmcpart 1; setenv mmcscriptfile bootmenu.scr;" \ |
| 117 | "setenv mmcnum 0 && run trymmcbootmenu || " \ |
| 118 | "setenv mmcnum 1 && run trymmcbootmenu;" \ |
Pali Rohár | 6f52aee | 2020-04-01 00:35:11 +0200 | [diff] [blame] | 119 | "if run slide; then true; else " \ |
| 120 | "setenv bootmenu_delay 0;" \ |
| 121 | "setenv bootdelay 0;" \ |
| 122 | "fi\0" \ |
Pali Rohár | 13eb3e4 | 2013-03-07 05:15:19 +0000 | [diff] [blame] | 123 | "menucmd=bootmenu\0" \ |
| 124 | "bootmenu_0=Attached kernel=run attachboot\0" \ |
| 125 | "bootmenu_1=Internal eMMC=run emmcboot\0" \ |
| 126 | "bootmenu_2=External SD card=run sdboot\0" \ |
| 127 | "bootmenu_3=U-Boot boot order=boot\0" \ |
| 128 | "bootmenu_delay=30\0" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 129 | "" |
| 130 | |
Tom Rini | e510a3f | 2022-12-04 10:13:33 -0500 | [diff] [blame] | 131 | #define CFG_POSTBOOTMENU \ |
Pali Rohár | 13eb3e4 | 2013-03-07 05:15:19 +0000 | [diff] [blame] | 132 | "echo;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 133 | "echo Extra commands:;" \ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 134 | "echo run sdboot - Boot from SD card slot.;" \ |
| 135 | "echo run emmcboot - Boot internal eMMC memory.;" \ |
| 136 | "echo run attachboot - Boot attached kernel image.;" \ |
| 137 | "echo" |
| 138 | |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 139 | /* |
| 140 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 141 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 142 | * This rate is divided by a local divisor. |
| 143 | */ |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 144 | #define CFG_SYS_TIMERBASE (OMAP34XX_GPT2) |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 145 | |
| 146 | /* |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 147 | * Physical Memory Map |
| 148 | */ |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 149 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
| 150 | |
| 151 | /* |
| 152 | * FLASH and environment organization |
| 153 | */ |
| 154 | |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 155 | #define CFG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
Tom Rini | 6a5dccc | 2022-11-16 13:10:41 -0500 | [diff] [blame] | 156 | #define CFG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 157 | #define CFG_SYS_INIT_RAM_SIZE 0x800 |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 158 | |
| 159 | /* |
| 160 | * Attached kernel image |
| 161 | */ |
| 162 | |
| 163 | #define SDRAM_SIZE 0x10000000 /* 256 MB */ |
Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 164 | #define SDRAM_END (CFG_SYS_SDRAM_BASE + SDRAM_SIZE) |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 165 | |
| 166 | #define IMAGE_MAXSIZE 0x1FF800 /* 2 MB - 2 kB */ |
| 167 | #define KERNEL_OFFSET 0x40000 /* 256 kB */ |
| 168 | #define KERNEL_MAXSIZE (IMAGE_MAXSIZE-KERNEL_OFFSET) |
| 169 | #define KERNEL_ADDRESS (SDRAM_END-KERNEL_MAXSIZE) |
| 170 | |
| 171 | /* Reserve protected RAM for attached kernel */ |
Tom Rini | 0bb9b09 | 2022-12-04 10:13:37 -0500 | [diff] [blame] | 172 | #define CFG_PRAM ((KERNEL_MAXSIZE >> 10)+1) |
Pali Rohár | 248ef0a | 2012-10-29 07:54:01 +0000 | [diff] [blame] | 173 | |
| 174 | #endif /* __CONFIG_H */ |