Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 2abefd60a96f20c57a59c019726ac61ab188f764 / . / arch / x86 / Kconfig
blob: fdfb6187b8e37c033198b7d63b851d29148aee48 [file] [log] [blame]
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]1menu "x86 architecture"
2 depends on X86
3
4config SYS_ARCH
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]5 default "x86"
6
Masahiro Yamada9520b712014-10-24 01:30:43 +0900[diff] [blame]7config USE_PRIVATE_LIBGCC
8 default y
9
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]10choice
11 prompt "Target select"
12
13config TARGET_COREBOOT
14 bool "Support coreboot"
Simon Glass0b36ecd2014-11-12 22:42:07 -0700[diff] [blame]15 help
16 This target is used for running U-Boot on top of Coreboot. In
17 this case Coreboot does the early inititalisation, and U-Boot
18 takes over once the RAM, video and CPU are fully running.
19 U-Boot is loaded as a fallback payload from Coreboot, in
20 Coreboot terminology. This method was used for the Chromebook
21 Pixel when launched.
22
23config TARGET_CHROMEBOOK_LINK
24 bool "Support Chromebook link"
25 help
26 This is the Chromebook Pixel released in 2013. It uses an Intel
27 i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
28 SDRAM. It has a Panther Point platform controller hub, PCIe
29 WiFi and Bluetooth. It also includes a 720p webcam, USB SD
30 reader, microphone and speakers, display port and 32GB SATA
31 solid state drive. There is a Chrome OS EC connected on LPC,
32 and it provides a 2560x1700 high resolution touch-enabled LCD
33 display.
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]34
35endchoice
36
Simon Glass98f139b2014-11-12 22:42:10 -0700[diff] [blame]37config RAMBASE
38 hex
39 default 0x100000
40
41config RAMTOP
42 hex
43 default 0x200000
44
45config XIP_ROM_SIZE
46 hex
47 default 0x10000
48
49config CPU_ADDR_BITS
50 int
51 default 36
52
Simon Glass268eefd2014-11-12 22:42:28 -0700[diff] [blame]53config HPET_ADDRESS
54 hex
55 default 0xfed00000 if !HPET_ADDRESS_OVERRIDE
56
57config SMM_TSEG
58 bool
59 default n
60
61config SMM_TSEG_SIZE
62 hex
63
Bin Mengc191ab72014-12-12 21:05:19 +0800[diff] [blame]64config BOARD_ROMSIZE_KB_512
65 bool
66config BOARD_ROMSIZE_KB_1024
67 bool
68config BOARD_ROMSIZE_KB_2048
69 bool
70config BOARD_ROMSIZE_KB_4096
71 bool
72config BOARD_ROMSIZE_KB_8192
73 bool
74config BOARD_ROMSIZE_KB_16384
75 bool
76
77choice
78 prompt "ROM chip size"
79 default UBOOT_ROMSIZE_KB_512 if BOARD_ROMSIZE_KB_512
80 default UBOOT_ROMSIZE_KB_1024 if BOARD_ROMSIZE_KB_1024
81 default UBOOT_ROMSIZE_KB_2048 if BOARD_ROMSIZE_KB_2048
82 default UBOOT_ROMSIZE_KB_4096 if BOARD_ROMSIZE_KB_4096
83 default UBOOT_ROMSIZE_KB_8192 if BOARD_ROMSIZE_KB_8192
84 default UBOOT_ROMSIZE_KB_16384 if BOARD_ROMSIZE_KB_16384
85 help
86 Select the size of the ROM chip you intend to flash U-Boot on.
87
88 The build system will take care of creating a u-boot.rom file
89 of the matching size.
90
91config UBOOT_ROMSIZE_KB_512
92 bool "512 KB"
93 help
94 Choose this option if you have a 512 KB ROM chip.
95
96config UBOOT_ROMSIZE_KB_1024
97 bool "1024 KB (1 MB)"
98 help
99 Choose this option if you have a 1024 KB (1 MB) ROM chip.
100
101config UBOOT_ROMSIZE_KB_2048
102 bool "2048 KB (2 MB)"
103 help
104 Choose this option if you have a 2048 KB (2 MB) ROM chip.
105
106config UBOOT_ROMSIZE_KB_4096
107 bool "4096 KB (4 MB)"
108 help
109 Choose this option if you have a 4096 KB (4 MB) ROM chip.
110
111config UBOOT_ROMSIZE_KB_8192
112 bool "8192 KB (8 MB)"
113 help
114 Choose this option if you have a 8192 KB (8 MB) ROM chip.
115
116config UBOOT_ROMSIZE_KB_16384
117 bool "16384 KB (16 MB)"
118 help
119 Choose this option if you have a 16384 KB (16 MB) ROM chip.
120
121endchoice
122
123# Map the config names to an integer (KB).
124config UBOOT_ROMSIZE_KB
125 int
126 default 512 if UBOOT_ROMSIZE_KB_512
127 default 1024 if UBOOT_ROMSIZE_KB_1024
128 default 2048 if UBOOT_ROMSIZE_KB_2048
129 default 4096 if UBOOT_ROMSIZE_KB_4096
130 default 8192 if UBOOT_ROMSIZE_KB_8192
131 default 16384 if UBOOT_ROMSIZE_KB_16384
132
133# Map the config names to a hex value (bytes).
Simon Glass6622b342014-11-12 22:42:08 -0700[diff] [blame]134config ROM_SIZE
135 hex
Bin Mengc191ab72014-12-12 21:05:19 +0800[diff] [blame]136 default 0x80000 if UBOOT_ROMSIZE_KB_512
137 default 0x100000 if UBOOT_ROMSIZE_KB_1024
138 default 0x200000 if UBOOT_ROMSIZE_KB_2048
139 default 0x400000 if UBOOT_ROMSIZE_KB_4096
140 default 0x800000 if UBOOT_ROMSIZE_KB_8192
141 default 0xc00000 if UBOOT_ROMSIZE_KB_12288
142 default 0x1000000 if UBOOT_ROMSIZE_KB_16384
Simon Glass6622b342014-11-12 22:42:08 -0700[diff] [blame]143
144config HAVE_INTEL_ME
145 bool "Platform requires Intel Management Engine"
146 help
147 Newer higher-end devices have an Intel Management Engine (ME)
148 which is a very large binary blob (typically 1.5MB) which is
149 required for the platform to work. This enforces a particular
150 SPI flash format. You will need to supply the me.bin file in
151 your board directory.
152
Simon Glass268eefd2014-11-12 22:42:28 -0700[diff] [blame]153config X86_RAMTEST
154 bool "Perform a simple RAM test after SDRAM initialisation"
155 help
156 If there is something wrong with SDRAM then the platform will
157 often crash within U-Boot or the kernel. This option enables a
158 very simple RAM test that quickly checks whether the SDRAM seems
159 to work correctly. It is not exhaustive but can save time by
160 detecting obvious failures.
161
Simon Glass5ecb8472014-11-14 20:56:30 -0700[diff] [blame]162config MARK_GRAPHICS_MEM_WRCOMB
163 bool "Mark graphics memory as write-combining."
164 default n
165 help
166 The graphics performance may increase if the graphics
167 memory is set as write-combining cache type. This option
168 enables marking the graphics memory as write-combining.
169
170menu "Display"
171
172config FRAMEBUFFER_SET_VESA_MODE
173 prompt "Set framebuffer graphics resolution"
174 bool
175 help
176 Set VESA/native framebuffer mode (needed for bootsplash and graphical framebuffer console)
177
178choice
179 prompt "framebuffer graphics resolution"
180 default FRAMEBUFFER_VESA_MODE_117
181 depends on FRAMEBUFFER_SET_VESA_MODE
182 help
183 This option sets the resolution used for the coreboot framebuffer (and
184 bootsplash screen).
185
186config FRAMEBUFFER_VESA_MODE_100
187 bool "640x400 256-color"
188
189config FRAMEBUFFER_VESA_MODE_101
190 bool "640x480 256-color"
191
192config FRAMEBUFFER_VESA_MODE_102
193 bool "800x600 16-color"
194
195config FRAMEBUFFER_VESA_MODE_103
196 bool "800x600 256-color"
197
198config FRAMEBUFFER_VESA_MODE_104
199 bool "1024x768 16-color"
200
201config FRAMEBUFFER_VESA_MODE_105
202 bool "1024x7686 256-color"
203
204config FRAMEBUFFER_VESA_MODE_106
205 bool "1280x1024 16-color"
206
207config FRAMEBUFFER_VESA_MODE_107
208 bool "1280x1024 256-color"
209
210config FRAMEBUFFER_VESA_MODE_108
211 bool "80x60 text"
212
213config FRAMEBUFFER_VESA_MODE_109
214 bool "132x25 text"
215
216config FRAMEBUFFER_VESA_MODE_10A
217 bool "132x43 text"
218
219config FRAMEBUFFER_VESA_MODE_10B
220 bool "132x50 text"
221
222config FRAMEBUFFER_VESA_MODE_10C
223 bool "132x60 text"
224
225config FRAMEBUFFER_VESA_MODE_10D
226 bool "320x200 32k-color (1:5:5:5)"
227
228config FRAMEBUFFER_VESA_MODE_10E
229 bool "320x200 64k-color (5:6:5)"
230
231config FRAMEBUFFER_VESA_MODE_10F
232 bool "320x200 16.8M-color (8:8:8)"
233
234config FRAMEBUFFER_VESA_MODE_110
235 bool "640x480 32k-color (1:5:5:5)"
236
237config FRAMEBUFFER_VESA_MODE_111
238 bool "640x480 64k-color (5:6:5)"
239
240config FRAMEBUFFER_VESA_MODE_112
241 bool "640x480 16.8M-color (8:8:8)"
242
243config FRAMEBUFFER_VESA_MODE_113
244 bool "800x600 32k-color (1:5:5:5)"
245
246config FRAMEBUFFER_VESA_MODE_114
247 bool "800x600 64k-color (5:6:5)"
248
249config FRAMEBUFFER_VESA_MODE_115
250 bool "800x600 16.8M-color (8:8:8)"
251
252config FRAMEBUFFER_VESA_MODE_116
253 bool "1024x768 32k-color (1:5:5:5)"
254
255config FRAMEBUFFER_VESA_MODE_117
256 bool "1024x768 64k-color (5:6:5)"
257
258config FRAMEBUFFER_VESA_MODE_118
259 bool "1024x768 16.8M-color (8:8:8)"
260
261config FRAMEBUFFER_VESA_MODE_119
262 bool "1280x1024 32k-color (1:5:5:5)"
263
264config FRAMEBUFFER_VESA_MODE_11A
265 bool "1280x1024 64k-color (5:6:5)"
266
267config FRAMEBUFFER_VESA_MODE_11B
268 bool "1280x1024 16.8M-color (8:8:8)"
269
270config FRAMEBUFFER_VESA_MODE_USER
271 bool "Manually select VESA mode"
272
273endchoice
274
275# Map the config names to an integer (KB).
276config FRAMEBUFFER_VESA_MODE
277 prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
278 hex
279 default 0x100 if FRAMEBUFFER_VESA_MODE_100
280 default 0x101 if FRAMEBUFFER_VESA_MODE_101
281 default 0x102 if FRAMEBUFFER_VESA_MODE_102
282 default 0x103 if FRAMEBUFFER_VESA_MODE_103
283 default 0x104 if FRAMEBUFFER_VESA_MODE_104
284 default 0x105 if FRAMEBUFFER_VESA_MODE_105
285 default 0x106 if FRAMEBUFFER_VESA_MODE_106
286 default 0x107 if FRAMEBUFFER_VESA_MODE_107
287 default 0x108 if FRAMEBUFFER_VESA_MODE_108
288 default 0x109 if FRAMEBUFFER_VESA_MODE_109
289 default 0x10A if FRAMEBUFFER_VESA_MODE_10A
290 default 0x10B if FRAMEBUFFER_VESA_MODE_10B
291 default 0x10C if FRAMEBUFFER_VESA_MODE_10C
292 default 0x10D if FRAMEBUFFER_VESA_MODE_10D
293 default 0x10E if FRAMEBUFFER_VESA_MODE_10E
294 default 0x10F if FRAMEBUFFER_VESA_MODE_10F
295 default 0x110 if FRAMEBUFFER_VESA_MODE_110
296 default 0x111 if FRAMEBUFFER_VESA_MODE_111
297 default 0x112 if FRAMEBUFFER_VESA_MODE_112
298 default 0x113 if FRAMEBUFFER_VESA_MODE_113
299 default 0x114 if FRAMEBUFFER_VESA_MODE_114
300 default 0x115 if FRAMEBUFFER_VESA_MODE_115
301 default 0x116 if FRAMEBUFFER_VESA_MODE_116
302 default 0x117 if FRAMEBUFFER_VESA_MODE_117
303 default 0x118 if FRAMEBUFFER_VESA_MODE_118
304 default 0x119 if FRAMEBUFFER_VESA_MODE_119
305 default 0x11A if FRAMEBUFFER_VESA_MODE_11A
306 default 0x11B if FRAMEBUFFER_VESA_MODE_11B
307 default 0x117 if FRAMEBUFFER_VESA_MODE_USER
308
309endmenu
310
Simon Glass0b36ecd2014-11-12 22:42:07 -0700[diff] [blame]311source "arch/x86/cpu/ivybridge/Kconfig"
312
Simon Glass26a22402014-11-12 22:42:29 -0700[diff] [blame]313source "board/coreboot/coreboot/Kconfig"
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]314
Simon Glass0b36ecd2014-11-12 22:42:07 -0700[diff] [blame]315source "board/google/chromebook_link/Kconfig"
316
Masahiro Yamadad3ae6782014-07-30 14:08:14 +0900[diff] [blame]317endmenu