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git01.mediatek.com / filogic / uboot / 299f8f8feeed1685991aa0934c1ed51d7f4a6aab / . / include / configs / km_kirkwood.h
blob: 82c2a129223e6fd071e84c086dd42e9d390cb2cd [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]2/*
3 * (C) Copyright 2009
4 * Marvell Semiconductor <www.marvell.com>
5 * Prafulla Wadaskar <prafulla@marvell.com>
6 *
7 * (C) Copyright 2009
8 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 *
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]10 * (C) Copyright 2011-2012
11 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
12 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]13 */
14
15/*
16 * for linking errors see
17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
18 */
19
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]20#ifndef _CONFIG_KM_KIRKWOOD_H
21#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]22
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]23/* KM_KIRKWOOD */
Holger Brunck9f03a382012-05-25 01:57:13 +0000[diff] [blame]24#if defined(CONFIG_KM_KIRKWOOD)
Mario Six790d8442018-03-28 14:38:20 +0200[diff] [blame]25#define CONFIG_HOSTNAME "km_kirkwood"
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]26#define CONFIG_KM_DISABLE_PCIE
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]27
28/* KM_KIRKWOOD_PCI */
Holger Brunck9f03a382012-05-25 01:57:13 +0000[diff] [blame]29#elif defined(CONFIG_KM_KIRKWOOD_PCI)
Mario Six790d8442018-03-28 14:38:20 +0200[diff] [blame]30#define CONFIG_HOSTNAME "km_kirkwood_pci"
Holger Brunck4dd3bcf2014-08-15 10:51:48 +0200[diff] [blame]31#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
32#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunckb693ce82012-07-05 05:05:06 +0000[diff] [blame]33
Karlheinz Jerg34544ea2013-09-18 09:32:48 +0200[diff] [blame]34/* KM_KIRKWOOD_128M16 */
35#elif defined(CONFIG_KM_KIRKWOOD_128M16)
Mario Six790d8442018-03-28 14:38:20 +0200[diff] [blame]36#define CONFIG_HOSTNAME "km_kirkwood_128m16"
Karlheinz Jerg34544ea2013-09-18 09:32:48 +0200[diff] [blame]37#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +0900[diff] [blame]38#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Karlheinz Jerg34544ea2013-09-18 09:32:48 +0200[diff] [blame]39#define CONFIG_KM_DISABLE_PCIE
Karlheinz Jerg34544ea2013-09-18 09:32:48 +0200[diff] [blame]40
Holger Brunck09f34042020-01-13 15:34:02 +0100[diff] [blame]41/* KM_NUSA */
42#elif defined(CONFIG_KM_NUSA)
Gerlando Falauto29ff59a2014-02-13 16:43:00 +0100[diff] [blame]43
Mario Six790d8442018-03-28 14:38:20 +0200[diff] [blame]44#define CONFIG_HOSTNAME "kmnusa"
Gerlando Falauto29ff59a2014-02-13 16:43:00 +0100[diff] [blame]45
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]46#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +0900[diff] [blame]47#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]48
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]49/* KMCOGE5UN */
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]50#elif defined(CONFIG_KM_COGE5UN)
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]51#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +0900[diff] [blame]52#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
Mario Six790d8442018-03-28 14:38:20 +0200[diff] [blame]53#define CONFIG_HOSTNAME "kmcoge5un"
Holger Brunckf065ce02012-07-05 05:05:02 +0000[diff] [blame]54#define CONFIG_KM_DISABLE_PCIE
Holger Brunckc9caa7f2012-07-05 05:05:04 +0000[diff] [blame]55
Holger Brunck55b3c6c2020-01-13 15:34:01 +0100[diff] [blame]56/* KM_SUSE2 */
57#elif defined(CONFIG_KM_SUSE2)
58#define CONFIG_HOSTNAME "kmsuse2"
59#undef CONFIG_SYS_KWD_CONFIG
60#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
61#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
62#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]63#else
64#error ("Board unsupported")
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]65#endif
Heiko Schocher60301192010-02-22 16:43:02 +0530[diff] [blame]66
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]67/* include common defines/options for all arm based Keymile boards */
68#include "km/km_arm.h"
69
Holger Brunck2ef42952012-07-05 05:37:46 +0000[diff] [blame]70#if defined(CONFIG_KM_PIGGY4_88E6352)
71/*
72 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
73 * an Marvell 88E6352 simple switch.
74 * In this case we have to change the default settings for the etherent mac.
75 * There is NO ethernet phy. The ARM and Switch are conencted directly over
76 * RGMII in MAC-MAC mode
77 * In this case 1GBit full duplex and autoneg off
78 */
79#define PORT_SERIAL_CONTROL_VALUE ( \
80 MVGBE_FORCE_LINK_PASS | \
81 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
82 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
83 MVGBE_ADV_NO_FLOW_CTRL | \
84 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
85 MVGBE_FORCE_BP_MODE_NO_JAM | \
86 (1 << 9) /* Reserved bit has to be 1 */ | \
87 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
88 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
89 MVGBE_DTE_ADV_0 | \
90 MVGBE_MIIPHY_MAC_MODE | \
91 MVGBE_AUTO_NEG_NO_CHANGE | \
92 MVGBE_MAX_RX_PACKET_1552BYTE | \
93 MVGBE_CLR_EXT_LOOPBACK | \
94 MVGBE_SET_FULL_DUPLEX_MODE | \
95 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
96 MVGBE_SET_GMII_SPEED_TO_1000 |\
97 MVGBE_SET_MII_SPEED_TO_100)
98
99#endif
Heiko Schochere4533af2011-03-08 10:53:51 +0100[diff] [blame]100
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]101#ifdef CONFIG_KM_PIGGY4_88E6061
102/*
Holger Bruncke306c672019-11-25 17:24:15 +0100[diff] [blame]103 * Some keymile boards like mgcoge5un have their PIGGY4 connected via
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]104 * an Marvell 88E6061 simple switch.
105 * In this case we have to change the default settings for the
106 * ethernet phy connected to the kirkwood.
107 * In this case 100MB full duplex and autoneg off
108 */
109#define PORT_SERIAL_CONTROL_VALUE ( \
110 MVGBE_FORCE_LINK_PASS | \
111 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
112 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
113 MVGBE_ADV_NO_FLOW_CTRL | \
114 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
115 MVGBE_FORCE_BP_MODE_NO_JAM | \
116 (1 << 9) /* Reserved bit has to be 1 */ | \
117 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
118 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
119 MVGBE_DTE_ADV_0 | \
120 MVGBE_MIIPHY_MAC_MODE | \
121 MVGBE_AUTO_NEG_NO_CHANGE | \
122 MVGBE_MAX_RX_PACKET_1552BYTE | \
123 MVGBE_CLR_EXT_LOOPBACK | \
124 MVGBE_SET_FULL_DUPLEX_MODE | \
125 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
126 MVGBE_SET_GMII_SPEED_TO_10_100 |\
127 MVGBE_SET_MII_SPEED_TO_100)
128#endif
129
Pascal Linder9da11de2019-07-09 09:28:23 +0200[diff] [blame]130#ifdef CONFIG_KM_DISABLE_PCIE
Holger Brunckd896d0d2012-07-05 05:05:03 +0000[diff] [blame]131#undef CONFIG_KIRKWOOD_PCIE_INIT
132#endif
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000[diff] [blame]133
Holger Brunck1f974e92011-06-16 18:11:15 +0530[diff] [blame]134#endif /* _CONFIG_KM_KIRKWOOD */