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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Heiko Schocher60301192010-02-22 16:43:02 +05302/*
3 * (C) Copyright 2009
4 * Marvell Semiconductor <www.marvell.com>
5 * Prafulla Wadaskar <prafulla@marvell.com>
6 *
7 * (C) Copyright 2009
8 * Stefan Roese, DENX Software Engineering, sr@denx.de.
9 *
Holger Brunck2ef42952012-07-05 05:37:46 +000010 * (C) Copyright 2011-2012
11 * Holger Brunck, Keymile GmbH Hannover, holger.brunck@keymile.com
12 * Valentin Longchamp, Keymile AG, valentin.longchamp@keymile.com
Heiko Schocher60301192010-02-22 16:43:02 +053013 */
14
15/*
16 * for linking errors see
17 * http://lists.denx.de/pipermail/u-boot/2009-July/057350.html
18 */
19
Holger Brunck1f974e92011-06-16 18:11:15 +053020#ifndef _CONFIG_KM_KIRKWOOD_H
21#define _CONFIG_KM_KIRKWOOD_H
Heiko Schocher60301192010-02-22 16:43:02 +053022
Holger Brunckb693ce82012-07-05 05:05:06 +000023/* KM_KIRKWOOD */
Holger Brunck9f03a382012-05-25 01:57:13 +000024#if defined(CONFIG_KM_KIRKWOOD)
Mario Six790d8442018-03-28 14:38:20 +020025#define CONFIG_HOSTNAME "km_kirkwood"
Holger Brunckb693ce82012-07-05 05:05:06 +000026#define CONFIG_KM_DISABLE_PCIE
Holger Brunckb693ce82012-07-05 05:05:06 +000027
28/* KM_KIRKWOOD_PCI */
Holger Brunck9f03a382012-05-25 01:57:13 +000029#elif defined(CONFIG_KM_KIRKWOOD_PCI)
Mario Six790d8442018-03-28 14:38:20 +020030#define CONFIG_HOSTNAME "km_kirkwood_pci"
Holger Brunck4dd3bcf2014-08-15 10:51:48 +020031#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
32#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunckb693ce82012-07-05 05:05:06 +000033
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020034/* KM_KIRKWOOD_128M16 */
35#elif defined(CONFIG_KM_KIRKWOOD_128M16)
Mario Six790d8442018-03-28 14:38:20 +020036#define CONFIG_HOSTNAME "km_kirkwood_128m16"
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020037#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +090038#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020039#define CONFIG_KM_DISABLE_PCIE
Karlheinz Jerg34544ea2013-09-18 09:32:48 +020040
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010041/* KM_NUSA / KM_SUGP1 */
42#elif defined(CONFIG_KM_NUSA) || defined(CONFIG_KM_SUGP1)
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010043
44# if defined(CONFIG_KM_NUSA)
Mario Six790d8442018-03-28 14:38:20 +020045#define CONFIG_HOSTNAME "kmnusa"
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010046# elif defined(CONFIG_KM_SUGP1)
Mario Six790d8442018-03-28 14:38:20 +020047#define CONFIG_HOSTNAME "kmsugp1"
Gerlando Falauto29ff59a2014-02-13 16:43:00 +010048#define KM_PCIE_RESET_MPP7
49#endif
50
Holger Brunck2ef42952012-07-05 05:37:46 +000051#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +090052#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck2ef42952012-07-05 05:37:46 +000053
Holger Brunckd896d0d2012-07-05 05:05:03 +000054/* KM_MGCOGE3UN */
55#elif defined(CONFIG_KM_MGCOGE3UN)
Mario Six790d8442018-03-28 14:38:20 +020056#define CONFIG_HOSTNAME "mgcoge3un"
Holger Brunckd896d0d2012-07-05 05:05:03 +000057#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +090058#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-memphis.cfg
Holger Brunckd896d0d2012-07-05 05:05:03 +000059#define CONFIG_KM_BOARD_EXTRA_ENV "waitforne=true\0"
Holger Brunckd896d0d2012-07-05 05:05:03 +000060#define CONFIG_KM_DISABLE_PCIE
Holger Brunckd896d0d2012-07-05 05:05:03 +000061
62/* KMCOGE5UN */
Holger Brunckf065ce02012-07-05 05:05:02 +000063#elif defined(CONFIG_KM_COGE5UN)
Holger Brunckf065ce02012-07-05 05:05:02 +000064#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +090065#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
Mario Six790d8442018-03-28 14:38:20 +020066#define CONFIG_HOSTNAME "kmcoge5un"
Holger Brunckf065ce02012-07-05 05:05:02 +000067#define CONFIG_KM_DISABLE_PCIE
Holger Brunckc9caa7f2012-07-05 05:05:04 +000068
69/* KM_PORTL2 */
70#elif defined(CONFIG_KM_PORTL2)
Mario Six790d8442018-03-28 14:38:20 +020071#define CONFIG_HOSTNAME "portl2"
Holger Brunckc9caa7f2012-07-05 05:05:04 +000072
Holger Brunckac552d52013-01-15 22:51:22 +000073/* KM_SUV31 */
74#elif defined(CONFIG_KM_SUV31)
Mario Six790d8442018-03-28 14:38:20 +020075#define CONFIG_HOSTNAME "kmsuv31"
Holger Brunck7bffb3f2014-01-27 16:58:24 +010076#undef CONFIG_SYS_KWD_CONFIG
Masahiro Yamadad6acdf22014-03-11 11:05:17 +090077#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
Holger Brunck4dd3bcf2014-08-15 10:51:48 +020078#define CONFIG_KM_UBI_PART_BOOT_OPTS ",2048"
79#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Holger Brunck2ef42952012-07-05 05:37:46 +000080#else
81#error ("Board unsupported")
Holger Brunck1f974e92011-06-16 18:11:15 +053082#endif
Heiko Schocher60301192010-02-22 16:43:02 +053083
Holger Brunck2ef42952012-07-05 05:37:46 +000084/* include common defines/options for all arm based Keymile boards */
85#include "km/km_arm.h"
86
Holger Brunck2ef42952012-07-05 05:37:46 +000087#if defined(CONFIG_KM_PIGGY4_88E6352)
88/*
89 * Some keymile boards like mgcoge5un & nusa1 have their PIGGY4 connected via
90 * an Marvell 88E6352 simple switch.
91 * In this case we have to change the default settings for the etherent mac.
92 * There is NO ethernet phy. The ARM and Switch are conencted directly over
93 * RGMII in MAC-MAC mode
94 * In this case 1GBit full duplex and autoneg off
95 */
96#define PORT_SERIAL_CONTROL_VALUE ( \
97 MVGBE_FORCE_LINK_PASS | \
98 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
99 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
100 MVGBE_ADV_NO_FLOW_CTRL | \
101 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
102 MVGBE_FORCE_BP_MODE_NO_JAM | \
103 (1 << 9) /* Reserved bit has to be 1 */ | \
104 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
105 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
106 MVGBE_DTE_ADV_0 | \
107 MVGBE_MIIPHY_MAC_MODE | \
108 MVGBE_AUTO_NEG_NO_CHANGE | \
109 MVGBE_MAX_RX_PACKET_1552BYTE | \
110 MVGBE_CLR_EXT_LOOPBACK | \
111 MVGBE_SET_FULL_DUPLEX_MODE | \
112 MVGBE_EN_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
113 MVGBE_SET_GMII_SPEED_TO_1000 |\
114 MVGBE_SET_MII_SPEED_TO_100)
115
116#endif
Heiko Schochere4533af2011-03-08 10:53:51 +0100117
Holger Brunckd896d0d2012-07-05 05:05:03 +0000118#ifdef CONFIG_KM_PIGGY4_88E6061
119/*
120 * Some keymile boards like mgcoge3un have their PIGGY4 connected via
121 * an Marvell 88E6061 simple switch.
122 * In this case we have to change the default settings for the
123 * ethernet phy connected to the kirkwood.
124 * In this case 100MB full duplex and autoneg off
125 */
126#define PORT_SERIAL_CONTROL_VALUE ( \
127 MVGBE_FORCE_LINK_PASS | \
128 MVGBE_DIS_AUTO_NEG_FOR_DUPLX | \
129 MVGBE_DIS_AUTO_NEG_FOR_FLOW_CTRL | \
130 MVGBE_ADV_NO_FLOW_CTRL | \
131 MVGBE_FORCE_FC_MODE_NO_PAUSE_DIS_TX | \
132 MVGBE_FORCE_BP_MODE_NO_JAM | \
133 (1 << 9) /* Reserved bit has to be 1 */ | \
134 MVGBE_DO_NOT_FORCE_LINK_FAIL | \
135 MVGBE_DIS_AUTO_NEG_SPEED_GMII | \
136 MVGBE_DTE_ADV_0 | \
137 MVGBE_MIIPHY_MAC_MODE | \
138 MVGBE_AUTO_NEG_NO_CHANGE | \
139 MVGBE_MAX_RX_PACKET_1552BYTE | \
140 MVGBE_CLR_EXT_LOOPBACK | \
141 MVGBE_SET_FULL_DUPLEX_MODE | \
142 MVGBE_DIS_FLOW_CTRL_TX_RX_IN_FULL_DUPLEX |\
143 MVGBE_SET_GMII_SPEED_TO_10_100 |\
144 MVGBE_SET_MII_SPEED_TO_100)
145#endif
146
Pascal Linder9da11de2019-07-09 09:28:23 +0200147#ifdef CONFIG_KM_DISABLE_PCIE
Holger Brunckd896d0d2012-07-05 05:05:03 +0000148#undef CONFIG_KIRKWOOD_PCIE_INIT
149#endif
Valentin Longchamp6633fed2012-07-05 05:05:05 +0000150
Holger Brunck1f974e92011-06-16 18:11:15 +0530151#endif /* _CONFIG_KM_KIRKWOOD */