Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Texas Instruments. |
| 4 | * Richard Woodruff <r-woodruff2@ti.com> |
| 5 | * Kshitij Gupta <kshitij@ti.com> |
| 6 | * |
Magnus Lilja | 69e8458 | 2008-04-15 19:09:10 +0200 | [diff] [blame] | 7 | * Configuration settings for the LogicPD i.MX31 Litekit board. |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 8 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 9 | * SPDX-License-Identifier: GPL-2.0+ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 10 | */ |
| 11 | |
| 12 | #ifndef __CONFIG_H |
| 13 | #define __CONFIG_H |
| 14 | |
Stefano Babic | 78129d9 | 2011-03-14 15:43:56 +0100 | [diff] [blame] | 15 | #include <asm/arch/imx-regs.h> |
Magnus Lilja | d1948c6 | 2008-04-20 10:36:36 +0200 | [diff] [blame] | 16 | |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 17 | /* High Level Configuration Options */ |
| 18 | #define CONFIG_ARM1136 1 /* This is an arm1136 CPU core */ |
| 19 | #define CONFIG_MX31 1 /* in a mx31 */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 20 | #define CONFIG_MX31_CLK32 32000 |
| 21 | |
| 22 | #define CONFIG_DISPLAY_CPUINFO |
| 23 | #define CONFIG_DISPLAY_BOARDINFO |
| 24 | |
Fabio Estevam | ddc647f | 2011-06-06 03:13:36 +0000 | [diff] [blame] | 25 | #define CONFIG_SYS_TEXT_BASE 0xa0000000 |
| 26 | |
Fabio Estevam | a0f4711 | 2011-09-22 08:07:17 +0000 | [diff] [blame] | 27 | #define CONFIG_MACH_TYPE MACH_TYPE_MX31LITE |
| 28 | |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 29 | /* Temporarily disabled */ |
| 30 | #if 0 |
| 31 | #define CONFIG_OF_LIBFDT 1 |
| 32 | #define CONFIG_FIT 1 |
| 33 | #define CONFIG_FIT_VERBOSE 1 |
| 34 | #endif |
| 35 | |
| 36 | #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
| 37 | #define CONFIG_SETUP_MEMORY_TAGS 1 |
| 38 | #define CONFIG_INITRD_TAG 1 |
| 39 | |
| 40 | /* |
| 41 | * Size of malloc() pool |
| 42 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 43 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128 * 1024) |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 44 | |
| 45 | /* |
| 46 | * Hardware drivers |
| 47 | */ |
| 48 | |
Stefano Babic | 1ca47d9 | 2011-11-22 15:22:39 +0100 | [diff] [blame] | 49 | #define CONFIG_MXC_UART |
| 50 | #define CONFIG_MXC_UART_BASE UART1_BASE |
Stefano Babic | 3906990 | 2011-08-26 11:54:05 +0200 | [diff] [blame] | 51 | #define CONFIG_MXC_GPIO |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 52 | |
Magnus Lilja | 180381d | 2008-04-20 10:38:12 +0200 | [diff] [blame] | 53 | #define CONFIG_HARD_SPI 1 |
| 54 | #define CONFIG_MXC_SPI 1 |
Haavard Skinnemoen | d74084a | 2008-05-16 11:10:31 +0200 | [diff] [blame] | 55 | #define CONFIG_DEFAULT_SPI_BUS 1 |
Stefano Babic | 4c59699 | 2010-08-23 20:41:19 +0200 | [diff] [blame] | 56 | #define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) |
Magnus Lilja | 180381d | 2008-04-20 10:38:12 +0200 | [diff] [blame] | 57 | |
Stefano Babic | 0e9aa0e | 2011-10-08 11:01:52 +0200 | [diff] [blame] | 58 | /* PMIC Controller */ |
Ćukasz Majewski | 1b6d9ed | 2012-11-13 03:22:14 +0000 | [diff] [blame] | 59 | #define CONFIG_POWER |
| 60 | #define CONFIG_POWER_SPI |
| 61 | #define CONFIG_POWER_FSL |
Stefano Babic | e043203 | 2010-04-16 17:11:19 +0200 | [diff] [blame] | 62 | #define CONFIG_FSL_PMIC_BUS 1 |
| 63 | #define CONFIG_FSL_PMIC_CS 0 |
| 64 | #define CONFIG_FSL_PMIC_CLK 1000000 |
Stefano Babic | 4c59699 | 2010-08-23 20:41:19 +0200 | [diff] [blame] | 65 | #define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) |
Stefano Babic | 0e9aa0e | 2011-10-08 11:01:52 +0200 | [diff] [blame] | 66 | #define CONFIG_FSL_PMIC_BITLEN 32 |
Fabio Estevam | 3f8d178 | 2011-10-24 06:44:15 +0000 | [diff] [blame] | 67 | #define CONFIG_RTC_MC13XXX |
Magnus Lilja | 180381d | 2008-04-20 10:38:12 +0200 | [diff] [blame] | 68 | |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 69 | /* allow to overwrite serial and ethaddr */ |
| 70 | #define CONFIG_ENV_OVERWRITE |
| 71 | #define CONFIG_CONS_INDEX 1 |
| 72 | #define CONFIG_BAUDRATE 115200 |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 73 | |
| 74 | /*********************************************************** |
| 75 | * Command definition |
| 76 | ***********************************************************/ |
| 77 | |
| 78 | #include <config_cmd_default.h> |
| 79 | |
| 80 | #define CONFIG_CMD_MII |
| 81 | #define CONFIG_CMD_PING |
Magnus Lilja | 180381d | 2008-04-20 10:38:12 +0200 | [diff] [blame] | 82 | #define CONFIG_CMD_SPI |
| 83 | #define CONFIG_CMD_DATE |
Magnus Lilja | 065d559 | 2010-04-23 20:30:49 +0200 | [diff] [blame] | 84 | #define CONFIG_CMD_NAND |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 85 | |
| 86 | #define CONFIG_BOOTDELAY 3 |
| 87 | |
| 88 | #define CONFIG_NETMASK 255.255.255.0 |
| 89 | #define CONFIG_IPADDR 192.168.23.168 |
| 90 | #define CONFIG_SERVERIP 192.168.23.2 |
| 91 | |
| 92 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 93 | "bootargs_base=setenv bootargs console=ttySMX0,115200\0" \ |
| 94 | "bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0" \ |
| 95 | "bootcmd=run bootcmd_net\0" \ |
| 96 | "bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0" \ |
| 97 | "prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0" |
| 98 | |
| 99 | |
Ben Warren | fbfdd3a | 2009-07-20 22:01:11 -0700 | [diff] [blame] | 100 | #define CONFIG_SMC911X 1 |
| 101 | #define CONFIG_SMC911X_BASE (CS4_BASE + 0x00020000) |
| 102 | #define CONFIG_SMC911X_32_BIT 1 |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 103 | |
| 104 | /* |
| 105 | * Miscellaneous configurable options |
| 106 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 107 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 108 | #define CONFIG_SYS_PROMPT "uboot> " |
| 109 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 110 | /* Print Buffer Size */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 111 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 112 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 113 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 114 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 115 | #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ |
| 116 | #define CONFIG_SYS_MEMTEST_END 0x10000 |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 117 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 118 | #define CONFIG_SYS_LOAD_ADDR 0 /* default load address */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 119 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 120 | #define CONFIG_SYS_HZ 1000 |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 121 | |
| 122 | #define CONFIG_CMDLINE_EDITING 1 |
| 123 | |
| 124 | /*----------------------------------------------------------------------- |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 125 | * Physical Memory Map |
| 126 | */ |
| 127 | #define CONFIG_NR_DRAM_BANKS 1 |
Magnus Lilja | d1948c6 | 2008-04-20 10:36:36 +0200 | [diff] [blame] | 128 | #define PHYS_SDRAM_1 CSD0_BASE |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 129 | #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) |
Fabio Estevam | 6ddd723 | 2011-06-05 14:56:02 +0000 | [diff] [blame] | 130 | #define CONFIG_BOARD_EARLY_INIT_F |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 131 | |
Fabio Estevam | d23e65f | 2011-09-22 08:07:13 +0000 | [diff] [blame] | 132 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
Magnus Lilja | da87d1e | 2010-10-16 19:47:06 +0200 | [diff] [blame] | 133 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 134 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 135 | #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Magnus Lilja | da87d1e | 2010-10-16 19:47:06 +0200 | [diff] [blame] | 136 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET) |
| 137 | |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 138 | /*----------------------------------------------------------------------- |
| 139 | * FLASH and environment organization |
| 140 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 141 | #define CONFIG_SYS_FLASH_BASE CS0_BASE |
| 142 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ |
| 143 | #define CONFIG_SYS_MAX_FLASH_SECT 128 /* max number of sectors on one chip */ |
| 144 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 145 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 146 | #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x001f0000) |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 147 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 148 | #define CONFIG_ENV_SECT_SIZE (64 * 1024) |
| 149 | #define CONFIG_ENV_SIZE (64 * 1024) |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 150 | |
| 151 | /*----------------------------------------------------------------------- |
| 152 | * CFI FLASH driver setup |
| 153 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 154 | #define CONFIG_SYS_FLASH_CFI 1 /* Flash memory is CFI compliant */ |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 155 | #define CONFIG_FLASH_CFI_DRIVER 1 /* Use drivers/cfi_flash.c */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 156 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* Use buffered writes (~10x faster) */ |
| 157 | #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use hardware sector protection */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 158 | |
| 159 | /* timeout values are in ticks */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 160 | #define CONFIG_SYS_FLASH_ERASE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */ |
| 161 | #define CONFIG_SYS_FLASH_WRITE_TOUT (100*CONFIG_SYS_HZ) /* Timeout for Flash Write */ |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 162 | |
| 163 | /* |
| 164 | * JFFS2 partitions |
| 165 | */ |
Stefan Roese | b1423dd | 2009-03-19 13:30:36 +0100 | [diff] [blame] | 166 | #undef CONFIG_CMD_MTDPARTS |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 167 | #define CONFIG_JFFS2_DEV "nor0" |
| 168 | |
Magnus Lilja | 065d559 | 2010-04-23 20:30:49 +0200 | [diff] [blame] | 169 | /* |
| 170 | * NAND flash |
| 171 | */ |
| 172 | #define CONFIG_NAND_MXC |
| 173 | #define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR |
| 174 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 175 | #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR |
| 176 | #define CONFIG_MXC_NAND_HWECC |
| 177 | |
Sascha Hauer | ce6fc52 | 2008-03-26 20:41:09 +0100 | [diff] [blame] | 178 | #endif /* __CONFIG_H */ |