blob: bd39109f3b78b80527e711688e1d3b71ccfa660f [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassf1a6c762011-10-07 13:53:38 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
Simon Glassf1a6c762011-10-07 13:53:38 +00004 */
5
6#include <common.h>
Simon Glass63334482019-11-14 12:57:39 -07007#include <cpu_func.h>
Simon Glassfd173402014-02-27 13:26:13 -07008#include <cros_ec.h>
Simon Glassb4d70702014-02-26 15:59:25 -07009#include <dm.h>
Simon Glassa7b51302019-11-14 12:57:46 -070010#include <init.h>
Patrick Delaunay29bf6032018-07-27 16:37:09 +020011#include <led.h>
Matthias Weisser0d3dd142011-11-29 12:16:40 +010012#include <os.h>
Joe Hershberger74961352015-04-21 13:57:18 -050013#include <asm/test.h>
Simon Glassb9ddbf42014-02-27 13:26:19 -070014#include <asm/u-boot-sandbox.h>
Matthias Weisser0d3dd142011-11-29 12:16:40 +010015
Simon Glassf1a6c762011-10-07 13:53:38 +000016/*
17 * Pointer to initial global data area
18 *
19 * Here we initialize it.
20 */
21gd_t *gd;
22
Simon Glassb4d70702014-02-26 15:59:25 -070023/* Add a simple GPIO device */
24U_BOOT_DEVICE(gpio_sandbox) = {
Walter Lozano2901ac62020-06-25 01:10:04 -030025 .name = "sandbox_gpio",
Simon Glassb4d70702014-02-26 15:59:25 -070026};
27
Simon Glassf1a6c762011-10-07 13:53:38 +000028void flush_cache(unsigned long start, unsigned long size)
29{
30}
31
Thomas Chou7b059dc2015-10-30 15:35:52 +080032#ifndef CONFIG_TIMER
Joe Hershberger74961352015-04-21 13:57:18 -050033/* system timer offset in ms */
34static unsigned long sandbox_timer_offset;
35
Neil Armstrong77c0dbc2019-04-11 17:01:23 +020036void timer_test_add_offset(unsigned long offset)
Joe Hershberger74961352015-04-21 13:57:18 -050037{
38 sandbox_timer_offset += offset;
39}
40
Rob Herring86bd4e82013-11-08 08:40:44 -060041unsigned long timer_read_counter(void)
Simon Glassf1a6c762011-10-07 13:53:38 +000042{
Joe Hershberger74961352015-04-21 13:57:18 -050043 return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
Simon Glassf1a6c762011-10-07 13:53:38 +000044}
Thomas Chou7b059dc2015-10-30 15:35:52 +080045#endif
Simon Glassf1a6c762011-10-07 13:53:38 +000046
Simon Glassf1a6c762011-10-07 13:53:38 +000047int dram_init(void)
48{
Simon Glass62cf9122013-04-26 02:53:43 +000049 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
Simon Glassf1a6c762011-10-07 13:53:38 +000050 return 0;
51}
Simon Glassfd173402014-02-27 13:26:13 -070052
Patrick Delaunay29bf6032018-07-27 16:37:09 +020053int board_init(void)
54{
55 if (IS_ENABLED(CONFIG_LED))
56 led_default_state();
57
58 return 0;
59}
60
Heinrich Schuchardta3fc9a42020-03-14 12:13:40 +010061int ft_board_setup(void *fdt, bd_t *bd)
62{
63 /* Create an arbitrary reservation to allow testing OF_BOARD_SETUP.*/
64 return fdt_add_mem_rsv(fdt, 0x00d02000, 0x4000);
65}
66
Simon Glassfd173402014-02-27 13:26:13 -070067#ifdef CONFIG_BOARD_LATE_INIT
68int board_late_init(void)
69{
Simon Glassfe3f6432018-11-06 15:21:26 -070070 struct udevice *dev;
71 int ret;
72
73 ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
74 if (ret && ret != -ENODEV) {
Simon Glassfd173402014-02-27 13:26:13 -070075 /* Force console on */
76 gd->flags &= ~GD_FLG_SILENT;
77
Simon Glassfe3f6432018-11-06 15:21:26 -070078 printf("cros-ec communications failure %d\n", ret);
Simon Glassfd173402014-02-27 13:26:13 -070079 puts("\nPlease reset with Power+Refresh\n\n");
80 panic("Cannot init cros-ec device");
81 return -1;
82 }
83 return 0;
84}
85#endif