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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Simon Glassf1a6c762011-10-07 13:53:38 +00002/*
3 * Copyright (c) 2011 The Chromium OS Authors.
Simon Glassf1a6c762011-10-07 13:53:38 +00004 */
5
6#include <common.h>
Simon Glass63334482019-11-14 12:57:39 -07007#include <cpu_func.h>
Simon Glassfd173402014-02-27 13:26:13 -07008#include <cros_ec.h>
Simon Glassb4d70702014-02-26 15:59:25 -07009#include <dm.h>
Patrick Delaunay29bf6032018-07-27 16:37:09 +020010#include <led.h>
Matthias Weisser0d3dd142011-11-29 12:16:40 +010011#include <os.h>
Joe Hershberger74961352015-04-21 13:57:18 -050012#include <asm/test.h>
Simon Glassb9ddbf42014-02-27 13:26:19 -070013#include <asm/u-boot-sandbox.h>
Matthias Weisser0d3dd142011-11-29 12:16:40 +010014
Simon Glassf1a6c762011-10-07 13:53:38 +000015/*
16 * Pointer to initial global data area
17 *
18 * Here we initialize it.
19 */
20gd_t *gd;
21
Simon Glassb4d70702014-02-26 15:59:25 -070022/* Add a simple GPIO device */
23U_BOOT_DEVICE(gpio_sandbox) = {
24 .name = "gpio_sandbox",
25};
26
Simon Glassf1a6c762011-10-07 13:53:38 +000027void flush_cache(unsigned long start, unsigned long size)
28{
29}
30
Thomas Chou7b059dc2015-10-30 15:35:52 +080031#ifndef CONFIG_TIMER
Joe Hershberger74961352015-04-21 13:57:18 -050032/* system timer offset in ms */
33static unsigned long sandbox_timer_offset;
34
Neil Armstrong77c0dbc2019-04-11 17:01:23 +020035void timer_test_add_offset(unsigned long offset)
Joe Hershberger74961352015-04-21 13:57:18 -050036{
37 sandbox_timer_offset += offset;
38}
39
Rob Herring86bd4e82013-11-08 08:40:44 -060040unsigned long timer_read_counter(void)
Simon Glassf1a6c762011-10-07 13:53:38 +000041{
Joe Hershberger74961352015-04-21 13:57:18 -050042 return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
Simon Glassf1a6c762011-10-07 13:53:38 +000043}
Thomas Chou7b059dc2015-10-30 15:35:52 +080044#endif
Simon Glassf1a6c762011-10-07 13:53:38 +000045
Simon Glassf1a6c762011-10-07 13:53:38 +000046int dram_init(void)
47{
Simon Glass62cf9122013-04-26 02:53:43 +000048 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
Simon Glassf1a6c762011-10-07 13:53:38 +000049 return 0;
50}
Simon Glassfd173402014-02-27 13:26:13 -070051
Patrick Delaunay29bf6032018-07-27 16:37:09 +020052int board_init(void)
53{
54 if (IS_ENABLED(CONFIG_LED))
55 led_default_state();
56
57 return 0;
58}
59
Simon Glassfd173402014-02-27 13:26:13 -070060#ifdef CONFIG_BOARD_LATE_INIT
61int board_late_init(void)
62{
Simon Glassfe3f6432018-11-06 15:21:26 -070063 struct udevice *dev;
64 int ret;
65
66 ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
67 if (ret && ret != -ENODEV) {
Simon Glassfd173402014-02-27 13:26:13 -070068 /* Force console on */
69 gd->flags &= ~GD_FLG_SILENT;
70
Simon Glassfe3f6432018-11-06 15:21:26 -070071 printf("cros-ec communications failure %d\n", ret);
Simon Glassfd173402014-02-27 13:26:13 -070072 puts("\nPlease reset with Power+Refresh\n\n");
73 panic("Cannot init cros-ec device");
74 return -1;
75 }
76 return 0;
77}
78#endif