| Chin Liang See | cb35060 | 2014-03-04 22:13:53 -0600 | [diff] [blame] | 1 | /* |
| Ley Foon Tan | ec6f882 | 2017-04-26 02:44:33 +0800 | [diff] [blame] | 2 | * Copyright (C) 2013-2017 Altera Corporation <www.altera.com> |
| Chin Liang See | cb35060 | 2014-03-04 22:13:53 -0600 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: GPL-2.0+ |
| 5 | */ |
| 6 | |
| Ley Foon Tan | ec6f882 | 2017-04-26 02:44:33 +0800 | [diff] [blame] | 7 | #ifndef _CLOCK_MANAGER_H_ |
| 8 | #define _CLOCK_MANAGER_H_ |
| Chin Liang See | cb35060 | 2014-03-04 22:13:53 -0600 | [diff] [blame] | 9 | |
| Pavel Machek | 7c8d5a6 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 10 | #ifndef __ASSEMBLER__ |
| Ley Foon Tan | ec6f882 | 2017-04-26 02:44:33 +0800 | [diff] [blame] | 11 | void cm_wait_for_lock(u32 mask); |
| 12 | int cm_wait_for_fsm(void); |
| 13 | void cm_print_clock_quick_summary(void); |
| Pavel Machek | 7c8d5a6 | 2014-09-08 14:08:45 +0200 | [diff] [blame] | 14 | #endif |
| 15 | |
| Ley Foon Tan | ec6f882 | 2017-04-26 02:44:33 +0800 | [diff] [blame] | 16 | #if defined(CONFIG_TARGET_SOCFPGA_GEN5) |
| 17 | #include <asm/arch/clock_manager_gen5.h> |
| Ley Foon Tan | ca40f29 | 2017-04-26 02:44:39 +0800 | [diff] [blame] | 18 | #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) |
| 19 | #include <asm/arch/clock_manager_arria10.h> |
| Ley Foon Tan | ec6f882 | 2017-04-26 02:44:33 +0800 | [diff] [blame] | 20 | #endif |
| Ley Foon Tan | ca40f29 | 2017-04-26 02:44:39 +0800 | [diff] [blame] | 21 | |
| Chin Liang See | cb35060 | 2014-03-04 22:13:53 -0600 | [diff] [blame] | 22 | #endif /* _CLOCK_MANAGER_H_ */ |