Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2017 Linaro |
| 4 | * Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 5 | */ |
| 6 | |
Simon Glass | fb6f482 | 2020-02-03 07:36:17 -0700 | [diff] [blame] | 7 | #include <common.h> |
Simon Glass | afb0215 | 2019-12-28 10:45:01 -0700 | [diff] [blame] | 8 | #include <cpu_func.h> |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 9 | #include <dm.h> |
Simon Glass | 8e16b1e | 2019-12-28 10:45:05 -0700 | [diff] [blame] | 10 | #include <init.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame^] | 11 | #include <asm/cache.h> |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 12 | #include <asm/io.h> |
| 13 | #include <dm/platform_data/serial_pl01x.h> |
| 14 | #include <asm/arch/hi3798cv200.h> |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 15 | #include <asm/armv8/mmu.h> |
| 16 | |
| 17 | DECLARE_GLOBAL_DATA_PTR; |
| 18 | |
| 19 | static struct mm_region poplar_mem_map[] = { |
| 20 | { |
| 21 | .virt = 0x0UL, |
| 22 | .phys = 0x0UL, |
| 23 | .size = 0x80000000UL, |
| 24 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| 25 | PTE_BLOCK_INNER_SHARE |
| 26 | }, { |
| 27 | .virt = 0x80000000UL, |
| 28 | .phys = 0x80000000UL, |
| 29 | .size = 0x80000000UL, |
| 30 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 31 | PTE_BLOCK_NON_SHARE | |
| 32 | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 33 | }, { |
| 34 | 0, |
| 35 | } |
| 36 | }; |
| 37 | |
| 38 | struct mm_region *mem_map = poplar_mem_map; |
| 39 | |
Shawn Guo | 9bbb50d | 2018-12-12 15:24:44 +0800 | [diff] [blame] | 40 | #if !CONFIG_IS_ENABLED(OF_CONTROL) |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 41 | static const struct pl01x_serial_platdata serial_platdata = { |
| 42 | .base = REG_BASE_UART0, |
| 43 | .type = TYPE_PL010, |
| 44 | .clock = 75000000, |
| 45 | }; |
| 46 | |
| 47 | U_BOOT_DEVICE(poplar_serial) = { |
| 48 | .name = "serial_pl01x", |
| 49 | .platdata = &serial_platdata, |
| 50 | }; |
Shawn Guo | 9bbb50d | 2018-12-12 15:24:44 +0800 | [diff] [blame] | 51 | #endif |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 52 | |
| 53 | int checkboard(void) |
| 54 | { |
| 55 | puts("BOARD: Hisilicon HI3798cv200 Poplar\n"); |
| 56 | |
| 57 | return 0; |
| 58 | } |
| 59 | |
| 60 | void reset_cpu(ulong addr) |
| 61 | { |
| 62 | psci_system_reset(); |
| 63 | } |
| 64 | |
| 65 | int dram_init(void) |
| 66 | { |
| 67 | gd->ram_size = get_ram_size(NULL, 0x80000000); |
| 68 | |
| 69 | return 0; |
| 70 | } |
| 71 | |
| 72 | /* |
| 73 | * Some linux kernel versions don't use memory before its load address, so to |
| 74 | * be generic we just pretend it isn't there. In previous uboot versions we |
| 75 | * carved the space used by BL31 (runs in DDR on this platfomr) so the PSCI code |
| 76 | * could persist in memory and be left alone by the kernel. |
| 77 | * |
| 78 | * That led to a problem when mapping memory in older kernels. That PSCI code |
| 79 | * now lies in memory below the kernel load offset; it therefore won't be |
| 80 | * touched by the kernel, and by not specially reserving it we avoid the mapping |
| 81 | * problem as well. |
| 82 | * |
| 83 | */ |
| 84 | #define KERNEL_TEXT_OFFSET 0x00080000 |
| 85 | |
| 86 | int dram_init_banksize(void) |
| 87 | { |
| 88 | gd->bd->bi_dram[0].start = KERNEL_TEXT_OFFSET; |
| 89 | gd->bd->bi_dram[0].size = gd->ram_size - gd->bd->bi_dram[0].start; |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
| 94 | static void usb2_phy_config(void) |
| 95 | { |
| 96 | const u32 config[] = { |
| 97 | /* close EOP pre-emphasis. open data pre-emphasis */ |
| 98 | 0xa1001c, |
| 99 | /* Rcomp = 150mW, increase DC level */ |
| 100 | 0xa00607, |
| 101 | /* keep Rcomp working */ |
| 102 | 0xa10700, |
| 103 | /* Icomp = 212mW, increase current drive */ |
| 104 | 0xa00aab, |
| 105 | /* EMI fix: rx_active not stay 1 when error packets received */ |
| 106 | 0xa11140, |
| 107 | /* Comp mode select */ |
| 108 | 0xa11041, |
| 109 | /* adjust eye diagram */ |
| 110 | 0xa0098c, |
| 111 | /* adjust eye diagram */ |
| 112 | 0xa10a0a, |
| 113 | }; |
| 114 | int i; |
| 115 | |
| 116 | for (i = 0; i < ARRAY_SIZE(config); i++) { |
| 117 | writel(config[i], PERI_CTRL_USB0); |
| 118 | clrsetbits_le32(PERI_CTRL_USB0, BIT(21), BIT(20) | BIT(22)); |
| 119 | udelay(20); |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | static void usb2_phy_init(void) |
| 124 | { |
| 125 | /* reset usb2 controller bus/utmi/roothub */ |
| 126 | setbits_le32(PERI_CRG46, USB2_BUS_SRST_REQ | USB2_UTMI0_SRST_REQ | |
| 127 | USB2_HST_PHY_SYST_REQ | USB2_OTG_PHY_SYST_REQ); |
| 128 | udelay(200); |
| 129 | |
| 130 | /* reset usb2 phy por/utmi */ |
| 131 | setbits_le32(PERI_CRG47, USB2_PHY01_SRST_REQ | USB2_PHY01_SRST_TREQ1); |
| 132 | udelay(200); |
| 133 | |
| 134 | /* open usb2 ref clk */ |
| 135 | setbits_le32(PERI_CRG47, USB2_PHY01_REF_CKEN); |
| 136 | udelay(300); |
| 137 | |
| 138 | /* cancel usb2 power on reset */ |
| 139 | clrbits_le32(PERI_CRG47, USB2_PHY01_SRST_REQ); |
| 140 | udelay(500); |
| 141 | |
| 142 | usb2_phy_config(); |
| 143 | |
| 144 | /* cancel usb2 port reset, wait comp circuit stable */ |
| 145 | clrbits_le32(PERI_CRG47, USB2_PHY01_SRST_TREQ1); |
| 146 | mdelay(10); |
| 147 | |
| 148 | /* open usb2 controller clk */ |
| 149 | setbits_le32(PERI_CRG46, USB2_BUS_CKEN | USB2_OHCI48M_CKEN | |
| 150 | USB2_OHCI12M_CKEN | USB2_OTG_UTMI_CKEN | |
| 151 | USB2_HST_PHY_CKEN | USB2_UTMI0_CKEN); |
| 152 | udelay(200); |
| 153 | |
| 154 | /* cancel usb2 control reset */ |
| 155 | clrbits_le32(PERI_CRG46, USB2_BUS_SRST_REQ | USB2_UTMI0_SRST_REQ | |
| 156 | USB2_HST_PHY_SYST_REQ | USB2_OTG_PHY_SYST_REQ); |
| 157 | udelay(200); |
| 158 | } |
| 159 | |
Shawn Guo | 0f56fde | 2018-12-18 17:52:06 +0800 | [diff] [blame] | 160 | #if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG) |
Simon Glass | 0af6e2d | 2019-08-01 09:46:52 -0600 | [diff] [blame] | 161 | #include <env.h> |
Shawn Guo | 0f56fde | 2018-12-18 17:52:06 +0800 | [diff] [blame] | 162 | #include <usb.h> |
| 163 | #include <usb/dwc2_udc.h> |
| 164 | #include <g_dnl.h> |
| 165 | |
| 166 | static struct dwc2_plat_otg_data poplar_otg_data = { |
| 167 | .regs_otg = HIOTG_BASE_ADDR |
| 168 | }; |
| 169 | |
| 170 | static void set_usb_to_device(void) |
| 171 | { |
| 172 | setbits_le32(PERI_CTRL_USB3, USB2_2P_CHIPID); |
| 173 | } |
| 174 | |
| 175 | int board_usb_init(int index, enum usb_init_type init) |
| 176 | { |
| 177 | set_usb_to_device(); |
| 178 | return dwc2_udc_probe(&poplar_otg_data); |
| 179 | } |
| 180 | |
| 181 | int g_dnl_bind_fixup(struct usb_device_descriptor *dev, const char *name) |
| 182 | { |
| 183 | if (!env_get("serial#")) |
| 184 | g_dnl_set_serialnumber("0123456789POPLAR"); |
| 185 | return 0; |
| 186 | } |
| 187 | #endif |
| 188 | |
Jorge Ramirez-Ortiz | f5b3842 | 2017-06-26 15:52:49 +0200 | [diff] [blame] | 189 | int board_init(void) |
| 190 | { |
| 191 | usb2_phy_init(); |
| 192 | |
| 193 | return 0; |
| 194 | } |
| 195 | |