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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Saket Sinha331141a2015-08-22 12:20:55 +05302/*
3 * Based on acpi.c from coreboot
4 *
5 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
Bin Mengbbcff8d2016-05-07 07:46:22 -07006 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
Saket Sinha331141a2015-08-22 12:20:55 +05307 */
8
Bin Meng3f047072018-07-18 21:42:17 -07009#ifndef __ASM_ACPI_TABLE_H__
10#define __ASM_ACPI_TABLE_H__
11
Simon Glassf4112b02020-09-22 12:45:30 -060012#ifndef __ACPI__
13
Simon Glass3ba929a2020-10-30 21:38:53 -060014#include <pci.h>
15
Simon Glass858fed12020-04-08 16:57:36 -060016struct acpi_facs;
17struct acpi_fadt;
Bin Mengd9050c62016-06-17 02:13:16 -070018struct acpi_global_nvs;
Simon Glass858fed12020-04-08 16:57:36 -060019struct acpi_madt_ioapic;
20struct acpi_madt_irqoverride;
21struct acpi_madt_lapic_nmi;
22struct acpi_mcfg_mmconfig;
23struct acpi_table_header;
Andy Shevchenko6e84f0872018-11-20 23:52:37 +020024
Saket Sinha331141a2015-08-22 12:20:55 +053025/* These can be used by the target port */
26
Patrick Rudolph97b4c8a2024-10-23 15:19:46 +020027int acpi_create_madt_lapics(void *current);
Bin Meng44256b02016-05-07 07:46:25 -070028int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
29 u32 addr, u32 gsi_base);
Saket Sinha331141a2015-08-22 12:20:55 +053030int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
Bin Meng44256b02016-05-07 07:46:25 -070031 u8 bus, u8 source, u32 gsirq, u16 flags);
32int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
33 u8 cpu, u16 flags, u8 lint);
Simon Glass9ed41e72020-07-07 21:32:05 -060034
35/**
Simon Glass4ffe8b02020-09-22 12:45:09 -060036 * acpi_write_hpet() - Write out a HPET table
37 *
38 * Write out the table for High-Precision Event Timers
39 *
40 * @ctx: Current ACPI context
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010041 * Return: 0 if OK, -ve on error
Simon Glass4ffe8b02020-09-22 12:45:09 -060042 */
43int acpi_write_hpet(struct acpi_ctx *ctx);
44
45/**
Simon Glass9ed41e72020-07-07 21:32:05 -060046 * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table
47 *
48 * @gnvs: Table to fill in
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010049 * Return: 0 if OK, -ve on error
Simon Glass9ed41e72020-07-07 21:32:05 -060050 */
51int acpi_create_gnvs(struct acpi_global_nvs *gnvs);
52
Bin Meng34bc74a2017-04-21 07:24:36 -070053/**
Simon Glassd73344b2020-09-22 12:45:14 -060054 * arch_read_sci_irq_select() - Read the system-control interrupt number
55 *
56 * @returns value of IRQ register in the PMC
57 */
58int arch_read_sci_irq_select(void);
59
60/**
61 * arch_write_sci_irq_select() - Set the system-control interrupt number
62 *
63 * @scis: New value for IRQ register in the PMC
64 */
65int arch_write_sci_irq_select(uint scis);
66
67/**
68 * arch_madt_sci_irq_polarity() - Return the priority to use for the MADT
69 *
70 * @sci: System-control interrupt number
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010071 * Return: priority to use (MP_IRQ_POLARITY_...)
Simon Glassd73344b2020-09-22 12:45:14 -060072 */
73int arch_madt_sci_irq_polarity(int sci);
74
Simon Glass87cf8d22020-09-22 12:45:16 -060075/**
76 * acpi_create_dmar_drhd() - Create a table for DMA remapping with the IOMMU
77 *
78 * See here for the specification
79 * https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf
80 *
81 * @ctx: ACPI context pointer
82 * @flags: (DRHD_INCLUDE_...)
83 * @segment: PCI segment asscociated with this unit
84 * @bar: Base address of remapping hardware register-set for this unit
85 */
86void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
87 u64 bar);
88
89/**
90 * acpi_create_dmar_rmrr() - Set up an RMRR
91 *
92 * This sets up a Reserved-Memory Region Reporting structure, used to allow
93 * DMA to regions used by devices that the BIOS controls.
94 *
95 * @ctx: ACPI context pointer
96 * @segment: PCI segment asscociated with this unit
97 * @bar: Base address of mapping
98 * @limit: End address of mapping
99 */
100void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
101 u64 limit);
102
103/**
104 * acpi_dmar_drhd_fixup() - Set the length of an DRHD
105 *
106 * This sets the DRHD length field based on the current ctx->current
107 *
108 * @ctx: ACPI context pointer
109 * @base: Address of the start of the DRHD
110 */
111void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base);
112
113/**
114 * acpi_dmar_rmrr_fixup() - Set the length of an RMRR
115 *
116 * This sets the RMRR length field based on the current ctx->current
117 *
118 * @ctx: ACPI context pointer
119 * @base: Address of the start of the RMRR
120 */
121void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base);
122
123/**
124 * acpi_create_dmar_ds_pci() - Set up a DMAR scope for a PCI device
125 *
126 * @ctx: ACPI context pointer
127 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100128 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600129 */
130int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf);
131
132/**
133 * acpi_create_dmar_ds_pci_br() - Set up a DMAR scope for a PCI bridge
134 *
135 * This is used to provide a mapping for a PCI bridge
136 *
137 * @ctx: ACPI context pointer
138 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100139 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600140 */
141int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf);
142
143/**
144 * acpi_create_dmar_ds_ioapic() - Set up a DMAR scope for an IOAPIC device
145 *
146 * @ctx: ACPI context pointer
147 * @enumeration_id: Enumeration ID (typically 2)
148 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100149 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600150 */
151int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
152 pci_dev_t bdf);
153
154/**
155 * acpi_create_dmar_ds_msi_hpet() - Set up a DMAR scope for an HPET
156 *
157 * Sets up a scope for a High-Precision Event Timer that supports
158 * Message-Signalled Interrupts
159 *
160 * @ctx: ACPI context pointer
161 * @enumeration_id: Enumeration ID (typically 0)
162 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100163 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600164 */
165int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
166 pci_dev_t bdf);
167
168/**
Simon Glass87cf8d22020-09-22 12:45:16 -0600169 * intel_acpi_fill_fadt() - Set up the contents of the FADT
170 *
171 * This sets up parts of the Fixed ACPI Description Table that are common to
172 * Intel chips
173 *
174 * @fadt: Pointer to place to put FADT
175 */
176void intel_acpi_fill_fadt(struct acpi_fadt *fadt);
177
Simon Glassf4112b02020-09-22 12:45:30 -0600178#endif /* !__ACPI__ */
179
Bin Meng3f047072018-07-18 21:42:17 -0700180#endif /* __ASM_ACPI_TABLE_H__ */