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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Saket Sinha331141a2015-08-22 12:20:55 +05302/*
3 * Based on acpi.c from coreboot
4 *
5 * Copyright (C) 2015, Saket Sinha <saket.sinha89@gmail.com>
Bin Mengbbcff8d2016-05-07 07:46:22 -07006 * Copyright (C) 2016, Bin Meng <bmeng.cn@gmail.com>
Saket Sinha331141a2015-08-22 12:20:55 +05307 */
8
Bin Meng3f047072018-07-18 21:42:17 -07009#ifndef __ASM_ACPI_TABLE_H__
10#define __ASM_ACPI_TABLE_H__
11
Simon Glassf4112b02020-09-22 12:45:30 -060012#ifndef __ACPI__
13
Simon Glass3ba929a2020-10-30 21:38:53 -060014#include <pci.h>
15
Simon Glass858fed12020-04-08 16:57:36 -060016struct acpi_facs;
17struct acpi_fadt;
Bin Mengd9050c62016-06-17 02:13:16 -070018struct acpi_global_nvs;
Simon Glass858fed12020-04-08 16:57:36 -060019struct acpi_madt_ioapic;
20struct acpi_madt_irqoverride;
21struct acpi_madt_lapic_nmi;
22struct acpi_mcfg_mmconfig;
23struct acpi_table_header;
Andy Shevchenko6e84f0872018-11-20 23:52:37 +020024
Saket Sinha331141a2015-08-22 12:20:55 +053025/* These can be used by the target port */
26
Patrick Rudolph97b4c8a2024-10-23 15:19:46 +020027int acpi_create_madt_lapics(void *current);
Bin Meng44256b02016-05-07 07:46:25 -070028int acpi_create_madt_ioapic(struct acpi_madt_ioapic *ioapic, u8 id,
29 u32 addr, u32 gsi_base);
Saket Sinha331141a2015-08-22 12:20:55 +053030int acpi_create_madt_irqoverride(struct acpi_madt_irqoverride *irqoverride,
Bin Meng44256b02016-05-07 07:46:25 -070031 u8 bus, u8 source, u32 gsirq, u16 flags);
32int acpi_create_madt_lapic_nmi(struct acpi_madt_lapic_nmi *lapic_nmi,
33 u8 cpu, u16 flags, u8 lint);
Andy Shevchenkoc1ae9802017-07-21 22:32:05 +030034int acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base,
35 u16 seg_nr, u8 start, u8 end);
Simon Glass9ed41e72020-07-07 21:32:05 -060036
37/**
Simon Glass4ffe8b02020-09-22 12:45:09 -060038 * acpi_write_hpet() - Write out a HPET table
39 *
40 * Write out the table for High-Precision Event Timers
41 *
42 * @ctx: Current ACPI context
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010043 * Return: 0 if OK, -ve on error
Simon Glass4ffe8b02020-09-22 12:45:09 -060044 */
45int acpi_write_hpet(struct acpi_ctx *ctx);
46
47/**
Simon Glass9ed41e72020-07-07 21:32:05 -060048 * acpi_create_gnvs() - Create a GNVS (Global Non Volatile Storage) table
49 *
50 * @gnvs: Table to fill in
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010051 * Return: 0 if OK, -ve on error
Simon Glass9ed41e72020-07-07 21:32:05 -060052 */
53int acpi_create_gnvs(struct acpi_global_nvs *gnvs);
54
Bin Meng34bc74a2017-04-21 07:24:36 -070055/**
Simon Glassd73344b2020-09-22 12:45:14 -060056 * arch_read_sci_irq_select() - Read the system-control interrupt number
57 *
58 * @returns value of IRQ register in the PMC
59 */
60int arch_read_sci_irq_select(void);
61
62/**
63 * arch_write_sci_irq_select() - Set the system-control interrupt number
64 *
65 * @scis: New value for IRQ register in the PMC
66 */
67int arch_write_sci_irq_select(uint scis);
68
69/**
70 * arch_madt_sci_irq_polarity() - Return the priority to use for the MADT
71 *
72 * @sci: System-control interrupt number
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +010073 * Return: priority to use (MP_IRQ_POLARITY_...)
Simon Glassd73344b2020-09-22 12:45:14 -060074 */
75int arch_madt_sci_irq_polarity(int sci);
76
Simon Glass87cf8d22020-09-22 12:45:16 -060077/**
78 * acpi_create_dmar_drhd() - Create a table for DMA remapping with the IOMMU
79 *
80 * See here for the specification
81 * https://software.intel.com/sites/default/files/managed/c5/15/vt-directed-io-spec.pdf
82 *
83 * @ctx: ACPI context pointer
84 * @flags: (DRHD_INCLUDE_...)
85 * @segment: PCI segment asscociated with this unit
86 * @bar: Base address of remapping hardware register-set for this unit
87 */
88void acpi_create_dmar_drhd(struct acpi_ctx *ctx, uint flags, uint segment,
89 u64 bar);
90
91/**
92 * acpi_create_dmar_rmrr() - Set up an RMRR
93 *
94 * This sets up a Reserved-Memory Region Reporting structure, used to allow
95 * DMA to regions used by devices that the BIOS controls.
96 *
97 * @ctx: ACPI context pointer
98 * @segment: PCI segment asscociated with this unit
99 * @bar: Base address of mapping
100 * @limit: End address of mapping
101 */
102void acpi_create_dmar_rmrr(struct acpi_ctx *ctx, uint segment, u64 bar,
103 u64 limit);
104
105/**
106 * acpi_dmar_drhd_fixup() - Set the length of an DRHD
107 *
108 * This sets the DRHD length field based on the current ctx->current
109 *
110 * @ctx: ACPI context pointer
111 * @base: Address of the start of the DRHD
112 */
113void acpi_dmar_drhd_fixup(struct acpi_ctx *ctx, void *base);
114
115/**
116 * acpi_dmar_rmrr_fixup() - Set the length of an RMRR
117 *
118 * This sets the RMRR length field based on the current ctx->current
119 *
120 * @ctx: ACPI context pointer
121 * @base: Address of the start of the RMRR
122 */
123void acpi_dmar_rmrr_fixup(struct acpi_ctx *ctx, void *base);
124
125/**
126 * acpi_create_dmar_ds_pci() - Set up a DMAR scope for a PCI device
127 *
128 * @ctx: ACPI context pointer
129 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100130 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600131 */
132int acpi_create_dmar_ds_pci(struct acpi_ctx *ctx, pci_dev_t bdf);
133
134/**
135 * acpi_create_dmar_ds_pci_br() - Set up a DMAR scope for a PCI bridge
136 *
137 * This is used to provide a mapping for a PCI bridge
138 *
139 * @ctx: ACPI context pointer
140 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100141 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600142 */
143int acpi_create_dmar_ds_pci_br(struct acpi_ctx *ctx, pci_dev_t bdf);
144
145/**
146 * acpi_create_dmar_ds_ioapic() - Set up a DMAR scope for an IOAPIC device
147 *
148 * @ctx: ACPI context pointer
149 * @enumeration_id: Enumeration ID (typically 2)
150 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100151 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600152 */
153int acpi_create_dmar_ds_ioapic(struct acpi_ctx *ctx, uint enumeration_id,
154 pci_dev_t bdf);
155
156/**
157 * acpi_create_dmar_ds_msi_hpet() - Set up a DMAR scope for an HPET
158 *
159 * Sets up a scope for a High-Precision Event Timer that supports
160 * Message-Signalled Interrupts
161 *
162 * @ctx: ACPI context pointer
163 * @enumeration_id: Enumeration ID (typically 0)
164 * @bdf: PCI device to add
Heinrich Schuchardt47b4c022022-01-19 18:05:50 +0100165 * Return: length of mapping in bytes
Simon Glass87cf8d22020-09-22 12:45:16 -0600166 */
167int acpi_create_dmar_ds_msi_hpet(struct acpi_ctx *ctx, uint enumeration_id,
168 pci_dev_t bdf);
169
170/**
Simon Glass87cf8d22020-09-22 12:45:16 -0600171 * intel_acpi_fill_fadt() - Set up the contents of the FADT
172 *
173 * This sets up parts of the Fixed ACPI Description Table that are common to
174 * Intel chips
175 *
176 * @fadt: Pointer to place to put FADT
177 */
178void intel_acpi_fill_fadt(struct acpi_fadt *fadt);
179
Simon Glassf4112b02020-09-22 12:45:30 -0600180#endif /* !__ACPI__ */
181
Bin Meng3f047072018-07-18 21:42:17 -0700182#endif /* __ASM_ACPI_TABLE_H__ */