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Poonam Aggrwal91208842009-07-31 12:07:45 +05301/*
Prabhakar Kushwahabeebb882012-04-24 20:16:49 +00002 * Copyright 2009-2012 Freescale Semiconductor, Inc.
Poonam Aggrwal91208842009-07-31 12:07:45 +05303 *
Stefan Roese88fbf932010-04-15 16:07:28 +02004 * This file is derived from arch/powerpc/cpu/mpc85xx/cpu.c and
5 * arch/powerpc/cpu/mpc86xx/cpu.c. Basically this file contains
Peter Tyser29514c72010-04-12 22:28:09 -05006 * cpu specific common code for 85xx/86xx processors.
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Poonam Aggrwal91208842009-07-31 12:07:45 +05308 */
9
10#include <config.h>
11#include <common.h>
12#include <command.h>
13#include <tsec.h>
Kumar Gala2683c532011-04-13 08:37:44 -050014#include <fm_eth.h>
Poonam Aggrwal91208842009-07-31 12:07:45 +053015#include <netdev.h>
16#include <asm/cache.h>
17#include <asm/io.h>
18
19DECLARE_GLOBAL_DATA_PTR;
20
Kim Phillips82f576f2012-10-29 13:34:37 +000021static struct cpu_type cpu_type_list[] = {
Poonam Aggrwal91208842009-07-31 12:07:45 +053022#if defined(CONFIG_MPC85xx)
Poonam Aggrwal4baef822009-07-31 12:08:14 +053023 CPU_TYPE_ENTRY(8533, 8533, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053024 CPU_TYPE_ENTRY(8535, 8535, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053025 CPU_TYPE_ENTRY(8536, 8536, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053026 CPU_TYPE_ENTRY(8540, 8540, 1),
27 CPU_TYPE_ENTRY(8541, 8541, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053028 CPU_TYPE_ENTRY(8543, 8543, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053029 CPU_TYPE_ENTRY(8544, 8544, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053030 CPU_TYPE_ENTRY(8545, 8545, 1),
York Sun8cb65482012-07-06 17:10:33 -050031 CPU_TYPE_ENTRY(8547, 8547, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053032 CPU_TYPE_ENTRY(8548, 8548, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053033 CPU_TYPE_ENTRY(8555, 8555, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053034 CPU_TYPE_ENTRY(8560, 8560, 1),
35 CPU_TYPE_ENTRY(8567, 8567, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053036 CPU_TYPE_ENTRY(8568, 8568, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053037 CPU_TYPE_ENTRY(8569, 8569, 1),
Poonam Aggrwal4baef822009-07-31 12:08:14 +053038 CPU_TYPE_ENTRY(8572, 8572, 2),
Poonam Aggrwal2ba3ee02011-01-13 21:39:27 +053039 CPU_TYPE_ENTRY(P1010, P1010, 1),
Poonam Aggrwal13e21b12009-08-20 18:57:45 +053040 CPU_TYPE_ENTRY(P1011, P1011, 1),
Kumar Gala16a276e2010-03-30 23:06:53 -050041 CPU_TYPE_ENTRY(P1012, P1012, 1),
Kumar Gala16a276e2010-03-30 23:06:53 -050042 CPU_TYPE_ENTRY(P1013, P1013, 1),
Poonam Aggrwalb07a7de2011-01-13 21:40:05 +053043 CPU_TYPE_ENTRY(P1014, P1014, 1),
Roy Zang1de20b02011-02-03 22:14:19 -060044 CPU_TYPE_ENTRY(P1017, P1017, 1),
Poonam Aggrwaldfe86a72009-07-31 12:08:27 +053045 CPU_TYPE_ENTRY(P1020, P1020, 2),
Kumar Gala16a276e2010-03-30 23:06:53 -050046 CPU_TYPE_ENTRY(P1021, P1021, 2),
Kumar Gala16a276e2010-03-30 23:06:53 -050047 CPU_TYPE_ENTRY(P1022, P1022, 2),
Roy Zang1de20b02011-02-03 22:14:19 -060048 CPU_TYPE_ENTRY(P1023, P1023, 2),
Kumar Galae4e69252011-02-05 13:45:07 -060049 CPU_TYPE_ENTRY(P1024, P1024, 2),
Kumar Galae4e69252011-02-05 13:45:07 -060050 CPU_TYPE_ENTRY(P1025, P1025, 2),
Poonam Aggrwal13e21b12009-08-20 18:57:45 +053051 CPU_TYPE_ENTRY(P2010, P2010, 1),
Poonam Aggrwal13e21b12009-08-20 18:57:45 +053052 CPU_TYPE_ENTRY(P2020, P2020, 2),
Kumar Galabd29be82010-06-01 10:29:11 -050053 CPU_TYPE_ENTRY(P2040, P2040, 4),
Kumar Gala619541b2011-05-13 01:16:07 -050054 CPU_TYPE_ENTRY(P2041, P2041, 4),
Kumar Galaf2134b82010-01-27 10:26:46 -060055 CPU_TYPE_ENTRY(P3041, P3041, 4),
Kumar Galabb5409c2009-03-19 02:39:17 -050056 CPU_TYPE_ENTRY(P4040, P4040, 4),
Kumar Galabb5409c2009-03-19 02:39:17 -050057 CPU_TYPE_ENTRY(P4080, P4080, 8),
Kumar Gala7ee3d942009-10-21 13:32:58 -050058 CPU_TYPE_ENTRY(P5010, P5010, 1),
Kumar Gala7ee3d942009-10-21 13:32:58 -050059 CPU_TYPE_ENTRY(P5020, P5020, 2),
Timur Tabid5e13882012-10-05 11:09:19 +000060 CPU_TYPE_ENTRY(P5021, P5021, 2),
61 CPU_TYPE_ENTRY(P5040, P5040, 4),
York Sun9941a222012-10-08 07:44:19 +000062 CPU_TYPE_ENTRY(T4240, T4240, 0),
63 CPU_TYPE_ENTRY(T4120, T4120, 0),
York Sunfb5137a2013-03-25 07:33:29 +000064 CPU_TYPE_ENTRY(T4160, T4160, 0),
Shengzhou Liu26ed2d02014-04-25 16:31:22 +080065 CPU_TYPE_ENTRY(T4080, T4080, 4),
York Sunbcf7b3d2012-10-08 07:44:20 +000066 CPU_TYPE_ENTRY(B4860, B4860, 0),
67 CPU_TYPE_ENTRY(G4860, G4860, 0),
York Sunbcf7b3d2012-10-08 07:44:20 +000068 CPU_TYPE_ENTRY(B4440, B4440, 0),
Shaveta Leekha00e6ea32014-05-07 14:43:23 +053069 CPU_TYPE_ENTRY(B4460, B4460, 0),
York Sunbcf7b3d2012-10-08 07:44:20 +000070 CPU_TYPE_ENTRY(G4440, G4440, 0),
71 CPU_TYPE_ENTRY(B4420, B4420, 0),
72 CPU_TYPE_ENTRY(B4220, B4220, 0),
York Sun46571362013-03-25 07:40:06 +000073 CPU_TYPE_ENTRY(T1040, T1040, 0),
74 CPU_TYPE_ENTRY(T1041, T1041, 0),
75 CPU_TYPE_ENTRY(T1042, T1042, 0),
76 CPU_TYPE_ENTRY(T1020, T1020, 0),
77 CPU_TYPE_ENTRY(T1021, T1021, 0),
78 CPU_TYPE_ENTRY(T1022, T1022, 0),
Shengzhou Liuf305cd22013-11-22 17:39:10 +080079 CPU_TYPE_ENTRY(T2080, T2080, 0),
80 CPU_TYPE_ENTRY(T2081, T2081, 0),
Prabhakar Kushwahabeebb882012-04-24 20:16:49 +000081 CPU_TYPE_ENTRY(BSC9130, 9130, 1),
Prabhakar Kushwahabeebb882012-04-24 20:16:49 +000082 CPU_TYPE_ENTRY(BSC9131, 9131, 1),
Prabhakar Kushwaha92543c22013-01-23 17:59:57 +000083 CPU_TYPE_ENTRY(BSC9132, 9132, 2),
84 CPU_TYPE_ENTRY(BSC9232, 9232, 2),
Mingkai Hu1a258072013-07-04 17:30:36 +080085 CPU_TYPE_ENTRY(C291, C291, 1),
86 CPU_TYPE_ENTRY(C292, C292, 1),
87 CPU_TYPE_ENTRY(C293, C293, 1),
Poonam Aggrwal91208842009-07-31 12:07:45 +053088#elif defined(CONFIG_MPC86xx)
Poonam Aggrwal4baef822009-07-31 12:08:14 +053089 CPU_TYPE_ENTRY(8610, 8610, 1),
90 CPU_TYPE_ENTRY(8641, 8641, 2),
91 CPU_TYPE_ENTRY(8641D, 8641D, 2),
Poonam Aggrwal91208842009-07-31 12:07:45 +053092#endif
93};
94
York Sun7b2947f2012-08-17 08:20:22 +000095#ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
York Sunaa150bb2013-03-25 07:40:07 +000096static inline u32 init_type(u32 cluster, int init_id)
97{
98 ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
99 u32 idx = (cluster >> (init_id * 8)) & TP_CLUSTER_INIT_MASK;
100 u32 type = in_be32(&gur->tp_ityp[idx]);
101
102 if (type & TP_ITYP_AV)
103 return type;
104
105 return 0;
106}
107
York Sun7b2947f2012-08-17 08:20:22 +0000108u32 compute_ppc_cpumask(void)
109{
York Sunaa150bb2013-03-25 07:40:07 +0000110 ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
York Sun7b2947f2012-08-17 08:20:22 +0000111 int i = 0, count = 0;
York Sunaa150bb2013-03-25 07:40:07 +0000112 u32 cluster, type, mask = 0;
York Sun7b2947f2012-08-17 08:20:22 +0000113
114 do {
115 int j;
York Sunaa150bb2013-03-25 07:40:07 +0000116 cluster = in_be32(&gur->tp_cluster[i].lower);
117 for (j = 0; j < TP_INIT_PER_CLUSTER; j++) {
118 type = init_type(cluster, j);
119 if (type) {
York Sun7b2947f2012-08-17 08:20:22 +0000120 if (TP_ITYP_TYPE(type) == TP_ITYP_TYPE_PPC)
121 mask |= 1 << count;
York Sunaa150bb2013-03-25 07:40:07 +0000122 count++;
York Sun7b2947f2012-08-17 08:20:22 +0000123 }
York Sun7b2947f2012-08-17 08:20:22 +0000124 }
York Sunaa150bb2013-03-25 07:40:07 +0000125 i++;
York Sun7b2947f2012-08-17 08:20:22 +0000126 } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC);
127
128 return mask;
129}
York Sunaa150bb2013-03-25 07:40:07 +0000130
131int fsl_qoriq_core_to_cluster(unsigned int core)
132{
133 ccsr_gur_t *gur = (void __iomem *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
134 int i = 0, count = 0;
135 u32 cluster;
136
137 do {
138 int j;
139 cluster = in_be32(&gur->tp_cluster[i].lower);
140 for (j = 0; j < TP_INIT_PER_CLUSTER; j++) {
141 if (init_type(cluster, j)) {
142 if (count == core)
143 return i;
144 count++;
145 }
146 }
147 i++;
148 } while ((cluster & TP_CLUSTER_EOC) != TP_CLUSTER_EOC);
149
150 return -1; /* cannot identify the cluster */
151}
152
York Sun7b2947f2012-08-17 08:20:22 +0000153#else /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
154/*
155 * Before chassis genenration 2, the cpumask should be hard-coded.
156 * In case of cpu type unknown or cpumask unset, use 1 as fail save.
157 */
158#define compute_ppc_cpumask() 1
York Sunaa150bb2013-03-25 07:40:07 +0000159#define fsl_qoriq_core_to_cluster(x) x
York Sun7b2947f2012-08-17 08:20:22 +0000160#endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
161
Kim Phillips82f576f2012-10-29 13:34:37 +0000162static struct cpu_type cpu_type_unknown = CPU_TYPE_ENTRY(Unknown, Unknown, 0);
Poonam Aggrwalda6e1ca2009-09-02 13:35:21 +0530163
Poonam Aggrwal91208842009-07-31 12:07:45 +0530164struct cpu_type *identify_cpu(u32 ver)
165{
166 int i;
167 for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) {
168 if (cpu_type_list[i].soc_ver == ver)
169 return &cpu_type_list[i];
170 }
Poonam Aggrwalda6e1ca2009-09-02 13:35:21 +0530171 return &cpu_type_unknown;
Poonam Aggrwal91208842009-07-31 12:07:45 +0530172}
173
Timur Tabi47289422011-08-05 16:15:24 -0500174#define MPC8xxx_PICFRR_NCPU_MASK 0x00001f00
175#define MPC8xxx_PICFRR_NCPU_SHIFT 8
176
177/*
178 * Return a 32-bit mask indicating which cores are present on this SOC.
179 */
Alexander Graf5b9e18c2014-04-30 19:21:10 +0200180__weak u32 cpu_mask(void)
Timur Tabi47289422011-08-05 16:15:24 -0500181{
182 ccsr_pic_t __iomem *pic = (void *)CONFIG_SYS_MPC8xxx_PIC_ADDR;
Simon Glassa8b57392012-12-13 20:48:48 +0000183 struct cpu_type *cpu = gd->arch.cpu;
Timur Tabi47289422011-08-05 16:15:24 -0500184
185 /* better to query feature reporting register than just assume 1 */
186 if (cpu == &cpu_type_unknown)
187 return ((in_be32(&pic->frr) & MPC8xxx_PICFRR_NCPU_MASK) >>
188 MPC8xxx_PICFRR_NCPU_SHIFT) + 1;
189
York Sun7b2947f2012-08-17 08:20:22 +0000190 if (cpu->num_cores == 0)
191 return compute_ppc_cpumask();
192
Timur Tabi47289422011-08-05 16:15:24 -0500193 return cpu->mask;
194}
195
196/*
197 * Return the number of cores on this SOC.
198 */
Alexander Graf5b9e18c2014-04-30 19:21:10 +0200199__weak int cpu_numcores(void)
Kim Phillips82f576f2012-10-29 13:34:37 +0000200{
Simon Glassa8b57392012-12-13 20:48:48 +0000201 struct cpu_type *cpu = gd->arch.cpu;
Kim Phillips875935e2010-07-14 19:47:29 -0500202
York Sun7b2947f2012-08-17 08:20:22 +0000203 /*
204 * Report # of cores in terms of the cpu_mask if we haven't
205 * figured out how many there are yet
206 */
207 if (cpu->num_cores == 0)
208 return hweight32(cpu_mask());
Kim Phillips875935e2010-07-14 19:47:29 -0500209
Poonam Aggrwal4baef822009-07-31 12:08:14 +0530210 return cpu->num_cores;
211}
212
Timur Tabi47289422011-08-05 16:15:24 -0500213/*
214 * Check if the given core ID is valid
215 *
216 * Returns zero if it isn't, 1 if it is.
217 */
218int is_core_valid(unsigned int core)
219{
York Sun7b2947f2012-08-17 08:20:22 +0000220 return !!((1 << core) & cpu_mask());
Timur Tabi47289422011-08-05 16:15:24 -0500221}
222
Poonam Aggrwal4baef822009-07-31 12:08:14 +0530223int probecpu (void)
224{
225 uint svr;
226 uint ver;
227
228 svr = get_svr();
229 ver = SVR_SOC_VER(svr);
230
Simon Glassa8b57392012-12-13 20:48:48 +0000231 gd->arch.cpu = identify_cpu(ver);
Poonam Aggrwal4baef822009-07-31 12:08:14 +0530232
Poonam Aggrwal4baef822009-07-31 12:08:14 +0530233 return 0;
234}
235
York Sun7b2947f2012-08-17 08:20:22 +0000236/* Once in memory, compute mask & # cores once and save them off */
237int fixup_cpu(void)
238{
Simon Glassa8b57392012-12-13 20:48:48 +0000239 struct cpu_type *cpu = gd->arch.cpu;
York Sun7b2947f2012-08-17 08:20:22 +0000240
241 if (cpu->num_cores == 0) {
242 cpu->mask = cpu_mask();
243 cpu->num_cores = cpu_numcores();
244 }
245
246 return 0;
247}
248
Poonam Aggrwal91208842009-07-31 12:07:45 +0530249/*
250 * Initializes on-chip ethernet controllers.
251 * to override, implement board_eth_init()
252 */
253int cpu_eth_init(bd_t *bis)
254{
255#if defined(CONFIG_ETHER_ON_FCC)
256 fec_initialize(bis);
257#endif
258
259#if defined(CONFIG_UEC_ETH)
260 uec_standard_init(bis);
261#endif
262
263#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC)
264 tsec_standard_init(bis);
265#endif
266
Kumar Gala2683c532011-04-13 08:37:44 -0500267#ifdef CONFIG_FMAN_ENET
268 fm_standard_init(bis);
269#endif
Poonam Aggrwal91208842009-07-31 12:07:45 +0530270 return 0;
271}