| Poonam Aggrwal | 9120884 | 2009-07-31 12:07:45 +0530 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright 2009 Freescale Semiconductor, Inc. |
| 3 | * |
| 4 | * This file is derived from cpu/mpc85xx/cpu.c and cpu/mpc86xx/cpu.c. |
| 5 | * Basically this file contains cpu specific common code for 85xx/86xx |
| 6 | * processors. |
| 7 | * See file CREDITS for list of people who contributed to this |
| 8 | * project. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License as |
| 12 | * published by the Free Software Foundation; either version 2 of |
| 13 | * the License, or (at your option) any later version. |
| 14 | * |
| 15 | * This program is distributed in the hope that it will be useful, |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 18 | * GNU General Public License for more details. |
| 19 | * |
| 20 | * You should have received a copy of the GNU General Public License |
| 21 | * along with this program; if not, write to the Free Software |
| 22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 23 | * MA 02111-1307 USA |
| 24 | */ |
| 25 | |
| 26 | #include <config.h> |
| 27 | #include <common.h> |
| 28 | #include <command.h> |
| 29 | #include <tsec.h> |
| 30 | #include <netdev.h> |
| 31 | #include <asm/cache.h> |
| 32 | #include <asm/io.h> |
| 33 | |
| 34 | DECLARE_GLOBAL_DATA_PTR; |
| 35 | |
| 36 | struct cpu_type cpu_type_list [] = { |
| 37 | #if defined(CONFIG_MPC85xx) |
| 38 | CPU_TYPE_ENTRY(8533, 8533), |
| 39 | CPU_TYPE_ENTRY(8533, 8533_E), |
| 40 | CPU_TYPE_ENTRY(8535, 8535), |
| 41 | CPU_TYPE_ENTRY(8535, 8535_E), |
| 42 | CPU_TYPE_ENTRY(8536, 8536), |
| 43 | CPU_TYPE_ENTRY(8536, 8536_E), |
| 44 | CPU_TYPE_ENTRY(8540, 8540), |
| 45 | CPU_TYPE_ENTRY(8541, 8541), |
| 46 | CPU_TYPE_ENTRY(8541, 8541_E), |
| 47 | CPU_TYPE_ENTRY(8543, 8543), |
| 48 | CPU_TYPE_ENTRY(8543, 8543_E), |
| 49 | CPU_TYPE_ENTRY(8544, 8544), |
| 50 | CPU_TYPE_ENTRY(8544, 8544_E), |
| 51 | CPU_TYPE_ENTRY(8545, 8545), |
| 52 | CPU_TYPE_ENTRY(8545, 8545_E), |
| 53 | CPU_TYPE_ENTRY(8547, 8547_E), |
| 54 | CPU_TYPE_ENTRY(8548, 8548), |
| 55 | CPU_TYPE_ENTRY(8548, 8548_E), |
| 56 | CPU_TYPE_ENTRY(8555, 8555), |
| 57 | CPU_TYPE_ENTRY(8555, 8555_E), |
| 58 | CPU_TYPE_ENTRY(8560, 8560), |
| 59 | CPU_TYPE_ENTRY(8567, 8567), |
| 60 | CPU_TYPE_ENTRY(8567, 8567_E), |
| 61 | CPU_TYPE_ENTRY(8568, 8568), |
| 62 | CPU_TYPE_ENTRY(8568, 8568_E), |
| 63 | CPU_TYPE_ENTRY(8569, 8569), |
| 64 | CPU_TYPE_ENTRY(8569, 8569_E), |
| 65 | CPU_TYPE_ENTRY(8572, 8572), |
| 66 | CPU_TYPE_ENTRY(8572, 8572_E), |
| 67 | CPU_TYPE_ENTRY(P2020, P2020), |
| 68 | CPU_TYPE_ENTRY(P2020, P2020_E), |
| 69 | #elif defined(CONFIG_MPC86xx) |
| 70 | CPU_TYPE_ENTRY(8610, 8610), |
| 71 | CPU_TYPE_ENTRY(8641, 8641), |
| 72 | CPU_TYPE_ENTRY(8641D, 8641D), |
| 73 | #endif |
| 74 | }; |
| 75 | |
| 76 | struct cpu_type *identify_cpu(u32 ver) |
| 77 | { |
| 78 | int i; |
| 79 | for (i = 0; i < ARRAY_SIZE(cpu_type_list); i++) { |
| 80 | if (cpu_type_list[i].soc_ver == ver) |
| 81 | return &cpu_type_list[i]; |
| 82 | } |
| 83 | |
| 84 | return NULL; |
| 85 | } |
| 86 | |
| 87 | /* |
| 88 | * Initializes on-chip ethernet controllers. |
| 89 | * to override, implement board_eth_init() |
| 90 | */ |
| 91 | int cpu_eth_init(bd_t *bis) |
| 92 | { |
| 93 | #if defined(CONFIG_ETHER_ON_FCC) |
| 94 | fec_initialize(bis); |
| 95 | #endif |
| 96 | |
| 97 | #if defined(CONFIG_UEC_ETH) |
| 98 | uec_standard_init(bis); |
| 99 | #endif |
| 100 | |
| 101 | #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) |
| 102 | tsec_standard_init(bis); |
| 103 | #endif |
| 104 | |
| 105 | return 0; |
| 106 | } |