Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2008, Freescale Semiconductor, Inc |
| 3 | * Andy Fleming |
| 4 | * |
| 5 | * Based vaguely on the Linux code |
| 6 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 7 | * SPDX-License-Identifier: GPL-2.0+ |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 8 | */ |
| 9 | |
| 10 | #include <config.h> |
| 11 | #include <common.h> |
| 12 | #include <command.h> |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 13 | #include <dm.h> |
| 14 | #include <dm/device-internal.h> |
Stephen Warren | bf0c785 | 2014-05-23 12:47:06 -0600 | [diff] [blame] | 15 | #include <errno.h> |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 16 | #include <mmc.h> |
| 17 | #include <part.h> |
| 18 | #include <malloc.h> |
Simon Glass | 2dd337a | 2015-09-02 17:24:58 -0600 | [diff] [blame] | 19 | #include <memalign.h> |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 20 | #include <linux/list.h> |
Rabin Vincent | 69d4e2c | 2009-04-05 13:30:54 +0530 | [diff] [blame] | 21 | #include <div64.h> |
Paul Burton | 8d30cc9 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 22 | #include "mmc_private.h" |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 23 | |
| 24 | static struct list_head mmc_devices; |
| 25 | static int cur_dev_num = -1; |
| 26 | |
Jeroen Hofstee | aedeeaa | 2014-07-12 21:24:08 +0200 | [diff] [blame] | 27 | __weak int board_mmc_getwp(struct mmc *mmc) |
Nikita Kiryanov | 020f261 | 2012-12-03 02:19:46 +0000 | [diff] [blame] | 28 | { |
| 29 | return -1; |
| 30 | } |
| 31 | |
| 32 | int mmc_getwp(struct mmc *mmc) |
| 33 | { |
| 34 | int wp; |
| 35 | |
| 36 | wp = board_mmc_getwp(mmc); |
| 37 | |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 38 | if (wp < 0) { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 39 | if (mmc->cfg->ops->getwp) |
| 40 | wp = mmc->cfg->ops->getwp(mmc); |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 41 | else |
| 42 | wp = 0; |
| 43 | } |
Nikita Kiryanov | 020f261 | 2012-12-03 02:19:46 +0000 | [diff] [blame] | 44 | |
| 45 | return wp; |
| 46 | } |
| 47 | |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 48 | __weak int board_mmc_getcd(struct mmc *mmc) |
| 49 | { |
Stefano Babic | 6e00edf | 2010-02-05 15:04:43 +0100 | [diff] [blame] | 50 | return -1; |
| 51 | } |
| 52 | |
Paul Burton | 8d30cc9 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 53 | int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 54 | { |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 55 | int ret; |
Marek Vasut | dccb608 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 56 | |
Marek Vasut | dccb608 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 57 | #ifdef CONFIG_MMC_TRACE |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 58 | int i; |
| 59 | u8 *ptr; |
| 60 | |
| 61 | printf("CMD_SEND:%d\n", cmd->cmdidx); |
| 62 | printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg); |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 63 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 64 | switch (cmd->resp_type) { |
| 65 | case MMC_RSP_NONE: |
| 66 | printf("\t\tMMC_RSP_NONE\n"); |
| 67 | break; |
| 68 | case MMC_RSP_R1: |
| 69 | printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n", |
| 70 | cmd->response[0]); |
| 71 | break; |
| 72 | case MMC_RSP_R1b: |
| 73 | printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n", |
| 74 | cmd->response[0]); |
| 75 | break; |
| 76 | case MMC_RSP_R2: |
| 77 | printf("\t\tMMC_RSP_R2\t\t 0x%08X \n", |
| 78 | cmd->response[0]); |
| 79 | printf("\t\t \t\t 0x%08X \n", |
| 80 | cmd->response[1]); |
| 81 | printf("\t\t \t\t 0x%08X \n", |
| 82 | cmd->response[2]); |
| 83 | printf("\t\t \t\t 0x%08X \n", |
| 84 | cmd->response[3]); |
| 85 | printf("\n"); |
| 86 | printf("\t\t\t\t\tDUMPING DATA\n"); |
| 87 | for (i = 0; i < 4; i++) { |
| 88 | int j; |
| 89 | printf("\t\t\t\t\t%03d - ", i*4); |
Dirk Behme | c9cb4a9 | 2012-03-08 02:35:34 +0000 | [diff] [blame] | 90 | ptr = (u8 *)&cmd->response[i]; |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 91 | ptr += 3; |
| 92 | for (j = 0; j < 4; j++) |
| 93 | printf("%02X ", *ptr--); |
| 94 | printf("\n"); |
| 95 | } |
| 96 | break; |
| 97 | case MMC_RSP_R3: |
| 98 | printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n", |
| 99 | cmd->response[0]); |
| 100 | break; |
| 101 | default: |
| 102 | printf("\t\tERROR MMC rsp not supported\n"); |
| 103 | break; |
| 104 | } |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 105 | #else |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 106 | ret = mmc->cfg->ops->send_cmd(mmc, cmd, data); |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 107 | #endif |
Marek Vasut | dccb608 | 2012-03-15 18:41:35 +0000 | [diff] [blame] | 108 | return ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 109 | } |
| 110 | |
Paul Burton | 8d30cc9 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 111 | int mmc_send_status(struct mmc *mmc, int timeout) |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 112 | { |
| 113 | struct mmc_cmd cmd; |
Jan Kloetzke | 3178932 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 114 | int err, retries = 5; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 115 | #ifdef CONFIG_MMC_TRACE |
| 116 | int status; |
| 117 | #endif |
| 118 | |
| 119 | cmd.cmdidx = MMC_CMD_SEND_STATUS; |
| 120 | cmd.resp_type = MMC_RSP_R1; |
Marek Vasut | c442739 | 2011-08-10 09:24:48 +0200 | [diff] [blame] | 121 | if (!mmc_host_is_spi(mmc)) |
| 122 | cmd.cmdarg = mmc->rca << 16; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 123 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 124 | while (1) { |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 125 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Jan Kloetzke | 3178932 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 126 | if (!err) { |
| 127 | if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) && |
| 128 | (cmd.response[0] & MMC_STATUS_CURR_STATE) != |
| 129 | MMC_STATE_PRG) |
| 130 | break; |
| 131 | else if (cmd.response[0] & MMC_STATUS_MASK) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 132 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Jan Kloetzke | 3178932 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 133 | printf("Status Error: 0x%08X\n", |
| 134 | cmd.response[0]); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 135 | #endif |
Jan Kloetzke | 3178932 | 2012-02-05 22:29:12 +0000 | [diff] [blame] | 136 | return COMM_ERR; |
| 137 | } |
| 138 | } else if (--retries < 0) |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 139 | return err; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 140 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 141 | if (timeout-- <= 0) |
| 142 | break; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 143 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 144 | udelay(1000); |
| 145 | } |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 146 | |
Raffaele Recalcati | 894b1e2 | 2011-03-11 02:01:14 +0000 | [diff] [blame] | 147 | #ifdef CONFIG_MMC_TRACE |
| 148 | status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9; |
| 149 | printf("CURR STATE:%d\n", status); |
| 150 | #endif |
Jongman Heo | 1be00d9 | 2012-06-03 21:32:13 +0000 | [diff] [blame] | 151 | if (timeout <= 0) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 152 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 153 | printf("Timeout waiting card ready\n"); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 154 | #endif |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 155 | return TIMEOUT; |
| 156 | } |
Andrew Gabbasov | e80682f | 2014-04-03 04:34:32 -0500 | [diff] [blame] | 157 | if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR) |
| 158 | return SWITCH_ERR; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 159 | |
| 160 | return 0; |
| 161 | } |
| 162 | |
Paul Burton | 8d30cc9 | 2013-09-09 15:30:26 +0100 | [diff] [blame] | 163 | int mmc_set_blocklen(struct mmc *mmc, int len) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 164 | { |
| 165 | struct mmc_cmd cmd; |
| 166 | |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 167 | if (mmc->ddr_mode) |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 168 | return 0; |
| 169 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 170 | cmd.cmdidx = MMC_CMD_SET_BLOCKLEN; |
| 171 | cmd.resp_type = MMC_RSP_R1; |
| 172 | cmd.cmdarg = len; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 173 | |
| 174 | return mmc_send_cmd(mmc, &cmd, NULL); |
| 175 | } |
| 176 | |
| 177 | struct mmc *find_mmc_device(int dev_num) |
| 178 | { |
| 179 | struct mmc *m; |
| 180 | struct list_head *entry; |
| 181 | |
| 182 | list_for_each(entry, &mmc_devices) { |
| 183 | m = list_entry(entry, struct mmc, link); |
| 184 | |
| 185 | if (m->block_dev.dev == dev_num) |
| 186 | return m; |
| 187 | } |
| 188 | |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 189 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 190 | printf("MMC Device %d not found\n", dev_num); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 191 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 192 | |
| 193 | return NULL; |
| 194 | } |
| 195 | |
Sascha Silbe | 4bdf6fd | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 196 | static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 197 | lbaint_t blkcnt) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 198 | { |
| 199 | struct mmc_cmd cmd; |
| 200 | struct mmc_data data; |
| 201 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 202 | if (blkcnt > 1) |
| 203 | cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; |
| 204 | else |
| 205 | cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 206 | |
| 207 | if (mmc->high_capacity) |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 208 | cmd.cmdarg = start; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 209 | else |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 210 | cmd.cmdarg = start * mmc->read_bl_len; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 211 | |
| 212 | cmd.resp_type = MMC_RSP_R1; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 213 | |
| 214 | data.dest = dst; |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 215 | data.blocks = blkcnt; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 216 | data.blocksize = mmc->read_bl_len; |
| 217 | data.flags = MMC_DATA_READ; |
| 218 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 219 | if (mmc_send_cmd(mmc, &cmd, &data)) |
| 220 | return 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 221 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 222 | if (blkcnt > 1) { |
| 223 | cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION; |
| 224 | cmd.cmdarg = 0; |
| 225 | cmd.resp_type = MMC_RSP_R1b; |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 226 | if (mmc_send_cmd(mmc, &cmd, NULL)) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 227 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 228 | printf("mmc fail to send stop cmd\n"); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 229 | #endif |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 230 | return 0; |
| 231 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 232 | } |
| 233 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 234 | return blkcnt; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 235 | } |
| 236 | |
Sascha Silbe | 4bdf6fd | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 237 | static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 238 | { |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 239 | lbaint_t cur, blocks_todo = blkcnt; |
| 240 | |
| 241 | if (blkcnt == 0) |
| 242 | return 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 243 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 244 | struct mmc *mmc = find_mmc_device(dev_num); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 245 | if (!mmc) |
| 246 | return 0; |
| 247 | |
Lei Wen | e1cc9c8 | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 248 | if ((start + blkcnt) > mmc->block_dev.lba) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 249 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Sascha Silbe | 4bdf6fd | 2013-06-14 13:07:25 +0200 | [diff] [blame] | 250 | printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n", |
Lei Wen | e1cc9c8 | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 251 | start + blkcnt, mmc->block_dev.lba); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 252 | #endif |
Lei Wen | e1cc9c8 | 2010-09-13 22:07:27 +0800 | [diff] [blame] | 253 | return 0; |
| 254 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 255 | |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 256 | if (mmc_set_blocklen(mmc, mmc->read_bl_len)) { |
| 257 | debug("%s: Failed to set blocklen\n", __func__); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 258 | return 0; |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 259 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 260 | |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 261 | do { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 262 | cur = (blocks_todo > mmc->cfg->b_max) ? |
| 263 | mmc->cfg->b_max : blocks_todo; |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 264 | if (mmc_read_blocks(mmc, dst, start, cur) != cur) { |
| 265 | debug("%s: Failed to read blocks\n", __func__); |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 266 | return 0; |
Simon Glass | a4343c4 | 2015-06-23 15:38:50 -0600 | [diff] [blame] | 267 | } |
Alagu Sankar | c25d1b9 | 2010-10-25 07:23:56 -0700 | [diff] [blame] | 268 | blocks_todo -= cur; |
| 269 | start += cur; |
| 270 | dst += cur * mmc->read_bl_len; |
| 271 | } while (blocks_todo > 0); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 272 | |
| 273 | return blkcnt; |
| 274 | } |
| 275 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 276 | static int mmc_go_idle(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 277 | { |
| 278 | struct mmc_cmd cmd; |
| 279 | int err; |
| 280 | |
| 281 | udelay(1000); |
| 282 | |
| 283 | cmd.cmdidx = MMC_CMD_GO_IDLE_STATE; |
| 284 | cmd.cmdarg = 0; |
| 285 | cmd.resp_type = MMC_RSP_NONE; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 286 | |
| 287 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 288 | |
| 289 | if (err) |
| 290 | return err; |
| 291 | |
| 292 | udelay(2000); |
| 293 | |
| 294 | return 0; |
| 295 | } |
| 296 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 297 | static int sd_send_op_cond(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 298 | { |
| 299 | int timeout = 1000; |
| 300 | int err; |
| 301 | struct mmc_cmd cmd; |
| 302 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 303 | while (1) { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 304 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 305 | cmd.resp_type = MMC_RSP_R1; |
| 306 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 307 | |
| 308 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 309 | |
| 310 | if (err) |
| 311 | return err; |
| 312 | |
| 313 | cmd.cmdidx = SD_CMD_APP_SEND_OP_COND; |
| 314 | cmd.resp_type = MMC_RSP_R3; |
Stefano Babic | f8e9a21 | 2010-01-20 18:20:39 +0100 | [diff] [blame] | 315 | |
| 316 | /* |
| 317 | * Most cards do not answer if some reserved bits |
| 318 | * in the ocr are set. However, Some controller |
| 319 | * can set bit 7 (reserved for low voltages), but |
| 320 | * how to manage low voltages SD card is not yet |
| 321 | * specified. |
| 322 | */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 323 | cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 : |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 324 | (mmc->cfg->voltages & 0xff8000); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 325 | |
| 326 | if (mmc->version == SD_VERSION_2) |
| 327 | cmd.cmdarg |= OCR_HCS; |
| 328 | |
| 329 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 330 | |
| 331 | if (err) |
| 332 | return err; |
| 333 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 334 | if (cmd.response[0] & OCR_BUSY) |
| 335 | break; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 336 | |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 337 | if (timeout-- <= 0) |
| 338 | return UNUSABLE_ERR; |
| 339 | |
| 340 | udelay(1000); |
| 341 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 342 | |
| 343 | if (mmc->version != SD_VERSION_2) |
| 344 | mmc->version = SD_VERSION_1_0; |
| 345 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 346 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
| 347 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; |
| 348 | cmd.resp_type = MMC_RSP_R3; |
| 349 | cmd.cmdarg = 0; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 350 | |
| 351 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 352 | |
| 353 | if (err) |
| 354 | return err; |
| 355 | } |
| 356 | |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 357 | mmc->ocr = cmd.response[0]; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 358 | |
| 359 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); |
| 360 | mmc->rca = 0; |
| 361 | |
| 362 | return 0; |
| 363 | } |
| 364 | |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 365 | static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 366 | { |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 367 | struct mmc_cmd cmd; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 368 | int err; |
| 369 | |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 370 | cmd.cmdidx = MMC_CMD_SEND_OP_COND; |
| 371 | cmd.resp_type = MMC_RSP_R3; |
| 372 | cmd.cmdarg = 0; |
Rob Herring | 5fd3edd | 2015-03-23 17:56:59 -0500 | [diff] [blame] | 373 | if (use_arg && !mmc_host_is_spi(mmc)) |
| 374 | cmd.cmdarg = OCR_HCS | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 375 | (mmc->cfg->voltages & |
Andrew Gabbasov | ec600d1 | 2015-03-19 07:44:03 -0500 | [diff] [blame] | 376 | (mmc->ocr & OCR_VOLTAGE_MASK)) | |
| 377 | (mmc->ocr & OCR_ACCESS_MODE); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 378 | |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 379 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 380 | if (err) |
| 381 | return err; |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 382 | mmc->ocr = cmd.response[0]; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 383 | return 0; |
| 384 | } |
| 385 | |
Jeroen Hofstee | aedeeaa | 2014-07-12 21:24:08 +0200 | [diff] [blame] | 386 | static int mmc_send_op_cond(struct mmc *mmc) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 387 | { |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 388 | int err, i; |
| 389 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 390 | /* Some cards seem to need this */ |
| 391 | mmc_go_idle(mmc); |
| 392 | |
Raffaele Recalcati | 1df837e | 2011-03-11 02:01:13 +0000 | [diff] [blame] | 393 | /* Asking to the card its capabilities */ |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 394 | for (i = 0; i < 2; i++) { |
Andrew Gabbasov | fafa6a0 | 2015-03-19 07:44:04 -0500 | [diff] [blame] | 395 | err = mmc_send_op_cond_iter(mmc, i != 0); |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 396 | if (err) |
| 397 | return err; |
Wolfgang Denk | 80f7021 | 2011-05-19 22:21:41 +0200 | [diff] [blame] | 398 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 399 | /* exit if not busy (flag seems to be inverted) */ |
Andrew Gabbasov | ec600d1 | 2015-03-19 07:44:03 -0500 | [diff] [blame] | 400 | if (mmc->ocr & OCR_BUSY) |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 401 | break; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 402 | } |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 403 | mmc->op_cond_pending = 1; |
| 404 | return 0; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 405 | } |
Wolfgang Denk | 80f7021 | 2011-05-19 22:21:41 +0200 | [diff] [blame] | 406 | |
Jeroen Hofstee | aedeeaa | 2014-07-12 21:24:08 +0200 | [diff] [blame] | 407 | static int mmc_complete_op_cond(struct mmc *mmc) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 408 | { |
| 409 | struct mmc_cmd cmd; |
| 410 | int timeout = 1000; |
| 411 | uint start; |
| 412 | int err; |
Wolfgang Denk | 80f7021 | 2011-05-19 22:21:41 +0200 | [diff] [blame] | 413 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 414 | mmc->op_cond_pending = 0; |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 415 | if (!(mmc->ocr & OCR_BUSY)) { |
| 416 | start = get_timer(0); |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 417 | while (1) { |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 418 | err = mmc_send_op_cond_iter(mmc, 1); |
| 419 | if (err) |
| 420 | return err; |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 421 | if (mmc->ocr & OCR_BUSY) |
| 422 | break; |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 423 | if (get_timer(start) > timeout) |
| 424 | return UNUSABLE_ERR; |
| 425 | udelay(100); |
Andrew Gabbasov | 034857c | 2015-03-19 07:44:06 -0500 | [diff] [blame] | 426 | } |
Andrew Gabbasov | 5a513ca | 2015-03-19 07:44:05 -0500 | [diff] [blame] | 427 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 428 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 429 | if (mmc_host_is_spi(mmc)) { /* read OCR for spi */ |
| 430 | cmd.cmdidx = MMC_CMD_SPI_READ_OCR; |
| 431 | cmd.resp_type = MMC_RSP_R3; |
| 432 | cmd.cmdarg = 0; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 433 | |
| 434 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 435 | |
| 436 | if (err) |
| 437 | return err; |
Andrew Gabbasov | ec600d1 | 2015-03-19 07:44:03 -0500 | [diff] [blame] | 438 | |
| 439 | mmc->ocr = cmd.response[0]; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 440 | } |
| 441 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 442 | mmc->version = MMC_VERSION_UNKNOWN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 443 | |
| 444 | mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS); |
Stephen Warren | f6545f1 | 2014-01-30 16:11:12 -0700 | [diff] [blame] | 445 | mmc->rca = 1; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 446 | |
| 447 | return 0; |
| 448 | } |
| 449 | |
| 450 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 451 | static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 452 | { |
| 453 | struct mmc_cmd cmd; |
| 454 | struct mmc_data data; |
| 455 | int err; |
| 456 | |
| 457 | /* Get the Card Status Register */ |
| 458 | cmd.cmdidx = MMC_CMD_SEND_EXT_CSD; |
| 459 | cmd.resp_type = MMC_RSP_R1; |
| 460 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 461 | |
Yoshihiro Shimoda | f6bec73 | 2012-06-07 19:09:11 +0000 | [diff] [blame] | 462 | data.dest = (char *)ext_csd; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 463 | data.blocks = 1; |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 464 | data.blocksize = MMC_MAX_BLOCK_LEN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 465 | data.flags = MMC_DATA_READ; |
| 466 | |
| 467 | err = mmc_send_cmd(mmc, &cmd, &data); |
| 468 | |
| 469 | return err; |
| 470 | } |
| 471 | |
| 472 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 473 | static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 474 | { |
| 475 | struct mmc_cmd cmd; |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 476 | int timeout = 1000; |
| 477 | int ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 478 | |
| 479 | cmd.cmdidx = MMC_CMD_SWITCH; |
| 480 | cmd.resp_type = MMC_RSP_R1b; |
| 481 | cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 482 | (index << 16) | |
| 483 | (value << 8); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 484 | |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 485 | ret = mmc_send_cmd(mmc, &cmd, NULL); |
| 486 | |
| 487 | /* Waiting for the ready status */ |
Jan Kloetzke | 4e929dd | 2012-02-05 22:29:11 +0000 | [diff] [blame] | 488 | if (!ret) |
| 489 | ret = mmc_send_status(mmc, timeout); |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 490 | |
| 491 | return ret; |
| 492 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 493 | } |
| 494 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 495 | static int mmc_change_freq(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 496 | { |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 497 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 498 | char cardtype; |
| 499 | int err; |
| 500 | |
Andrew Gabbasov | ccb7b04 | 2014-12-25 10:22:25 -0600 | [diff] [blame] | 501 | mmc->card_caps = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 502 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 503 | if (mmc_host_is_spi(mmc)) |
| 504 | return 0; |
| 505 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 506 | /* Only version 4 supports high-speed */ |
| 507 | if (mmc->version < MMC_VERSION_4) |
| 508 | return 0; |
| 509 | |
Andrew Gabbasov | ccb7b04 | 2014-12-25 10:22:25 -0600 | [diff] [blame] | 510 | mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT; |
| 511 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 512 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 513 | |
| 514 | if (err) |
| 515 | return err; |
| 516 | |
Lei Wen | 217467f | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 517 | cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 518 | |
| 519 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1); |
| 520 | |
| 521 | if (err) |
Andrew Gabbasov | e80682f | 2014-04-03 04:34:32 -0500 | [diff] [blame] | 522 | return err == SWITCH_ERR ? 0 : err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 523 | |
| 524 | /* Now check to see that it worked */ |
| 525 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 526 | |
| 527 | if (err) |
| 528 | return err; |
| 529 | |
| 530 | /* No high-speed support */ |
Lei Wen | 217467f | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 531 | if (!ext_csd[EXT_CSD_HS_TIMING]) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 532 | return 0; |
| 533 | |
| 534 | /* High Speed is set, there are two types: 52MHz and 26MHz */ |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 535 | if (cardtype & EXT_CSD_CARD_TYPE_52) { |
Andrew Gabbasov | 95a3713 | 2014-12-01 06:59:10 -0600 | [diff] [blame] | 536 | if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V) |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 537 | mmc->card_caps |= MMC_MODE_DDR_52MHz; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 538 | mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 539 | } else { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 540 | mmc->card_caps |= MMC_MODE_HS; |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 541 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 542 | |
| 543 | return 0; |
| 544 | } |
| 545 | |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 546 | static int mmc_set_capacity(struct mmc *mmc, int part_num) |
| 547 | { |
| 548 | switch (part_num) { |
| 549 | case 0: |
| 550 | mmc->capacity = mmc->capacity_user; |
| 551 | break; |
| 552 | case 1: |
| 553 | case 2: |
| 554 | mmc->capacity = mmc->capacity_boot; |
| 555 | break; |
| 556 | case 3: |
| 557 | mmc->capacity = mmc->capacity_rpmb; |
| 558 | break; |
| 559 | case 4: |
| 560 | case 5: |
| 561 | case 6: |
| 562 | case 7: |
| 563 | mmc->capacity = mmc->capacity_gp[part_num - 4]; |
| 564 | break; |
| 565 | default: |
| 566 | return -1; |
| 567 | } |
| 568 | |
| 569 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
| 570 | |
| 571 | return 0; |
| 572 | } |
| 573 | |
Stephen Warren | 52c44e4 | 2014-05-07 12:19:02 -0600 | [diff] [blame] | 574 | int mmc_select_hwpart(int dev_num, int hwpart) |
| 575 | { |
| 576 | struct mmc *mmc = find_mmc_device(dev_num); |
| 577 | int ret; |
| 578 | |
| 579 | if (!mmc) |
Stephen Warren | bf0c785 | 2014-05-23 12:47:06 -0600 | [diff] [blame] | 580 | return -ENODEV; |
Stephen Warren | 52c44e4 | 2014-05-07 12:19:02 -0600 | [diff] [blame] | 581 | |
| 582 | if (mmc->part_num == hwpart) |
| 583 | return 0; |
| 584 | |
| 585 | if (mmc->part_config == MMCPART_NOAVAILABLE) { |
| 586 | printf("Card doesn't support part_switch\n"); |
Stephen Warren | bf0c785 | 2014-05-23 12:47:06 -0600 | [diff] [blame] | 587 | return -EMEDIUMTYPE; |
Stephen Warren | 52c44e4 | 2014-05-07 12:19:02 -0600 | [diff] [blame] | 588 | } |
| 589 | |
| 590 | ret = mmc_switch_part(dev_num, hwpart); |
| 591 | if (ret) |
Stephen Warren | bf0c785 | 2014-05-23 12:47:06 -0600 | [diff] [blame] | 592 | return ret; |
Stephen Warren | 52c44e4 | 2014-05-07 12:19:02 -0600 | [diff] [blame] | 593 | |
| 594 | mmc->part_num = hwpart; |
| 595 | |
| 596 | return 0; |
| 597 | } |
| 598 | |
| 599 | |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 600 | int mmc_switch_part(int dev_num, unsigned int part_num) |
| 601 | { |
| 602 | struct mmc *mmc = find_mmc_device(dev_num); |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 603 | int ret; |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 604 | |
| 605 | if (!mmc) |
| 606 | return -1; |
| 607 | |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 608 | ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, |
| 609 | (mmc->part_config & ~PART_ACCESS_MASK) |
| 610 | | (part_num & PART_ACCESS_MASK)); |
Peter Bigot | 45fde89 | 2014-09-02 18:31:23 -0500 | [diff] [blame] | 611 | |
| 612 | /* |
| 613 | * Set the capacity if the switch succeeded or was intended |
| 614 | * to return to representing the raw device. |
| 615 | */ |
| 616 | if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) |
| 617 | ret = mmc_set_capacity(mmc, part_num); |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 618 | |
Peter Bigot | 45fde89 | 2014-09-02 18:31:23 -0500 | [diff] [blame] | 619 | return ret; |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 620 | } |
| 621 | |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 622 | int mmc_hwpart_config(struct mmc *mmc, |
| 623 | const struct mmc_hwpart_conf *conf, |
| 624 | enum mmc_hwpart_conf_mode mode) |
| 625 | { |
| 626 | u8 part_attrs = 0; |
| 627 | u32 enh_size_mult; |
| 628 | u32 enh_start_addr; |
| 629 | u32 gp_size_mult[4]; |
| 630 | u32 max_enh_size_mult; |
| 631 | u32 tot_enh_size_mult = 0; |
Diego Santa Cruz | 8020027 | 2014-12-23 10:50:31 +0100 | [diff] [blame] | 632 | u8 wr_rel_set; |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 633 | int i, pidx, err; |
| 634 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
| 635 | |
| 636 | if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE) |
| 637 | return -EINVAL; |
| 638 | |
| 639 | if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) { |
| 640 | printf("eMMC >= 4.4 required for enhanced user data area\n"); |
| 641 | return -EMEDIUMTYPE; |
| 642 | } |
| 643 | |
| 644 | if (!(mmc->part_support & PART_SUPPORT)) { |
| 645 | printf("Card does not support partitioning\n"); |
| 646 | return -EMEDIUMTYPE; |
| 647 | } |
| 648 | |
| 649 | if (!mmc->hc_wp_grp_size) { |
| 650 | printf("Card does not define HC WP group size\n"); |
| 651 | return -EMEDIUMTYPE; |
| 652 | } |
| 653 | |
| 654 | /* check partition alignment and total enhanced size */ |
| 655 | if (conf->user.enh_size) { |
| 656 | if (conf->user.enh_size % mmc->hc_wp_grp_size || |
| 657 | conf->user.enh_start % mmc->hc_wp_grp_size) { |
| 658 | printf("User data enhanced area not HC WP group " |
| 659 | "size aligned\n"); |
| 660 | return -EINVAL; |
| 661 | } |
| 662 | part_attrs |= EXT_CSD_ENH_USR; |
| 663 | enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size; |
| 664 | if (mmc->high_capacity) { |
| 665 | enh_start_addr = conf->user.enh_start; |
| 666 | } else { |
| 667 | enh_start_addr = (conf->user.enh_start << 9); |
| 668 | } |
| 669 | } else { |
| 670 | enh_size_mult = 0; |
| 671 | enh_start_addr = 0; |
| 672 | } |
| 673 | tot_enh_size_mult += enh_size_mult; |
| 674 | |
| 675 | for (pidx = 0; pidx < 4; pidx++) { |
| 676 | if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) { |
| 677 | printf("GP%i partition not HC WP group size " |
| 678 | "aligned\n", pidx+1); |
| 679 | return -EINVAL; |
| 680 | } |
| 681 | gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size; |
| 682 | if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) { |
| 683 | part_attrs |= EXT_CSD_ENH_GP(pidx); |
| 684 | tot_enh_size_mult += gp_size_mult[pidx]; |
| 685 | } |
| 686 | } |
| 687 | |
| 688 | if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) { |
| 689 | printf("Card does not support enhanced attribute\n"); |
| 690 | return -EMEDIUMTYPE; |
| 691 | } |
| 692 | |
| 693 | err = mmc_send_ext_csd(mmc, ext_csd); |
| 694 | if (err) |
| 695 | return err; |
| 696 | |
| 697 | max_enh_size_mult = |
| 698 | (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) + |
| 699 | (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) + |
| 700 | ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT]; |
| 701 | if (tot_enh_size_mult > max_enh_size_mult) { |
| 702 | printf("Total enhanced size exceeds maximum (%u > %u)\n", |
| 703 | tot_enh_size_mult, max_enh_size_mult); |
| 704 | return -EMEDIUMTYPE; |
| 705 | } |
| 706 | |
Diego Santa Cruz | 8020027 | 2014-12-23 10:50:31 +0100 | [diff] [blame] | 707 | /* The default value of EXT_CSD_WR_REL_SET is device |
| 708 | * dependent, the values can only be changed if the |
| 709 | * EXT_CSD_HS_CTRL_REL bit is set. The values can be |
| 710 | * changed only once and before partitioning is completed. */ |
| 711 | wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; |
| 712 | if (conf->user.wr_rel_change) { |
| 713 | if (conf->user.wr_rel_set) |
| 714 | wr_rel_set |= EXT_CSD_WR_DATA_REL_USR; |
| 715 | else |
| 716 | wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR; |
| 717 | } |
| 718 | for (pidx = 0; pidx < 4; pidx++) { |
| 719 | if (conf->gp_part[pidx].wr_rel_change) { |
| 720 | if (conf->gp_part[pidx].wr_rel_set) |
| 721 | wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx); |
| 722 | else |
| 723 | wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx); |
| 724 | } |
| 725 | } |
| 726 | |
| 727 | if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] && |
| 728 | !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) { |
| 729 | puts("Card does not support host controlled partition write " |
| 730 | "reliability settings\n"); |
| 731 | return -EMEDIUMTYPE; |
| 732 | } |
| 733 | |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 734 | if (ext_csd[EXT_CSD_PARTITION_SETTING] & |
| 735 | EXT_CSD_PARTITION_SETTING_COMPLETED) { |
| 736 | printf("Card already partitioned\n"); |
| 737 | return -EPERM; |
| 738 | } |
| 739 | |
| 740 | if (mode == MMC_HWPART_CONF_CHECK) |
| 741 | return 0; |
| 742 | |
| 743 | /* Partitioning requires high-capacity size definitions */ |
| 744 | if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) { |
| 745 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 746 | EXT_CSD_ERASE_GROUP_DEF, 1); |
| 747 | |
| 748 | if (err) |
| 749 | return err; |
| 750 | |
| 751 | ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; |
| 752 | |
| 753 | /* update erase group size to be high-capacity */ |
| 754 | mmc->erase_grp_size = |
| 755 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; |
| 756 | |
| 757 | } |
| 758 | |
| 759 | /* all OK, write the configuration */ |
| 760 | for (i = 0; i < 4; i++) { |
| 761 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 762 | EXT_CSD_ENH_START_ADDR+i, |
| 763 | (enh_start_addr >> (i*8)) & 0xFF); |
| 764 | if (err) |
| 765 | return err; |
| 766 | } |
| 767 | for (i = 0; i < 3; i++) { |
| 768 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 769 | EXT_CSD_ENH_SIZE_MULT+i, |
| 770 | (enh_size_mult >> (i*8)) & 0xFF); |
| 771 | if (err) |
| 772 | return err; |
| 773 | } |
| 774 | for (pidx = 0; pidx < 4; pidx++) { |
| 775 | for (i = 0; i < 3; i++) { |
| 776 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 777 | EXT_CSD_GP_SIZE_MULT+pidx*3+i, |
| 778 | (gp_size_mult[pidx] >> (i*8)) & 0xFF); |
| 779 | if (err) |
| 780 | return err; |
| 781 | } |
| 782 | } |
| 783 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 784 | EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs); |
| 785 | if (err) |
| 786 | return err; |
| 787 | |
| 788 | if (mode == MMC_HWPART_CONF_SET) |
| 789 | return 0; |
| 790 | |
Diego Santa Cruz | 8020027 | 2014-12-23 10:50:31 +0100 | [diff] [blame] | 791 | /* The WR_REL_SET is a write-once register but shall be |
| 792 | * written before setting PART_SETTING_COMPLETED. As it is |
| 793 | * write-once we can only write it when completing the |
| 794 | * partitioning. */ |
| 795 | if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) { |
| 796 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 797 | EXT_CSD_WR_REL_SET, wr_rel_set); |
| 798 | if (err) |
| 799 | return err; |
| 800 | } |
| 801 | |
Diego Santa Cruz | 69eb71a0 | 2014-12-23 10:50:29 +0100 | [diff] [blame] | 802 | /* Setting PART_SETTING_COMPLETED confirms the partition |
| 803 | * configuration but it only becomes effective after power |
| 804 | * cycle, so we do not adjust the partition related settings |
| 805 | * in the mmc struct. */ |
| 806 | |
| 807 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 808 | EXT_CSD_PARTITION_SETTING, |
| 809 | EXT_CSD_PARTITION_SETTING_COMPLETED); |
| 810 | if (err) |
| 811 | return err; |
| 812 | |
| 813 | return 0; |
| 814 | } |
| 815 | |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 816 | int mmc_getcd(struct mmc *mmc) |
| 817 | { |
| 818 | int cd; |
| 819 | |
| 820 | cd = board_mmc_getcd(mmc); |
| 821 | |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 822 | if (cd < 0) { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 823 | if (mmc->cfg->ops->getcd) |
| 824 | cd = mmc->cfg->ops->getcd(mmc); |
Peter Korsgaard | f7b1510 | 2013-03-21 04:00:03 +0000 | [diff] [blame] | 825 | else |
| 826 | cd = 1; |
| 827 | } |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 828 | |
| 829 | return cd; |
| 830 | } |
| 831 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 832 | static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 833 | { |
| 834 | struct mmc_cmd cmd; |
| 835 | struct mmc_data data; |
| 836 | |
| 837 | /* Switch the frequency */ |
| 838 | cmd.cmdidx = SD_CMD_SWITCH_FUNC; |
| 839 | cmd.resp_type = MMC_RSP_R1; |
| 840 | cmd.cmdarg = (mode << 31) | 0xffffff; |
| 841 | cmd.cmdarg &= ~(0xf << (group * 4)); |
| 842 | cmd.cmdarg |= value << (group * 4); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 843 | |
| 844 | data.dest = (char *)resp; |
| 845 | data.blocksize = 64; |
| 846 | data.blocks = 1; |
| 847 | data.flags = MMC_DATA_READ; |
| 848 | |
| 849 | return mmc_send_cmd(mmc, &cmd, &data); |
| 850 | } |
| 851 | |
| 852 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 853 | static int sd_change_freq(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 854 | { |
| 855 | int err; |
| 856 | struct mmc_cmd cmd; |
Anton staaf | 9b00f0d | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 857 | ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2); |
| 858 | ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 859 | struct mmc_data data; |
| 860 | int timeout; |
| 861 | |
| 862 | mmc->card_caps = 0; |
| 863 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 864 | if (mmc_host_is_spi(mmc)) |
| 865 | return 0; |
| 866 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 867 | /* Read the SCR to find out if this card supports higher speeds */ |
| 868 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 869 | cmd.resp_type = MMC_RSP_R1; |
| 870 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 871 | |
| 872 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 873 | |
| 874 | if (err) |
| 875 | return err; |
| 876 | |
| 877 | cmd.cmdidx = SD_CMD_APP_SEND_SCR; |
| 878 | cmd.resp_type = MMC_RSP_R1; |
| 879 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 880 | |
| 881 | timeout = 3; |
| 882 | |
| 883 | retry_scr: |
Anton staaf | 9b00f0d | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 884 | data.dest = (char *)scr; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 885 | data.blocksize = 8; |
| 886 | data.blocks = 1; |
| 887 | data.flags = MMC_DATA_READ; |
| 888 | |
| 889 | err = mmc_send_cmd(mmc, &cmd, &data); |
| 890 | |
| 891 | if (err) { |
| 892 | if (timeout--) |
| 893 | goto retry_scr; |
| 894 | |
| 895 | return err; |
| 896 | } |
| 897 | |
Yauhen Kharuzhy | 6e8edf4 | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 898 | mmc->scr[0] = __be32_to_cpu(scr[0]); |
| 899 | mmc->scr[1] = __be32_to_cpu(scr[1]); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 900 | |
| 901 | switch ((mmc->scr[0] >> 24) & 0xf) { |
| 902 | case 0: |
| 903 | mmc->version = SD_VERSION_1_0; |
| 904 | break; |
| 905 | case 1: |
| 906 | mmc->version = SD_VERSION_1_10; |
| 907 | break; |
| 908 | case 2: |
| 909 | mmc->version = SD_VERSION_2; |
Jaehoon Chung | d552bd1 | 2013-01-29 22:58:16 +0000 | [diff] [blame] | 910 | if ((mmc->scr[0] >> 15) & 0x1) |
| 911 | mmc->version = SD_VERSION_3; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 912 | break; |
| 913 | default: |
| 914 | mmc->version = SD_VERSION_1_0; |
| 915 | break; |
| 916 | } |
| 917 | |
Alagu Sankar | 24bb5ab | 2010-05-12 15:08:24 +0530 | [diff] [blame] | 918 | if (mmc->scr[0] & SD_DATA_4BIT) |
| 919 | mmc->card_caps |= MMC_MODE_4BIT; |
| 920 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 921 | /* Version 1.0 doesn't support switching */ |
| 922 | if (mmc->version == SD_VERSION_1_0) |
| 923 | return 0; |
| 924 | |
| 925 | timeout = 4; |
| 926 | while (timeout--) { |
| 927 | err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1, |
Anton staaf | 9b00f0d | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 928 | (u8 *)switch_status); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 929 | |
| 930 | if (err) |
| 931 | return err; |
| 932 | |
| 933 | /* The high-speed function is busy. Try again */ |
Yauhen Kharuzhy | 6e8edf4 | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 934 | if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY)) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 935 | break; |
| 936 | } |
| 937 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 938 | /* If high-speed isn't supported, we return */ |
Yauhen Kharuzhy | 6e8edf4 | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 939 | if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 940 | return 0; |
| 941 | |
Macpaul Lin | 24e92ec | 2011-11-28 16:31:09 +0000 | [diff] [blame] | 942 | /* |
| 943 | * If the host doesn't support SD_HIGHSPEED, do not switch card to |
| 944 | * HIGHSPEED mode even if the card support SD_HIGHSPPED. |
| 945 | * This can avoid furthur problem when the card runs in different |
| 946 | * mode between the host. |
| 947 | */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 948 | if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) && |
| 949 | (mmc->cfg->host_caps & MMC_MODE_HS))) |
Macpaul Lin | 24e92ec | 2011-11-28 16:31:09 +0000 | [diff] [blame] | 950 | return 0; |
| 951 | |
Anton staaf | 9b00f0d | 2011-10-03 13:54:59 +0000 | [diff] [blame] | 952 | err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 953 | |
| 954 | if (err) |
| 955 | return err; |
| 956 | |
Yauhen Kharuzhy | 6e8edf4 | 2009-05-07 00:43:30 +0300 | [diff] [blame] | 957 | if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 958 | mmc->card_caps |= MMC_MODE_HS; |
| 959 | |
| 960 | return 0; |
| 961 | } |
| 962 | |
| 963 | /* frequency bases */ |
| 964 | /* divided by 10 to be nice to platforms without floating point */ |
Mike Frysinger | b588caf | 2010-10-20 01:15:53 +0000 | [diff] [blame] | 965 | static const int fbase[] = { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 966 | 10000, |
| 967 | 100000, |
| 968 | 1000000, |
| 969 | 10000000, |
| 970 | }; |
| 971 | |
| 972 | /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice |
| 973 | * to platforms without floating point. |
| 974 | */ |
Mike Frysinger | b588caf | 2010-10-20 01:15:53 +0000 | [diff] [blame] | 975 | static const int multipliers[] = { |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 976 | 0, /* reserved */ |
| 977 | 10, |
| 978 | 12, |
| 979 | 13, |
| 980 | 15, |
| 981 | 20, |
| 982 | 25, |
| 983 | 30, |
| 984 | 35, |
| 985 | 40, |
| 986 | 45, |
| 987 | 50, |
| 988 | 55, |
| 989 | 60, |
| 990 | 70, |
| 991 | 80, |
| 992 | }; |
| 993 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 994 | static void mmc_set_ios(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 995 | { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 996 | if (mmc->cfg->ops->set_ios) |
| 997 | mmc->cfg->ops->set_ios(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 998 | } |
| 999 | |
| 1000 | void mmc_set_clock(struct mmc *mmc, uint clock) |
| 1001 | { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1002 | if (clock > mmc->cfg->f_max) |
| 1003 | clock = mmc->cfg->f_max; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1004 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1005 | if (clock < mmc->cfg->f_min) |
| 1006 | clock = mmc->cfg->f_min; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1007 | |
| 1008 | mmc->clock = clock; |
| 1009 | |
| 1010 | mmc_set_ios(mmc); |
| 1011 | } |
| 1012 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 1013 | static void mmc_set_bus_width(struct mmc *mmc, uint width) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1014 | { |
| 1015 | mmc->bus_width = width; |
| 1016 | |
| 1017 | mmc_set_ios(mmc); |
| 1018 | } |
| 1019 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 1020 | static int mmc_startup(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1021 | { |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1022 | int err, i; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1023 | uint mult, freq; |
Yoshihiro Shimoda | 7d88de5 | 2011-07-04 22:13:26 +0000 | [diff] [blame] | 1024 | u64 cmult, csize, capacity; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1025 | struct mmc_cmd cmd; |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 1026 | ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN); |
| 1027 | ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN); |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 1028 | int timeout = 1000; |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1029 | bool has_parts = false; |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1030 | bool part_completed; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1031 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1032 | #ifdef CONFIG_MMC_SPI_CRC_ON |
| 1033 | if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */ |
| 1034 | cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF; |
| 1035 | cmd.resp_type = MMC_RSP_R1; |
| 1036 | cmd.cmdarg = 1; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1037 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1038 | |
| 1039 | if (err) |
| 1040 | return err; |
| 1041 | } |
| 1042 | #endif |
| 1043 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1044 | /* Put the Card in Identify Mode */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1045 | cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID : |
| 1046 | MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */ |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1047 | cmd.resp_type = MMC_RSP_R2; |
| 1048 | cmd.cmdarg = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1049 | |
| 1050 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1051 | |
| 1052 | if (err) |
| 1053 | return err; |
| 1054 | |
| 1055 | memcpy(mmc->cid, cmd.response, 16); |
| 1056 | |
| 1057 | /* |
| 1058 | * For MMC cards, set the Relative Address. |
| 1059 | * For SD cards, get the Relatvie Address. |
| 1060 | * This also puts the cards into Standby State |
| 1061 | */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1062 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
| 1063 | cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR; |
| 1064 | cmd.cmdarg = mmc->rca << 16; |
| 1065 | cmd.resp_type = MMC_RSP_R6; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1066 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1067 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1068 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1069 | if (err) |
| 1070 | return err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1071 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1072 | if (IS_SD(mmc)) |
| 1073 | mmc->rca = (cmd.response[0] >> 16) & 0xffff; |
| 1074 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1075 | |
| 1076 | /* Get the Card-Specific Data */ |
| 1077 | cmd.cmdidx = MMC_CMD_SEND_CSD; |
| 1078 | cmd.resp_type = MMC_RSP_R2; |
| 1079 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1080 | |
| 1081 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1082 | |
Raffaele Recalcati | 01a0dc6 | 2011-03-11 02:01:12 +0000 | [diff] [blame] | 1083 | /* Waiting for the ready status */ |
| 1084 | mmc_send_status(mmc, timeout); |
| 1085 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1086 | if (err) |
| 1087 | return err; |
| 1088 | |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 1089 | mmc->csd[0] = cmd.response[0]; |
| 1090 | mmc->csd[1] = cmd.response[1]; |
| 1091 | mmc->csd[2] = cmd.response[2]; |
| 1092 | mmc->csd[3] = cmd.response[3]; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1093 | |
| 1094 | if (mmc->version == MMC_VERSION_UNKNOWN) { |
Rabin Vincent | bdf7a68 | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 1095 | int version = (cmd.response[0] >> 26) & 0xf; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1096 | |
| 1097 | switch (version) { |
| 1098 | case 0: |
| 1099 | mmc->version = MMC_VERSION_1_2; |
| 1100 | break; |
| 1101 | case 1: |
| 1102 | mmc->version = MMC_VERSION_1_4; |
| 1103 | break; |
| 1104 | case 2: |
| 1105 | mmc->version = MMC_VERSION_2_2; |
| 1106 | break; |
| 1107 | case 3: |
| 1108 | mmc->version = MMC_VERSION_3; |
| 1109 | break; |
| 1110 | case 4: |
| 1111 | mmc->version = MMC_VERSION_4; |
| 1112 | break; |
| 1113 | default: |
| 1114 | mmc->version = MMC_VERSION_1_2; |
| 1115 | break; |
| 1116 | } |
| 1117 | } |
| 1118 | |
| 1119 | /* divide frequency by 10, since the mults are 10x bigger */ |
Rabin Vincent | bdf7a68 | 2009-04-05 13:30:55 +0530 | [diff] [blame] | 1120 | freq = fbase[(cmd.response[0] & 0x7)]; |
| 1121 | mult = multipliers[((cmd.response[0] >> 3) & 0xf)]; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1122 | |
| 1123 | mmc->tran_speed = freq * mult; |
| 1124 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 1125 | mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1); |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 1126 | mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1127 | |
| 1128 | if (IS_SD(mmc)) |
| 1129 | mmc->write_bl_len = mmc->read_bl_len; |
| 1130 | else |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 1131 | mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1132 | |
| 1133 | if (mmc->high_capacity) { |
| 1134 | csize = (mmc->csd[1] & 0x3f) << 16 |
| 1135 | | (mmc->csd[2] & 0xffff0000) >> 16; |
| 1136 | cmult = 8; |
| 1137 | } else { |
| 1138 | csize = (mmc->csd[1] & 0x3ff) << 2 |
| 1139 | | (mmc->csd[2] & 0xc0000000) >> 30; |
| 1140 | cmult = (mmc->csd[2] & 0x00038000) >> 15; |
| 1141 | } |
| 1142 | |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1143 | mmc->capacity_user = (csize + 1) << (cmult + 2); |
| 1144 | mmc->capacity_user *= mmc->read_bl_len; |
| 1145 | mmc->capacity_boot = 0; |
| 1146 | mmc->capacity_rpmb = 0; |
| 1147 | for (i = 0; i < 4; i++) |
| 1148 | mmc->capacity_gp[i] = 0; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1149 | |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 1150 | if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN) |
| 1151 | mmc->read_bl_len = MMC_MAX_BLOCK_LEN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1152 | |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 1153 | if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN) |
| 1154 | mmc->write_bl_len = MMC_MAX_BLOCK_LEN; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1155 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 1156 | if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) { |
| 1157 | cmd.cmdidx = MMC_CMD_SET_DSR; |
| 1158 | cmd.cmdarg = (mmc->dsr & 0xffff) << 16; |
| 1159 | cmd.resp_type = MMC_RSP_NONE; |
| 1160 | if (mmc_send_cmd(mmc, &cmd, NULL)) |
| 1161 | printf("MMC: SET_DSR failed\n"); |
| 1162 | } |
| 1163 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1164 | /* Select the card, and put it into Transfer Mode */ |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1165 | if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */ |
| 1166 | cmd.cmdidx = MMC_CMD_SELECT_CARD; |
Ajay Bhargav | 4a32fba | 2011-10-05 03:13:23 +0000 | [diff] [blame] | 1167 | cmd.resp_type = MMC_RSP_R1; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1168 | cmd.cmdarg = mmc->rca << 16; |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1169 | err = mmc_send_cmd(mmc, &cmd, NULL); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1170 | |
Thomas Chou | 1254c3d | 2010-12-24 13:12:21 +0000 | [diff] [blame] | 1171 | if (err) |
| 1172 | return err; |
| 1173 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1174 | |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 1175 | /* |
| 1176 | * For SD, its erase group is always one sector |
| 1177 | */ |
| 1178 | mmc->erase_grp_size = 1; |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1179 | mmc->part_config = MMCPART_NOAVAILABLE; |
Sukumar Ghorai | 232293c | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 1180 | if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) { |
| 1181 | /* check ext_csd version and capacity */ |
| 1182 | err = mmc_send_ext_csd(mmc, ext_csd); |
Diego Santa Cruz | ca25e06 | 2014-12-23 10:50:28 +0100 | [diff] [blame] | 1183 | if (err) |
| 1184 | return err; |
| 1185 | if (ext_csd[EXT_CSD_REV] >= 2) { |
Yoshihiro Shimoda | 7d88de5 | 2011-07-04 22:13:26 +0000 | [diff] [blame] | 1186 | /* |
| 1187 | * According to the JEDEC Standard, the value of |
| 1188 | * ext_csd's capacity is valid if the value is more |
| 1189 | * than 2GB |
| 1190 | */ |
Lei Wen | 217467f | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 1191 | capacity = ext_csd[EXT_CSD_SEC_CNT] << 0 |
| 1192 | | ext_csd[EXT_CSD_SEC_CNT + 1] << 8 |
| 1193 | | ext_csd[EXT_CSD_SEC_CNT + 2] << 16 |
| 1194 | | ext_csd[EXT_CSD_SEC_CNT + 3] << 24; |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 1195 | capacity *= MMC_MAX_BLOCK_LEN; |
Łukasz Majewski | 237823e | 2011-07-05 02:19:44 +0000 | [diff] [blame] | 1196 | if ((capacity >> 20) > 2 * 1024) |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1197 | mmc->capacity_user = capacity; |
Sukumar Ghorai | 232293c | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 1198 | } |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1199 | |
Jaehoon Chung | 6108ef6 | 2013-01-29 19:31:16 +0000 | [diff] [blame] | 1200 | switch (ext_csd[EXT_CSD_REV]) { |
| 1201 | case 1: |
| 1202 | mmc->version = MMC_VERSION_4_1; |
| 1203 | break; |
| 1204 | case 2: |
| 1205 | mmc->version = MMC_VERSION_4_2; |
| 1206 | break; |
| 1207 | case 3: |
| 1208 | mmc->version = MMC_VERSION_4_3; |
| 1209 | break; |
| 1210 | case 5: |
| 1211 | mmc->version = MMC_VERSION_4_41; |
| 1212 | break; |
| 1213 | case 6: |
| 1214 | mmc->version = MMC_VERSION_4_5; |
| 1215 | break; |
Markus Niebel | 32f53b6 | 2014-11-18 15:13:53 +0100 | [diff] [blame] | 1216 | case 7: |
| 1217 | mmc->version = MMC_VERSION_5_0; |
| 1218 | break; |
Jaehoon Chung | 6108ef6 | 2013-01-29 19:31:16 +0000 | [diff] [blame] | 1219 | } |
| 1220 | |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1221 | /* The partition data may be non-zero but it is only |
| 1222 | * effective if PARTITION_SETTING_COMPLETED is set in |
| 1223 | * EXT_CSD, so ignore any data if this bit is not set, |
| 1224 | * except for enabling the high-capacity group size |
| 1225 | * definition (see below). */ |
| 1226 | part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] & |
| 1227 | EXT_CSD_PARTITION_SETTING_COMPLETED); |
| 1228 | |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1229 | /* store the partition info of emmc */ |
| 1230 | mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT]; |
| 1231 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) || |
| 1232 | ext_csd[EXT_CSD_BOOT_MULT]) |
| 1233 | mmc->part_config = ext_csd[EXT_CSD_PART_CONF]; |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1234 | if (part_completed && |
| 1235 | (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT)) |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1236 | mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE]; |
| 1237 | |
| 1238 | mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17; |
| 1239 | |
| 1240 | mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17; |
| 1241 | |
| 1242 | for (i = 0; i < 4; i++) { |
| 1243 | int idx = EXT_CSD_GP_SIZE_MULT + i * 3; |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1244 | uint mult = (ext_csd[idx + 2] << 16) + |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1245 | (ext_csd[idx + 1] << 8) + ext_csd[idx]; |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1246 | if (mult) |
| 1247 | has_parts = true; |
| 1248 | if (!part_completed) |
| 1249 | continue; |
| 1250 | mmc->capacity_gp[i] = mult; |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1251 | mmc->capacity_gp[i] *= |
| 1252 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; |
| 1253 | mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
Diego Santa Cruz | e5a2a3a | 2014-12-23 10:50:21 +0100 | [diff] [blame] | 1254 | mmc->capacity_gp[i] <<= 19; |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1255 | } |
| 1256 | |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1257 | if (part_completed) { |
| 1258 | mmc->enh_user_size = |
| 1259 | (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) + |
| 1260 | (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) + |
| 1261 | ext_csd[EXT_CSD_ENH_SIZE_MULT]; |
| 1262 | mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]; |
| 1263 | mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
| 1264 | mmc->enh_user_size <<= 19; |
| 1265 | mmc->enh_user_start = |
| 1266 | (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) + |
| 1267 | (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) + |
| 1268 | (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) + |
| 1269 | ext_csd[EXT_CSD_ENH_START_ADDR]; |
| 1270 | if (mmc->high_capacity) |
| 1271 | mmc->enh_user_start <<= 9; |
| 1272 | } |
Diego Santa Cruz | 3b62d84 | 2014-12-23 10:50:22 +0100 | [diff] [blame] | 1273 | |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 1274 | /* |
Oliver Metz | b3f1409 | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 1275 | * Host needs to enable ERASE_GRP_DEF bit if device is |
| 1276 | * partitioned. This bit will be lost every time after a reset |
| 1277 | * or power off. This will affect erase size. |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 1278 | */ |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1279 | if (part_completed) |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1280 | has_parts = true; |
Oliver Metz | b3f1409 | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 1281 | if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) && |
Diego Santa Cruz | cea8c5c | 2014-12-23 10:50:20 +0100 | [diff] [blame] | 1282 | (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB)) |
| 1283 | has_parts = true; |
| 1284 | if (has_parts) { |
Oliver Metz | b3f1409 | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 1285 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
| 1286 | EXT_CSD_ERASE_GROUP_DEF, 1); |
| 1287 | |
| 1288 | if (err) |
| 1289 | return err; |
Hannes Petermaier | 15e874d | 2014-08-08 09:47:22 +0200 | [diff] [blame] | 1290 | else |
| 1291 | ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1; |
Diego Santa Cruz | 61b78fe | 2014-12-23 10:50:25 +0100 | [diff] [blame] | 1292 | } |
Oliver Metz | b3f1409 | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 1293 | |
Diego Santa Cruz | 61b78fe | 2014-12-23 10:50:25 +0100 | [diff] [blame] | 1294 | if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) { |
Oliver Metz | b3f1409 | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 1295 | /* Read out group size from ext_csd */ |
Lei Wen | 217467f | 2011-10-03 20:35:10 +0000 | [diff] [blame] | 1296 | mmc->erase_grp_size = |
Diego Santa Cruz | 747f6fa | 2014-12-23 10:50:24 +0100 | [diff] [blame] | 1297 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024; |
Markus Niebel | 6d39892 | 2014-11-18 15:11:42 +0100 | [diff] [blame] | 1298 | /* |
| 1299 | * if high capacity and partition setting completed |
| 1300 | * SEC_COUNT is valid even if it is smaller than 2 GiB |
| 1301 | * JEDEC Standard JESD84-B45, 6.2.4 |
| 1302 | */ |
Diego Santa Cruz | a7a7599 | 2014-12-23 10:50:27 +0100 | [diff] [blame] | 1303 | if (mmc->high_capacity && part_completed) { |
Markus Niebel | 6d39892 | 2014-11-18 15:11:42 +0100 | [diff] [blame] | 1304 | capacity = (ext_csd[EXT_CSD_SEC_CNT]) | |
| 1305 | (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) | |
| 1306 | (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) | |
| 1307 | (ext_csd[EXT_CSD_SEC_CNT + 3] << 24); |
| 1308 | capacity *= MMC_MAX_BLOCK_LEN; |
| 1309 | mmc->capacity_user = capacity; |
| 1310 | } |
Simon Glass | a09c2b7 | 2013-04-03 08:54:30 +0000 | [diff] [blame] | 1311 | } else { |
Oliver Metz | b3f1409 | 2013-10-01 20:32:07 +0200 | [diff] [blame] | 1312 | /* Calculate the group size from the csd value. */ |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 1313 | int erase_gsz, erase_gmul; |
| 1314 | erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10; |
| 1315 | erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5; |
| 1316 | mmc->erase_grp_size = (erase_gsz + 1) |
| 1317 | * (erase_gmul + 1); |
| 1318 | } |
Diego Santa Cruz | 61b78fe | 2014-12-23 10:50:25 +0100 | [diff] [blame] | 1319 | |
| 1320 | mmc->hc_wp_grp_size = 1024 |
| 1321 | * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] |
| 1322 | * ext_csd[EXT_CSD_HC_WP_GRP_SIZE]; |
Diego Santa Cruz | 37a50b9 | 2014-12-23 10:50:33 +0100 | [diff] [blame] | 1323 | |
| 1324 | mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET]; |
Sukumar Ghorai | 232293c | 2010-09-20 18:29:29 +0530 | [diff] [blame] | 1325 | } |
| 1326 | |
Stephen Warren | e315ae8 | 2013-06-11 15:14:01 -0600 | [diff] [blame] | 1327 | err = mmc_set_capacity(mmc, mmc->part_num); |
| 1328 | if (err) |
| 1329 | return err; |
| 1330 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1331 | if (IS_SD(mmc)) |
| 1332 | err = sd_change_freq(mmc); |
| 1333 | else |
| 1334 | err = mmc_change_freq(mmc); |
| 1335 | |
| 1336 | if (err) |
| 1337 | return err; |
| 1338 | |
| 1339 | /* Restrict card's capabilities by what the host can do */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1340 | mmc->card_caps &= mmc->cfg->host_caps; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1341 | |
| 1342 | if (IS_SD(mmc)) { |
| 1343 | if (mmc->card_caps & MMC_MODE_4BIT) { |
| 1344 | cmd.cmdidx = MMC_CMD_APP_CMD; |
| 1345 | cmd.resp_type = MMC_RSP_R1; |
| 1346 | cmd.cmdarg = mmc->rca << 16; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1347 | |
| 1348 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1349 | if (err) |
| 1350 | return err; |
| 1351 | |
| 1352 | cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH; |
| 1353 | cmd.resp_type = MMC_RSP_R1; |
| 1354 | cmd.cmdarg = 2; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1355 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1356 | if (err) |
| 1357 | return err; |
| 1358 | |
| 1359 | mmc_set_bus_width(mmc, 4); |
| 1360 | } |
| 1361 | |
| 1362 | if (mmc->card_caps & MMC_MODE_HS) |
Jaehoon Chung | e1d4c7b | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1363 | mmc->tran_speed = 50000000; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1364 | else |
Jaehoon Chung | e1d4c7b | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1365 | mmc->tran_speed = 25000000; |
Andrew Gabbasov | ccb7b04 | 2014-12-25 10:22:25 -0600 | [diff] [blame] | 1366 | } else if (mmc->version >= MMC_VERSION_4) { |
| 1367 | /* Only version 4 of MMC supports wider bus widths */ |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1368 | int idx; |
| 1369 | |
| 1370 | /* An array of possible bus widths in order of preference */ |
| 1371 | static unsigned ext_csd_bits[] = { |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 1372 | EXT_CSD_DDR_BUS_WIDTH_8, |
| 1373 | EXT_CSD_DDR_BUS_WIDTH_4, |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1374 | EXT_CSD_BUS_WIDTH_8, |
| 1375 | EXT_CSD_BUS_WIDTH_4, |
| 1376 | EXT_CSD_BUS_WIDTH_1, |
| 1377 | }; |
| 1378 | |
| 1379 | /* An array to map CSD bus widths to host cap bits */ |
| 1380 | static unsigned ext_to_hostcaps[] = { |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1381 | [EXT_CSD_DDR_BUS_WIDTH_4] = |
| 1382 | MMC_MODE_DDR_52MHz | MMC_MODE_4BIT, |
| 1383 | [EXT_CSD_DDR_BUS_WIDTH_8] = |
| 1384 | MMC_MODE_DDR_52MHz | MMC_MODE_8BIT, |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1385 | [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT, |
| 1386 | [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT, |
| 1387 | }; |
| 1388 | |
| 1389 | /* An array to map chosen bus width to an integer */ |
| 1390 | static unsigned widths[] = { |
Jaehoon Chung | 38ce30b | 2014-05-16 13:59:54 +0900 | [diff] [blame] | 1391 | 8, 4, 8, 4, 1, |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1392 | }; |
| 1393 | |
| 1394 | for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) { |
| 1395 | unsigned int extw = ext_csd_bits[idx]; |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1396 | unsigned int caps = ext_to_hostcaps[extw]; |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1397 | |
| 1398 | /* |
Andrew Gabbasov | c1b2cf0 | 2014-12-25 10:22:24 -0600 | [diff] [blame] | 1399 | * If the bus width is still not changed, |
| 1400 | * don't try to set the default again. |
| 1401 | * Otherwise, recover from switch attempts |
| 1402 | * by switching to 1-bit bus width. |
| 1403 | */ |
| 1404 | if (extw == EXT_CSD_BUS_WIDTH_1 && |
| 1405 | mmc->bus_width == 1) { |
| 1406 | err = 0; |
| 1407 | break; |
| 1408 | } |
| 1409 | |
| 1410 | /* |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1411 | * Check to make sure the card and controller support |
| 1412 | * these capabilities |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1413 | */ |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1414 | if ((mmc->card_caps & caps) != caps) |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1415 | continue; |
| 1416 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1417 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1418 | EXT_CSD_BUS_WIDTH, extw); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1419 | |
| 1420 | if (err) |
Lei Wen | 4f5a6a5 | 2011-10-03 20:35:11 +0000 | [diff] [blame] | 1421 | continue; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1422 | |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1423 | mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0; |
Andy Fleming | eb766ad | 2012-10-31 19:02:38 +0000 | [diff] [blame] | 1424 | mmc_set_bus_width(mmc, widths[idx]); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1425 | |
Lei Wen | 4f5a6a5 | 2011-10-03 20:35:11 +0000 | [diff] [blame] | 1426 | err = mmc_send_ext_csd(mmc, test_csd); |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1427 | |
| 1428 | if (err) |
| 1429 | continue; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1430 | |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1431 | /* Only compare read only fields */ |
| 1432 | if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] |
| 1433 | == test_csd[EXT_CSD_PARTITIONING_SUPPORT] && |
| 1434 | ext_csd[EXT_CSD_HC_WP_GRP_SIZE] |
| 1435 | == test_csd[EXT_CSD_HC_WP_GRP_SIZE] && |
| 1436 | ext_csd[EXT_CSD_REV] |
| 1437 | == test_csd[EXT_CSD_REV] && |
| 1438 | ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] |
| 1439 | == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] && |
| 1440 | memcmp(&ext_csd[EXT_CSD_SEC_CNT], |
| 1441 | &test_csd[EXT_CSD_SEC_CNT], 4) == 0) |
Lei Wen | 4f5a6a5 | 2011-10-03 20:35:11 +0000 | [diff] [blame] | 1442 | break; |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1443 | else |
| 1444 | err = SWITCH_ERR; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1445 | } |
| 1446 | |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1447 | if (err) |
| 1448 | return err; |
| 1449 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1450 | if (mmc->card_caps & MMC_MODE_HS) { |
| 1451 | if (mmc->card_caps & MMC_MODE_HS_52MHz) |
Jaehoon Chung | e1d4c7b | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1452 | mmc->tran_speed = 52000000; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1453 | else |
Jaehoon Chung | e1d4c7b | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1454 | mmc->tran_speed = 26000000; |
| 1455 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1456 | } |
| 1457 | |
Jaehoon Chung | e1d4c7b | 2012-03-26 21:16:03 +0000 | [diff] [blame] | 1458 | mmc_set_clock(mmc, mmc->tran_speed); |
| 1459 | |
Andrew Gabbasov | 532663b | 2014-12-01 06:59:11 -0600 | [diff] [blame] | 1460 | /* Fix the block length for DDR mode */ |
| 1461 | if (mmc->ddr_mode) { |
| 1462 | mmc->read_bl_len = MMC_MAX_BLOCK_LEN; |
| 1463 | mmc->write_bl_len = MMC_MAX_BLOCK_LEN; |
| 1464 | } |
| 1465 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1466 | /* fill in device description */ |
| 1467 | mmc->block_dev.lun = 0; |
| 1468 | mmc->block_dev.type = 0; |
| 1469 | mmc->block_dev.blksz = mmc->read_bl_len; |
Egbert Eich | 2eec2ab | 2013-04-09 21:11:56 +0000 | [diff] [blame] | 1470 | mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz); |
Rabin Vincent | 69d4e2c | 2009-04-05 13:30:54 +0530 | [diff] [blame] | 1471 | mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1472 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Taylor Hutt | 7367ec2 | 2012-10-20 17:15:59 +0000 | [diff] [blame] | 1473 | sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x", |
| 1474 | mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff), |
| 1475 | (mmc->cid[3] >> 16) & 0xffff); |
| 1476 | sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff, |
| 1477 | (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff, |
| 1478 | (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff, |
| 1479 | (mmc->cid[2] >> 24) & 0xff); |
| 1480 | sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf, |
| 1481 | (mmc->cid[2] >> 16) & 0xf); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1482 | #else |
| 1483 | mmc->block_dev.vendor[0] = 0; |
| 1484 | mmc->block_dev.product[0] = 0; |
| 1485 | mmc->block_dev.revision[0] = 0; |
| 1486 | #endif |
Mikhail Kshevetskiy | 5cbfa8e7a | 2012-07-09 08:53:38 +0000 | [diff] [blame] | 1487 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1488 | init_part(&mmc->block_dev); |
Mikhail Kshevetskiy | 5cbfa8e7a | 2012-07-09 08:53:38 +0000 | [diff] [blame] | 1489 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1490 | |
| 1491 | return 0; |
| 1492 | } |
| 1493 | |
Kim Phillips | 87ea389 | 2012-10-29 13:34:43 +0000 | [diff] [blame] | 1494 | static int mmc_send_if_cond(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1495 | { |
| 1496 | struct mmc_cmd cmd; |
| 1497 | int err; |
| 1498 | |
| 1499 | cmd.cmdidx = SD_CMD_SEND_IF_COND; |
| 1500 | /* We set the bit if the host supports voltages between 2.7 and 3.6 V */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1501 | cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1502 | cmd.resp_type = MMC_RSP_R7; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1503 | |
| 1504 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1505 | |
| 1506 | if (err) |
| 1507 | return err; |
| 1508 | |
Rabin Vincent | b6eed94 | 2009-04-05 13:30:56 +0530 | [diff] [blame] | 1509 | if ((cmd.response[0] & 0xff) != 0xaa) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1510 | return UNUSABLE_ERR; |
| 1511 | else |
| 1512 | mmc->version = SD_VERSION_2; |
| 1513 | |
| 1514 | return 0; |
| 1515 | } |
| 1516 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1517 | /* not used any more */ |
| 1518 | int __deprecated mmc_register(struct mmc *mmc) |
| 1519 | { |
| 1520 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
| 1521 | printf("%s is deprecated! use mmc_create() instead.\n", __func__); |
| 1522 | #endif |
| 1523 | return -1; |
| 1524 | } |
| 1525 | |
| 1526 | struct mmc *mmc_create(const struct mmc_config *cfg, void *priv) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1527 | { |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1528 | struct mmc *mmc; |
| 1529 | |
| 1530 | /* quick validation */ |
| 1531 | if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL || |
| 1532 | cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0) |
| 1533 | return NULL; |
| 1534 | |
| 1535 | mmc = calloc(1, sizeof(*mmc)); |
| 1536 | if (mmc == NULL) |
| 1537 | return NULL; |
| 1538 | |
| 1539 | mmc->cfg = cfg; |
| 1540 | mmc->priv = priv; |
| 1541 | |
| 1542 | /* the following chunk was mmc_register() */ |
| 1543 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 1544 | /* Setup dsr related values */ |
| 1545 | mmc->dsr_imp = 0; |
| 1546 | mmc->dsr = 0xffffffff; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1547 | /* Setup the universal parts of the block interface just once */ |
| 1548 | mmc->block_dev.if_type = IF_TYPE_MMC; |
| 1549 | mmc->block_dev.dev = cur_dev_num++; |
| 1550 | mmc->block_dev.removable = 1; |
| 1551 | mmc->block_dev.block_read = mmc_bread; |
| 1552 | mmc->block_dev.block_write = mmc_bwrite; |
Lei Wen | ea52676 | 2011-06-22 17:03:31 +0000 | [diff] [blame] | 1553 | mmc->block_dev.block_erase = mmc_berase; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1554 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1555 | /* setup initial part type */ |
| 1556 | mmc->block_dev.part_type = mmc->cfg->part_type; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1557 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1558 | INIT_LIST_HEAD(&mmc->link); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1559 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1560 | list_add_tail(&mmc->link, &mmc_devices); |
| 1561 | |
| 1562 | return mmc; |
| 1563 | } |
| 1564 | |
| 1565 | void mmc_destroy(struct mmc *mmc) |
| 1566 | { |
| 1567 | /* only freeing memory for now */ |
| 1568 | free(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1569 | } |
| 1570 | |
Matthew McClintock | 6252b4f | 2011-05-24 05:31:19 +0000 | [diff] [blame] | 1571 | #ifdef CONFIG_PARTITIONS |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1572 | block_dev_desc_t *mmc_get_dev(int dev) |
| 1573 | { |
| 1574 | struct mmc *mmc = find_mmc_device(dev); |
Benoît Thébaudeau | 6ce8aed | 2012-08-10 08:59:12 +0000 | [diff] [blame] | 1575 | if (!mmc || mmc_init(mmc)) |
Łukasz Majewski | 65b04cf | 2012-04-19 02:39:18 +0000 | [diff] [blame] | 1576 | return NULL; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1577 | |
Łukasz Majewski | 65b04cf | 2012-04-19 02:39:18 +0000 | [diff] [blame] | 1578 | return &mmc->block_dev; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1579 | } |
Matthew McClintock | 6252b4f | 2011-05-24 05:31:19 +0000 | [diff] [blame] | 1580 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1581 | |
Paul Kocialkowski | 2439fe9 | 2014-11-08 20:55:45 +0100 | [diff] [blame] | 1582 | /* board-specific MMC power initializations. */ |
| 1583 | __weak void board_mmc_power_init(void) |
| 1584 | { |
| 1585 | } |
| 1586 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1587 | int mmc_start_init(struct mmc *mmc) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1588 | { |
Macpaul Lin | 028bde1 | 2011-11-14 23:35:39 +0000 | [diff] [blame] | 1589 | int err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1590 | |
Pantelis Antoniou | c9e7591 | 2014-02-26 19:28:45 +0200 | [diff] [blame] | 1591 | /* we pretend there's no card when init is NULL */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1592 | if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) { |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1593 | mmc->has_init = 0; |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1594 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1595 | printf("MMC: no card present\n"); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1596 | #endif |
Thierry Reding | b9c8b77 | 2012-01-02 01:15:37 +0000 | [diff] [blame] | 1597 | return NO_CARD_ERR; |
| 1598 | } |
| 1599 | |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1600 | if (mmc->has_init) |
| 1601 | return 0; |
| 1602 | |
Yangbo Lu | b124f8a | 2015-04-22 13:57:00 +0800 | [diff] [blame] | 1603 | #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT |
| 1604 | mmc_adapter_card_type_ident(); |
| 1605 | #endif |
Paul Kocialkowski | 2439fe9 | 2014-11-08 20:55:45 +0100 | [diff] [blame] | 1606 | board_mmc_power_init(); |
| 1607 | |
Pantelis Antoniou | c9e7591 | 2014-02-26 19:28:45 +0200 | [diff] [blame] | 1608 | /* made sure it's not NULL earlier */ |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1609 | err = mmc->cfg->ops->init(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1610 | |
| 1611 | if (err) |
| 1612 | return err; |
| 1613 | |
Andrew Gabbasov | 9fc2a41 | 2014-12-01 06:59:09 -0600 | [diff] [blame] | 1614 | mmc->ddr_mode = 0; |
Ilya Yanok | 8459aab | 2009-06-29 17:53:16 +0400 | [diff] [blame] | 1615 | mmc_set_bus_width(mmc, 1); |
| 1616 | mmc_set_clock(mmc, 1); |
| 1617 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1618 | /* Reset the Card */ |
| 1619 | err = mmc_go_idle(mmc); |
| 1620 | |
| 1621 | if (err) |
| 1622 | return err; |
| 1623 | |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1624 | /* The internal partition reset to user partition(0) at every CMD0*/ |
| 1625 | mmc->part_num = 0; |
| 1626 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1627 | /* Test for SD version 2 */ |
Macpaul Lin | 028bde1 | 2011-11-14 23:35:39 +0000 | [diff] [blame] | 1628 | err = mmc_send_if_cond(mmc); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1629 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1630 | /* Now try to get the SD card's operating condition */ |
| 1631 | err = sd_send_op_cond(mmc); |
| 1632 | |
| 1633 | /* If the command timed out, we check for an MMC card */ |
| 1634 | if (err == TIMEOUT) { |
| 1635 | err = mmc_send_op_cond(mmc); |
| 1636 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 1637 | if (err) { |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1638 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1639 | printf("Card did not respond to voltage select!\n"); |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1640 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1641 | return UNUSABLE_ERR; |
| 1642 | } |
| 1643 | } |
| 1644 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 1645 | if (!err) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1646 | mmc->init_in_progress = 1; |
| 1647 | |
| 1648 | return err; |
| 1649 | } |
| 1650 | |
| 1651 | static int mmc_complete_init(struct mmc *mmc) |
| 1652 | { |
| 1653 | int err = 0; |
| 1654 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 1655 | mmc->init_in_progress = 0; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1656 | if (mmc->op_cond_pending) |
| 1657 | err = mmc_complete_op_cond(mmc); |
| 1658 | |
| 1659 | if (!err) |
| 1660 | err = mmc_startup(mmc); |
Lei Wen | 31b9980 | 2011-05-02 16:26:26 +0000 | [diff] [blame] | 1661 | if (err) |
| 1662 | mmc->has_init = 0; |
| 1663 | else |
| 1664 | mmc->has_init = 1; |
| 1665 | return err; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1666 | } |
| 1667 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1668 | int mmc_init(struct mmc *mmc) |
| 1669 | { |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 1670 | int err = 0; |
Mateusz Zalega | da35178 | 2014-04-29 20:15:30 +0200 | [diff] [blame] | 1671 | unsigned start; |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1672 | |
| 1673 | if (mmc->has_init) |
| 1674 | return 0; |
Mateusz Zalega | da35178 | 2014-04-29 20:15:30 +0200 | [diff] [blame] | 1675 | |
| 1676 | start = get_timer(0); |
| 1677 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1678 | if (!mmc->init_in_progress) |
| 1679 | err = mmc_start_init(mmc); |
| 1680 | |
Andrew Gabbasov | 3a669bc | 2015-03-19 07:44:07 -0500 | [diff] [blame] | 1681 | if (!err) |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1682 | err = mmc_complete_init(mmc); |
| 1683 | debug("%s: %d, time %lu\n", __func__, err, get_timer(start)); |
| 1684 | return err; |
| 1685 | } |
| 1686 | |
Markus Niebel | 0395141 | 2013-12-16 13:40:46 +0100 | [diff] [blame] | 1687 | int mmc_set_dsr(struct mmc *mmc, u16 val) |
| 1688 | { |
| 1689 | mmc->dsr = val; |
| 1690 | return 0; |
| 1691 | } |
| 1692 | |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 1693 | /* CPU-specific MMC initializations */ |
| 1694 | __weak int cpu_mmc_init(bd_t *bis) |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1695 | { |
| 1696 | return -1; |
| 1697 | } |
| 1698 | |
Jeroen Hofstee | 4772630 | 2014-07-10 22:46:28 +0200 | [diff] [blame] | 1699 | /* board-specific MMC initializations. */ |
| 1700 | __weak int board_mmc_init(bd_t *bis) |
| 1701 | { |
| 1702 | return -1; |
| 1703 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1704 | |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1705 | #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) |
| 1706 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1707 | void print_mmc_devices(char separator) |
| 1708 | { |
| 1709 | struct mmc *m; |
| 1710 | struct list_head *entry; |
Przemyslaw Marczak | 7bc4e30 | 2015-02-20 12:29:27 +0100 | [diff] [blame] | 1711 | char *mmc_type; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1712 | |
| 1713 | list_for_each(entry, &mmc_devices) { |
| 1714 | m = list_entry(entry, struct mmc, link); |
| 1715 | |
Przemyslaw Marczak | 7bc4e30 | 2015-02-20 12:29:27 +0100 | [diff] [blame] | 1716 | if (m->has_init) |
| 1717 | mmc_type = IS_SD(m) ? "SD" : "eMMC"; |
| 1718 | else |
| 1719 | mmc_type = NULL; |
| 1720 | |
Pantelis Antoniou | 2c85046 | 2014-03-11 19:34:20 +0200 | [diff] [blame] | 1721 | printf("%s: %d", m->cfg->name, m->block_dev.dev); |
Przemyslaw Marczak | 7bc4e30 | 2015-02-20 12:29:27 +0100 | [diff] [blame] | 1722 | if (mmc_type) |
| 1723 | printf(" (%s)", mmc_type); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1724 | |
Lubomir Popov | 456104e | 2014-11-11 12:25:42 +0200 | [diff] [blame] | 1725 | if (entry->next != &mmc_devices) { |
| 1726 | printf("%c", separator); |
| 1727 | if (separator != '\n') |
| 1728 | puts (" "); |
| 1729 | } |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1730 | } |
| 1731 | |
| 1732 | printf("\n"); |
| 1733 | } |
| 1734 | |
Paul Burton | 6a7c5ba | 2013-09-04 16:12:25 +0100 | [diff] [blame] | 1735 | #else |
| 1736 | void print_mmc_devices(char separator) { } |
| 1737 | #endif |
| 1738 | |
Lei Wen | d430d7c | 2011-05-02 16:26:25 +0000 | [diff] [blame] | 1739 | int get_mmc_num(void) |
| 1740 | { |
| 1741 | return cur_dev_num; |
| 1742 | } |
| 1743 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1744 | void mmc_set_preinit(struct mmc *mmc, int preinit) |
| 1745 | { |
| 1746 | mmc->preinit = preinit; |
| 1747 | } |
| 1748 | |
| 1749 | static void do_preinit(void) |
| 1750 | { |
| 1751 | struct mmc *m; |
| 1752 | struct list_head *entry; |
| 1753 | |
| 1754 | list_for_each(entry, &mmc_devices) { |
| 1755 | m = list_entry(entry, struct mmc, link); |
| 1756 | |
Yangbo Lu | b124f8a | 2015-04-22 13:57:00 +0800 | [diff] [blame] | 1757 | #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT |
| 1758 | mmc_set_preinit(m, 1); |
| 1759 | #endif |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1760 | if (m->preinit) |
| 1761 | mmc_start_init(m); |
| 1762 | } |
| 1763 | } |
| 1764 | |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 1765 | #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD) |
| 1766 | static int mmc_probe(bd_t *bis) |
| 1767 | { |
| 1768 | return 0; |
| 1769 | } |
| 1770 | #elif defined(CONFIG_DM_MMC) |
| 1771 | static int mmc_probe(bd_t *bis) |
| 1772 | { |
| 1773 | int ret; |
| 1774 | struct uclass *uc; |
| 1775 | struct udevice *m; |
| 1776 | |
| 1777 | ret = uclass_get(UCLASS_MMC, &uc); |
| 1778 | if (ret) |
| 1779 | return ret; |
| 1780 | |
| 1781 | uclass_foreach_dev(m, uc) { |
| 1782 | ret = device_probe(m); |
| 1783 | if (ret) |
| 1784 | printf("%s - probe failed: %d\n", m->name, ret); |
| 1785 | } |
| 1786 | |
| 1787 | return 0; |
| 1788 | } |
| 1789 | #else |
| 1790 | static int mmc_probe(bd_t *bis) |
| 1791 | { |
| 1792 | if (board_mmc_init(bis) < 0) |
| 1793 | cpu_mmc_init(bis); |
| 1794 | |
| 1795 | return 0; |
| 1796 | } |
| 1797 | #endif |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1798 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1799 | int mmc_initialize(bd_t *bis) |
| 1800 | { |
Daniel Kochmański | 13df57b | 2015-05-29 16:55:43 +0200 | [diff] [blame] | 1801 | static int initialized = 0; |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 1802 | int ret; |
Daniel Kochmański | 13df57b | 2015-05-29 16:55:43 +0200 | [diff] [blame] | 1803 | if (initialized) /* Avoid initializing mmc multiple times */ |
| 1804 | return 0; |
| 1805 | initialized = 1; |
| 1806 | |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1807 | INIT_LIST_HEAD (&mmc_devices); |
| 1808 | cur_dev_num = 0; |
| 1809 | |
Sjoerd Simons | df8aa52 | 2015-08-30 16:55:45 -0600 | [diff] [blame] | 1810 | ret = mmc_probe(bis); |
| 1811 | if (ret) |
| 1812 | return ret; |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1813 | |
Ying Zhang | 9ff7026 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 1814 | #ifndef CONFIG_SPL_BUILD |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1815 | print_mmc_devices(','); |
Ying Zhang | 9ff7026 | 2013-08-16 15:16:11 +0800 | [diff] [blame] | 1816 | #endif |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1817 | |
Che-Liang Chiou | 4a2c7d7 | 2012-11-28 15:21:13 +0000 | [diff] [blame] | 1818 | do_preinit(); |
Andy Fleming | ad347bb | 2008-10-30 16:41:01 -0500 | [diff] [blame] | 1819 | return 0; |
| 1820 | } |
Amar | 1104e9b | 2013-04-27 11:42:58 +0530 | [diff] [blame] | 1821 | |
| 1822 | #ifdef CONFIG_SUPPORT_EMMC_BOOT |
| 1823 | /* |
| 1824 | * This function changes the size of boot partition and the size of rpmb |
| 1825 | * partition present on EMMC devices. |
| 1826 | * |
| 1827 | * Input Parameters: |
| 1828 | * struct *mmc: pointer for the mmc device strcuture |
| 1829 | * bootsize: size of boot partition |
| 1830 | * rpmbsize: size of rpmb partition |
| 1831 | * |
| 1832 | * Returns 0 on success. |
| 1833 | */ |
| 1834 | |
| 1835 | int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize, |
| 1836 | unsigned long rpmbsize) |
| 1837 | { |
| 1838 | int err; |
| 1839 | struct mmc_cmd cmd; |
| 1840 | |
| 1841 | /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */ |
| 1842 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1843 | cmd.resp_type = MMC_RSP_R1b; |
| 1844 | cmd.cmdarg = MMC_CMD62_ARG1; |
| 1845 | |
| 1846 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1847 | if (err) { |
| 1848 | debug("mmc_boot_partition_size_change: Error1 = %d\n", err); |
| 1849 | return err; |
| 1850 | } |
| 1851 | |
| 1852 | /* Boot partition changing mode */ |
| 1853 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1854 | cmd.resp_type = MMC_RSP_R1b; |
| 1855 | cmd.cmdarg = MMC_CMD62_ARG2; |
| 1856 | |
| 1857 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1858 | if (err) { |
| 1859 | debug("mmc_boot_partition_size_change: Error2 = %d\n", err); |
| 1860 | return err; |
| 1861 | } |
| 1862 | /* boot partition size is multiple of 128KB */ |
| 1863 | bootsize = (bootsize * 1024) / 128; |
| 1864 | |
| 1865 | /* Arg: boot partition size */ |
| 1866 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1867 | cmd.resp_type = MMC_RSP_R1b; |
| 1868 | cmd.cmdarg = bootsize; |
| 1869 | |
| 1870 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1871 | if (err) { |
| 1872 | debug("mmc_boot_partition_size_change: Error3 = %d\n", err); |
| 1873 | return err; |
| 1874 | } |
| 1875 | /* RPMB partition size is multiple of 128KB */ |
| 1876 | rpmbsize = (rpmbsize * 1024) / 128; |
| 1877 | /* Arg: RPMB partition size */ |
| 1878 | cmd.cmdidx = MMC_CMD_RES_MAN; |
| 1879 | cmd.resp_type = MMC_RSP_R1b; |
| 1880 | cmd.cmdarg = rpmbsize; |
| 1881 | |
| 1882 | err = mmc_send_cmd(mmc, &cmd, NULL); |
| 1883 | if (err) { |
| 1884 | debug("mmc_boot_partition_size_change: Error4 = %d\n", err); |
| 1885 | return err; |
| 1886 | } |
| 1887 | return 0; |
| 1888 | } |
| 1889 | |
| 1890 | /* |
Tom Rini | 4cf854c | 2014-02-05 10:24:22 -0500 | [diff] [blame] | 1891 | * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH |
| 1892 | * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH |
| 1893 | * and BOOT_MODE. |
| 1894 | * |
| 1895 | * Returns 0 on success. |
| 1896 | */ |
| 1897 | int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode) |
| 1898 | { |
| 1899 | int err; |
| 1900 | |
| 1901 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH, |
| 1902 | EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) | |
| 1903 | EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) | |
| 1904 | EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width)); |
| 1905 | |
| 1906 | if (err) |
| 1907 | return err; |
| 1908 | return 0; |
| 1909 | } |
| 1910 | |
| 1911 | /* |
Tom Rini | f8c6f79 | 2014-02-05 10:24:21 -0500 | [diff] [blame] | 1912 | * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG) |
| 1913 | * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and |
| 1914 | * PARTITION_ACCESS. |
| 1915 | * |
| 1916 | * Returns 0 on success. |
| 1917 | */ |
| 1918 | int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access) |
| 1919 | { |
| 1920 | int err; |
| 1921 | |
| 1922 | err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF, |
| 1923 | EXT_CSD_BOOT_ACK(ack) | |
| 1924 | EXT_CSD_BOOT_PART_NUM(part_num) | |
| 1925 | EXT_CSD_PARTITION_ACCESS(access)); |
| 1926 | |
| 1927 | if (err) |
| 1928 | return err; |
| 1929 | return 0; |
| 1930 | } |
Tom Rini | 35a3ea1 | 2014-02-07 14:15:20 -0500 | [diff] [blame] | 1931 | |
| 1932 | /* |
| 1933 | * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value |
| 1934 | * for enable. Note that this is a write-once field for non-zero values. |
| 1935 | * |
| 1936 | * Returns 0 on success. |
| 1937 | */ |
| 1938 | int mmc_set_rst_n_function(struct mmc *mmc, u8 enable) |
| 1939 | { |
| 1940 | return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION, |
| 1941 | enable); |
| 1942 | } |
Amar | 1104e9b | 2013-04-27 11:42:58 +0530 | [diff] [blame] | 1943 | #endif |