Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/ |
| 4 | */ |
| 5 | |
| 6 | / { |
| 7 | chosen { |
| 8 | stdout-path = "serial2:115200n8"; |
| 9 | tick-timer = &timer1; |
| 10 | }; |
| 11 | |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 12 | aliases { |
| 13 | ethernet0 = &cpsw_port1; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 14 | i2c0 = &wkup_i2c0; |
| 15 | i2c1 = &mcu_i2c0; |
| 16 | i2c2 = &mcu_i2c1; |
| 17 | i2c3 = &main_i2c0; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 18 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 19 | }; |
| 20 | |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 21 | &cbass_main { |
| 22 | u-boot,dm-spl; |
| 23 | }; |
| 24 | |
| 25 | &main_navss { |
| 26 | u-boot,dm-spl; |
| 27 | }; |
| 28 | |
| 29 | &cbass_mcu_wakeup { |
| 30 | u-boot,dm-spl; |
| 31 | |
| 32 | timer1: timer@40400000 { |
| 33 | compatible = "ti,omap5430-timer"; |
| 34 | reg = <0x0 0x40400000 0x0 0x80>; |
| 35 | ti,timer-alwon; |
| 36 | clock-frequency = <25000000>; |
| 37 | u-boot,dm-spl; |
| 38 | }; |
Lokesh Vutla | 195eb68 | 2021-02-01 11:26:41 +0530 | [diff] [blame] | 39 | |
| 40 | chipid@43000014 { |
| 41 | u-boot,dm-spl; |
| 42 | }; |
Lokesh Vutla | c833970 | 2020-08-05 22:44:28 +0530 | [diff] [blame] | 43 | }; |
| 44 | |
| 45 | &secure_proxy_main { |
| 46 | u-boot,dm-spl; |
| 47 | }; |
| 48 | |
| 49 | &dmsc { |
| 50 | u-boot,dm-spl; |
| 51 | k3_sysreset: sysreset-controller { |
| 52 | compatible = "ti,sci-sysreset"; |
| 53 | u-boot,dm-spl; |
| 54 | }; |
| 55 | }; |
| 56 | |
| 57 | &k3_pds { |
| 58 | u-boot,dm-spl; |
| 59 | }; |
| 60 | |
| 61 | &k3_clks { |
| 62 | u-boot,dm-spl; |
| 63 | }; |
| 64 | |
| 65 | &k3_reset { |
| 66 | u-boot,dm-spl; |
| 67 | }; |
| 68 | |
| 69 | &wkup_pmx0 { |
| 70 | u-boot,dm-spl; |
| 71 | }; |
| 72 | |
| 73 | &main_pmx0 { |
| 74 | u-boot,dm-spl; |
| 75 | }; |
| 76 | |
| 77 | &main_uart0 { |
| 78 | u-boot,dm-spl; |
| 79 | }; |
| 80 | |
| 81 | &mcu_uart0 { |
| 82 | u-boot,dm-spl; |
| 83 | }; |
| 84 | |
| 85 | &main_sdhci0 { |
| 86 | u-boot,dm-spl; |
| 87 | }; |
| 88 | |
| 89 | &main_sdhci1 { |
| 90 | u-boot,dm-spl; |
| 91 | }; |
| 92 | |
| 93 | &wkup_i2c0_pins_default { |
| 94 | u-boot,dm-spl; |
| 95 | }; |
| 96 | |
| 97 | &wkup_i2c0 { |
| 98 | u-boot,dm-spl; |
| 99 | }; |
| 100 | |
| 101 | &main_i2c0 { |
| 102 | u-boot,dm-spl; |
| 103 | }; |
| 104 | |
| 105 | &main_i2c0_pins_default { |
| 106 | u-boot,dm-spl; |
| 107 | }; |
| 108 | |
| 109 | &exp2 { |
| 110 | u-boot,dm-spl; |
| 111 | }; |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 112 | |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 113 | &mcu_cpsw { |
| 114 | reg = <0x0 0x46000000 0x0 0x200000>, |
| 115 | <0x0 0x40f00200 0x0 0x8>; |
| 116 | reg-names = "cpsw_nuss", "mac_efuse"; |
Vignesh Raghavendra | 68a44a7 | 2021-02-09 13:38:48 +0530 | [diff] [blame] | 117 | /delete-property/ ranges; |
Vignesh Raghavendra | f4ee7d5 | 2020-08-07 00:27:01 +0530 | [diff] [blame] | 118 | |
| 119 | cpsw-phy-sel@40f04040 { |
| 120 | compatible = "ti,am654-cpsw-phy-sel"; |
| 121 | reg= <0x0 0x40f04040 0x0 0x4>; |
| 122 | reg-names = "gmii-sel"; |
| 123 | }; |
| 124 | }; |
| 125 | |
Vignesh Raghavendra | 9bbc49f | 2020-08-07 00:26:56 +0530 | [diff] [blame] | 126 | &main_usbss0_pins_default { |
| 127 | u-boot,dm-spl; |
| 128 | }; |
| 129 | |
| 130 | &usbss0 { |
| 131 | u-boot,dm-spl; |
| 132 | ti,usb2-only; |
| 133 | }; |
| 134 | |
| 135 | &usb0 { |
| 136 | dr_mode = "peripheral"; |
| 137 | u-boot,dm-spl; |
| 138 | }; |
Vignesh Raghavendra | 962f95f | 2020-08-13 14:56:17 +0530 | [diff] [blame] | 139 | |
| 140 | &wkup_gpio_pins_default { |
| 141 | u-boot,dm-spl; |
| 142 | }; |
| 143 | |
Vignesh Raghavendra | 962f95f | 2020-08-13 14:56:17 +0530 | [diff] [blame] | 144 | &mcu_fss0_hpb0_pins_default { |
| 145 | u-boot,dm-spl; |
| 146 | }; |
| 147 | |
| 148 | &fss { |
| 149 | u-boot,dm-spl; |
| 150 | }; |
| 151 | |
| 152 | &hbmc { |
| 153 | u-boot,dm-spl; |
| 154 | |
| 155 | flash@0,0 { |
| 156 | u-boot,dm-spl; |
| 157 | }; |
| 158 | }; |
| 159 | |
| 160 | &hbmc_mux { |
| 161 | u-boot,dm-spl; |
| 162 | }; |