blob: 4972a7559f0ae266c98ac63c37e9d4659fb32c6c [file] [log] [blame]
Lokesh Vutlac8339702020-08-05 22:44:28 +05301// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6/ {
7 chosen {
8 stdout-path = "serial2:115200n8";
9 tick-timer = &timer1;
10 };
11
Vignesh Raghavendraf4ee7d52020-08-07 00:27:01 +053012 aliases {
13 ethernet0 = &cpsw_port1;
14 };
Lokesh Vutlac8339702020-08-05 22:44:28 +053015};
16
17&chipid {
18 u-boot,dm-spl;
19};
20
21&cbass_main {
22 u-boot,dm-spl;
23};
24
25&main_navss {
26 u-boot,dm-spl;
27};
28
29&cbass_mcu_wakeup {
30 u-boot,dm-spl;
31
32 timer1: timer@40400000 {
33 compatible = "ti,omap5430-timer";
34 reg = <0x0 0x40400000 0x0 0x80>;
35 ti,timer-alwon;
36 clock-frequency = <25000000>;
37 u-boot,dm-spl;
38 };
39};
40
41&secure_proxy_main {
42 u-boot,dm-spl;
43};
44
45&dmsc {
46 u-boot,dm-spl;
47 k3_sysreset: sysreset-controller {
48 compatible = "ti,sci-sysreset";
49 u-boot,dm-spl;
50 };
51};
52
53&k3_pds {
54 u-boot,dm-spl;
55};
56
57&k3_clks {
58 u-boot,dm-spl;
59};
60
61&k3_reset {
62 u-boot,dm-spl;
63};
64
65&wkup_pmx0 {
66 u-boot,dm-spl;
67};
68
69&main_pmx0 {
70 u-boot,dm-spl;
71};
72
73&main_uart0 {
74 u-boot,dm-spl;
75};
76
77&mcu_uart0 {
78 u-boot,dm-spl;
79};
80
81&main_sdhci0 {
82 u-boot,dm-spl;
83};
84
85&main_sdhci1 {
86 u-boot,dm-spl;
87};
88
89&wkup_i2c0_pins_default {
90 u-boot,dm-spl;
91};
92
93&wkup_i2c0 {
94 u-boot,dm-spl;
95};
96
97&main_i2c0 {
98 u-boot,dm-spl;
99};
100
101&main_i2c0_pins_default {
102 u-boot,dm-spl;
103};
104
105&exp2 {
106 u-boot,dm-spl;
107};
Vignesh Raghavendra9bbc49f2020-08-07 00:26:56 +0530108
Vignesh Raghavendraf4ee7d52020-08-07 00:27:01 +0530109&mcu_cpsw {
110 reg = <0x0 0x46000000 0x0 0x200000>,
111 <0x0 0x40f00200 0x0 0x8>;
112 reg-names = "cpsw_nuss", "mac_efuse";
113
114 cpsw-phy-sel@40f04040 {
115 compatible = "ti,am654-cpsw-phy-sel";
116 reg= <0x0 0x40f04040 0x0 0x4>;
117 reg-names = "gmii-sel";
118 };
119};
120
Vignesh Raghavendra9bbc49f2020-08-07 00:26:56 +0530121&main_usbss0_pins_default {
122 u-boot,dm-spl;
123};
124
125&usbss0 {
126 u-boot,dm-spl;
127 ti,usb2-only;
128};
129
130&usb0 {
131 dr_mode = "peripheral";
132 u-boot,dm-spl;
133};