Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Configuation settings for the Hitachi Solution Engine 7750 |
| 3 | * |
| 4 | * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 7 | */ |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 8 | |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 9 | #ifndef __MS7750SE_H |
| 10 | #define __MS7750SE_H |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 11 | |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 12 | #define CONFIG_CPU_SH7750 1 |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 13 | /* #define CONFIG_CPU_SH7751 1 */ |
| 14 | /* #define CONFIG_CPU_TYPE_R 1 */ |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 15 | #define __LITTLE_ENDIAN__ 1 |
| 16 | |
Vladimir Zapolskiy | 5e72b84 | 2016-11-28 00:15:30 +0200 | [diff] [blame] | 17 | #define CONFIG_DISPLAY_BOARDINFO |
| 18 | |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 19 | /* |
| 20 | * Command line configuration. |
| 21 | */ |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 22 | #define CONFIG_CONS_SCIF1 1 |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 23 | |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 24 | #define CONFIG_ENV_OVERWRITE 1 |
| 25 | |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 26 | /* SDRAM */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 27 | #define CONFIG_SYS_SDRAM_BASE (0x8C000000) |
| 28 | #define CONFIG_SYS_SDRAM_SIZE (64 * 1024 * 1024) |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 29 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 30 | #define CONFIG_SYS_LONGHELP |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 31 | #define CONFIG_SYS_PBSIZE 256 |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 32 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 33 | #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 34 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 35 | |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 36 | /* NOR Flash */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 37 | /* #define CONFIG_SYS_FLASH_BASE (0xA1000000)*/ |
| 38 | #define CONFIG_SYS_FLASH_BASE (0xA0000000) |
| 39 | #define CONFIG_SYS_MAX_FLASH_BANKS (1) /* Max number of |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 40 | * Flash memory banks |
| 41 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 42 | #define CONFIG_SYS_MAX_FLASH_SECT 142 |
| 43 | #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 44 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 45 | #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024) |
| 46 | #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) /* Address of u-boot image in Flash */ |
| 47 | #define CONFIG_SYS_MONITOR_LEN (128 * 1024) |
| 48 | #define CONFIG_SYS_MALLOC_LEN (256 * 1024) /* Size of DRAM reserved for malloc() use */ |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 49 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 50 | #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) |
| 51 | #define CONFIG_SYS_RX_ETH_BUFFER (8) |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 52 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 53 | #define CONFIG_SYS_FLASH_CFI |
Jean-Christophe PLAGNIOL-VILLARD | 8d94c23 | 2008-08-13 01:40:42 +0200 | [diff] [blame] | 54 | #define CONFIG_FLASH_CFI_DRIVER |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 55 | #undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE |
| 56 | #undef CONFIG_SYS_FLASH_QUIET_TEST |
| 57 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */ |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 58 | |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 59 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| 60 | #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 61 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
| 62 | #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 |
| 63 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 64 | |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 65 | /* Board Clock */ |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 66 | #define CONFIG_SYS_CLK_FREQ 33333333 |
Nobuhiro Iwamatsu | e698449 | 2013-08-21 16:11:21 +0900 | [diff] [blame] | 67 | #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ |
| 68 | #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ |
Jean-Christophe PLAGNIOL-VILLARD | 32e6acc | 2009-06-04 12:06:48 +0200 | [diff] [blame] | 69 | #define CONFIG_SYS_TMU_CLK_DIV 4 |
Nobuhiro Iwamatsu | 4525485 | 2007-05-13 21:01:03 +0900 | [diff] [blame] | 70 | |
Nobuhiro Iwamatsu | f252745 | 2007-09-23 02:19:24 +0900 | [diff] [blame] | 71 | #endif /* __MS7750SE_H */ |