Blame - include/configs/at91sam9x5ek.h - filogic/uboot

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Tom Rini	10e4779	2018-05-06 17:58:06 -0400	[diff] [blame]	1	/* SPDX-License-Identifier: GPL-2.0+ */
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	2	/*
				3	* Copyright (C) 2012 Atmel Corporation
				4	*
				5	* Configuation settings for the AT91SAM9X5EK board.
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	6	*/
				7
				8	#ifndef __CONFIG_H__
				9	#define __CONFIG_H__
				10
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	11	/* ARM asynchronous clock */
				12	#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
				13	#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	14
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	15	/* general purpose I/O */
				16	#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	17
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	18	/*
				19	* BOOTP options
				20	*/
				21	#define CONFIG_BOOTP_BOOTFILESIZE
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	22
				23	/*
Tom Rini	ceed5d2	2017-05-12 22:33:27 -0400	[diff] [blame]	24	* define CONFIG_USB_EHCI_HCD to enable USB Hi-Speed (aka 2.0)
Richard Genoud	1e34e83	2012-11-29 23:18:34 +0000	[diff] [blame]	25	* NB: in this case, USB 1.1 devices won't be recognized.
				26	*/
				27
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	28	/* SDRAM */
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	29	#define CONFIG_SYS_SDRAM_BASE 0x20000000
				30	#define CONFIG_SYS_SDRAM_SIZE 0x08000000 /* 128 megs */
				31
				32	#define CONFIG_SYS_INIT_SP_ADDR \
Wenyou Yang	f345e28	2017-04-18 14:51:54 +0800	[diff] [blame]	33	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	34
				35	/* DataFlash */
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	36
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	37	/* NAND flash */
				38	#ifdef CONFIG_CMD_NAND
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	39	#define CONFIG_SYS_MAX_NAND_DEVICE 1
				40	#define CONFIG_SYS_NAND_BASE 0x40000000
				41	#define CONFIG_SYS_NAND_DBW_8 1
				42	/* our ALE is AD21 */
				43	#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
				44	/* our CLE is AD22 */
				45	#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
				46	#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD4
				47	#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PD5
Tom Rini	00448d2	2017-07-28 21:31:42 -0400	[diff] [blame]	48	#endif
				49
Richard Genoud	1e34e83	2012-11-29 23:18:34 +0000	[diff] [blame]	50	/* USB */
				51	#ifdef CONFIG_CMD_USB
Tom Rini	ceed5d2	2017-05-12 22:33:27 -0400	[diff] [blame]	52	#ifndef CONFIG_USB_EHCI_HCD
Bo Shen	4a985df	2013-10-21 16:14:00 +0800	[diff] [blame]	53	#define CONFIG_USB_ATMEL
				54	#define CONFIG_USB_ATMEL_CLK_SEL_UPLL
Richard Genoud	1e34e83	2012-11-29 23:18:34 +0000	[diff] [blame]	55	#define CONFIG_USB_OHCI_NEW
				56	#define CONFIG_SYS_USB_OHCI_CPU_INIT
				57	#define CONFIG_SYS_USB_OHCI_REGS_BASE ATMEL_BASE_OHCI
				58	#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9x5"
				59	#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 3
				60	#endif
Richard Genoud	1e34e83	2012-11-29 23:18:34 +0000	[diff] [blame]	61	#endif
				62
Wenyou Yang	e035ea7	2017-09-14 11:07:44 +0800	[diff] [blame]	63	#ifdef CONFIG_NAND_BOOT
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	64	/* bootstrap + u-boot + env + linux in nandflash */
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	65	#define CONFIG_BOOTCOMMAND "nand read " \
Eugen.Hristev@microchip.com	dc9a493	2018-10-23 07:41:33 +0000	[diff] [blame]	66	"0x22000000 0x200000 0x600000; " \
				67	"nand read 0x21000000 0x180000 0x20000; " \
				68	"bootz 0x22000000 - 0x21000000"
Wenyou Yang	e035ea7	2017-09-14 11:07:44 +0800	[diff] [blame]	69	#elif defined(CONFIG_SPI_BOOT)
Bo Shen	4a73e58	2012-08-19 20:32:24 +0000	[diff] [blame]	70	/* bootstrap + u-boot + env + linux in spi flash */
Bo Shen	4a73e58	2012-08-19 20:32:24 +0000	[diff] [blame]	71	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
				72	"sf read 0x22000000 0x100000 0x300000; " \
				73	"bootm 0x22000000"
Bo Shen	0a9f8ac	2012-12-06 21:37:04 +0000	[diff] [blame]	74	#elif defined(CONFIG_SYS_USE_DATAFLASH)
				75	/* bootstrap + u-boot + env + linux in data flash */
Bo Shen	0a9f8ac	2012-12-06 21:37:04 +0000	[diff] [blame]	76	#define CONFIG_BOOTCOMMAND "sf probe 0; " \
				77	"sf read 0x22000000 0x84000 0x294000; " \
				78	"bootm 0x22000000"
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	79	#endif
				80
Bo Shen	9a3b1fe	2015-03-27 14:23:35 +0800	[diff] [blame]	81	/* SPL */
Bo Shen	9a3b1fe	2015-03-27 14:23:35 +0800	[diff] [blame]	82	#define CONFIG_SPL_MAX_SIZE 0x6000
				83	#define CONFIG_SPL_STACK 0x308000
				84
				85	#define CONFIG_SPL_BSS_START_ADDR 0x20000000
				86	#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
				87	#define CONFIG_SYS_SPL_MALLOC_START 0x20080000
				88	#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
				89
Bo Shen	9a3b1fe	2015-03-27 14:23:35 +0800	[diff] [blame]	90	#define CONFIG_SYS_MONITOR_LEN (512 << 10)
				91
				92	#define CONFIG_SYS_MASTER_CLOCK 132096000
				93	#define CONFIG_SYS_AT91_PLLA 0x20c73f03
				94	#define CONFIG_SYS_MCKR 0x1301
				95	#define CONFIG_SYS_MCKR_CSS 0x1302
				96
Wenyou Yang	e035ea7	2017-09-14 11:07:44 +0800	[diff] [blame]	97	#ifdef CONFIG_SD_BOOT
Bo Shen	9a3b1fe	2015-03-27 14:23:35 +0800	[diff] [blame]	98	#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Wenyou Yang	e035ea7	2017-09-14 11:07:44 +0800	[diff] [blame]	99	#endif
Bo Shen	9a3b1fe	2015-03-27 14:23:35 +0800	[diff] [blame]	100
Bo Shen	42aafb3	2012-07-05 17:21:46 +0000	[diff] [blame]	101	#endif