| Martyn Welch | 0a14bac | 2018-12-11 11:34:46 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Collabora Ltd. |
| 4 | * |
| 5 | * Based on include/configs/xpress.h: |
| 6 | * Copyright (C) 2015-2016 Stefan Roese <sr@denx.de> |
| 7 | */ |
| 8 | #ifndef __PCL063_H |
| 9 | #define __PCL063_H |
| 10 | |
| 11 | #include <linux/sizes.h> |
| 12 | #include "mx6_common.h" |
| 13 | |
| 14 | /* SPL options */ |
| 15 | #include "imx6_spl.h" |
| 16 | |
| 17 | /* |
| 18 | * There is a bug in some i.MX6UL processors that results in the initial |
| 19 | * portion of OCRAM being unavailable when booting from (at least) an SD |
| 20 | * card. |
| 21 | * |
| 22 | * Tweak the SPL text base address to avoid this. |
| 23 | */ |
| 24 | #undef CONFIG_SPL_TEXT_BASE |
| 25 | #define CONFIG_SPL_TEXT_BASE 0x00909000 |
| 26 | |
| 27 | /* Size of malloc() pool */ |
| 28 | #define CONFIG_SYS_MALLOC_LEN (16 * SZ_1M) |
| 29 | |
| 30 | /* Console configs */ |
| 31 | #define CONFIG_MXC_UART_BASE UART1_BASE |
| 32 | |
| 33 | /* MMC Configs */ |
| 34 | #define CONFIG_FSL_USDHC |
| 35 | |
| 36 | #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR |
| 37 | |
| 38 | /* Miscellaneous configurable options */ |
| 39 | #define CONFIG_SYS_MEMTEST_START 0x80000000 |
| 40 | #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x10000000) |
| 41 | |
| 42 | #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| 43 | #define CONFIG_SYS_HZ 1000 |
| 44 | |
| 45 | /* Physical Memory Map */ |
| 46 | #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR |
| 47 | #define PHYS_SDRAM_SIZE SZ_256M |
| 48 | |
| 49 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM |
| 50 | #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR |
| 51 | #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE |
| 52 | |
| 53 | #define CONFIG_SYS_INIT_SP_OFFSET \ |
| 54 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| 55 | #define CONFIG_SYS_INIT_SP_ADDR \ |
| 56 | (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| 57 | |
| 58 | #define CONFIG_ENV_SIZE (16 << 10) |
| 59 | #define CONFIG_ENV_OFFSET (512 << 10) |
| 60 | |
| 61 | /* NAND */ |
| 62 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
| 63 | #define CONFIG_SYS_NAND_BASE 0x40000000 |
| 64 | |
| 65 | /* USB Configs */ |
| 66 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 67 | #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| 68 | #define CONFIG_MXC_USB_FLAGS 0 |
| 69 | #define CONFIG_USB_MAX_CONTROLLER_COUNT 1 |
| 70 | |
| 71 | #define CONFIG_IMX_THERMAL |
| 72 | |
| 73 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 74 | "console=ttymxc0,115200n8\0" \ |
| 75 | "mtdids=" CONFIG_MTDIDS_DEFAULT "\0" \ |
| 76 | "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \ |
| 77 | "fdt_addr_r=0x82000000\0" \ |
| 78 | "fdt_high=0xffffffff\0" \ |
| 79 | "initrd_high=0xffffffff\0" \ |
| 80 | "kernel_addr_r=0x81000000\0" \ |
| 81 | "pxefile_addr_r=0x87100000\0" \ |
| 82 | "ramdisk_addr_r=0x82100000\0" \ |
| 83 | "scriptaddr=0x87000000\0" \ |
| 84 | BOOTENV |
| 85 | |
| 86 | #define BOOT_TARGET_DEVICES(func) \ |
| 87 | func(MMC, mmc, 0) \ |
| 88 | func(UBIFS, ubifs, 0) \ |
| 89 | func(PXE, pxe, na) \ |
| 90 | func(DHCP, dhcp, na) |
| 91 | |
| 92 | #include <config_distro_bootcmd.h> |
| 93 | |
| 94 | #endif /* __PCL063_H */ |