Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: GPL-2.0 |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/spi/spi-pl022.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: ARM PL022 SPI controller |
| 8 | |
| 9 | maintainers: |
| 10 | - Linus Walleij <linus.walleij@linaro.org> |
| 11 | |
| 12 | allOf: |
| 13 | - $ref: spi-controller.yaml# |
| 14 | - $ref: /schemas/arm/primecell.yaml# |
| 15 | |
| 16 | # We need a select here so we don't match all nodes with 'arm,primecell' |
| 17 | select: |
| 18 | properties: |
| 19 | compatible: |
| 20 | contains: |
| 21 | const: arm,pl022 |
| 22 | required: |
| 23 | - compatible |
| 24 | |
| 25 | properties: |
| 26 | compatible: |
| 27 | items: |
| 28 | - const: arm,pl022 |
| 29 | - const: arm,primecell |
| 30 | |
| 31 | reg: |
| 32 | maxItems: 1 |
| 33 | |
| 34 | interrupts: |
| 35 | maxItems: 1 |
| 36 | |
| 37 | clocks: |
| 38 | maxItems: 2 |
| 39 | |
| 40 | clock-names: |
| 41 | items: |
| 42 | - const: sspclk |
| 43 | - const: apb_pclk |
| 44 | |
| 45 | pl022,autosuspend-delay: |
| 46 | description: delay in ms following transfer completion before the |
| 47 | runtime power management system suspends the device. A setting of 0 |
| 48 | indicates no delay and the device will be suspended immediately. |
| 49 | $ref: /schemas/types.yaml#/definitions/uint32 |
| 50 | |
| 51 | pl022,rt: |
| 52 | description: indicates the controller should run the message pump with realtime |
| 53 | priority to minimise the transfer latency on the bus (boolean) |
| 54 | type: boolean |
| 55 | |
| 56 | dmas: |
| 57 | description: |
| 58 | Two or more DMA channel specifiers following the convention outlined |
| 59 | in bindings/dma/dma.txt |
| 60 | minItems: 2 |
| 61 | maxItems: 32 |
| 62 | |
| 63 | dma-names: |
| 64 | description: |
| 65 | There must be at least one channel named "tx" for transmit and named "rx" |
| 66 | for receive. |
| 67 | minItems: 2 |
| 68 | maxItems: 32 |
| 69 | additionalItems: true |
| 70 | items: |
| 71 | - const: rx |
| 72 | - const: tx |
| 73 | |
| 74 | resets: |
| 75 | maxItems: 1 |
| 76 | |
| 77 | required: |
| 78 | - compatible |
| 79 | - reg |
| 80 | - interrupts |
| 81 | |
| 82 | unevaluatedProperties: false |
| 83 | |
| 84 | examples: |
| 85 | - | |
| 86 | spi@e0100000 { |
| 87 | compatible = "arm,pl022", "arm,primecell"; |
| 88 | reg = <0xe0100000 0x1000>; |
| 89 | #address-cells = <1>; |
| 90 | #size-cells = <0>; |
| 91 | interrupts = <0 31 0x4>; |
| 92 | dmas = <&dma_controller 23 1>, |
| 93 | <&dma_controller 24 0>; |
| 94 | dma-names = "rx", "tx"; |
| 95 | |
| 96 | flash@1 { |
| 97 | compatible = "st,m25p80"; |
| 98 | reg = <1>; |
| 99 | spi-max-frequency = <12000000>; |
| 100 | spi-cpol; |
| 101 | spi-cpha; |
| 102 | pl022,interface = <0>; |
| 103 | pl022,com-mode = <0x2>; |
| 104 | pl022,rx-level-trig = <0>; |
| 105 | pl022,tx-level-trig = <0>; |
| 106 | pl022,ctrl-len = <0x11>; |
| 107 | pl022,wait-state = <0>; |
| 108 | pl022,duplex = <0>; |
| 109 | }; |
| 110 | }; |
| 111 | ... |