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git01.mediatek.com / filogic / uboot / 20e6341bd1734af255a234c0c8ce72d5cb034511 / . / arch / arm / dts / rk3399-u-boot.dtsi
blob: 4298552dd9993a370ef56feda9ca0f4984c0f7e7 [file] [log] [blame]
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright (C) 2019 Jagan Teki <jagan@amarulasolutions.com>
4 */
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]5#define USB_CLASS_HUB 9
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]6
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]7#include "rockchip-u-boot.dtsi"
8
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]9/ {
10 aliases {
11 mmc0 = &sdhci;
12 mmc1 = &sdmmc;
Jagan Teki77c31a82020-05-09 22:26:23 +0530[diff] [blame]13 pci0 = &pcie0;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]14 spi1 = &spi1;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]15 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]16
Jonas Karlman747c9572024-04-30 15:30:18 +0000[diff] [blame]17 chosen {
18 u-boot,spl-boot-order = "same-as-spl", &sdhci, &sdmmc;
19 };
20
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]21 pmusgrf: syscon@ff330000 {
22 compatible = "rockchip,rk3399-pmusgrf", "syscon";
23 reg = <0x0 0xff330000 0x0 0xe3d4>;
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]24 bootph-all;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]25 };
26
27 cic: syscon@ff620000 {
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]28 compatible = "rockchip,rk3399-cic", "syscon";
29 reg = <0x0 0xff620000 0x0 0x100>;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]30 bootph-all;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]31 };
32
33 dfi: dfi@ff630000 {
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]34 reg = <0x00 0xff630000 0x00 0x4000>;
35 compatible = "rockchip,rk3399-dfi";
36 rockchip,pmu = <&pmugrf>;
37 clocks = <&cru PCLK_DDR_MON>;
38 clock-names = "pclk_ddr_mon";
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]39 bootph-all;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]40 };
41
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]42 rng: rng@ff8b8000 {
Jonas Karlman64ba61f2024-02-17 00:22:36 +0000[diff] [blame]43 compatible = "rockchip,rk3399-crypto";
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]44 reg = <0x0 0xff8b8000 0x0 0x1000>;
Lin Jinhan3e714cf2020-03-31 17:39:57 +0800[diff] [blame]45 };
46
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]47 dmc: dmc {
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]48 compatible = "rockchip,rk3399-dmc";
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]49 reg = <0x0 0xffa80000 0x0 0x0800
50 0x0 0xffa80800 0x0 0x1800
51 0x0 0xffa82000 0x0 0x2000
52 0x0 0xffa84000 0x0 0x1000
53 0x0 0xffa88000 0x0 0x0800
54 0x0 0xffa88800 0x0 0x1800
55 0x0 0xffa8a000 0x0 0x2000
56 0x0 0xffa8c000 0x0 0x1000>;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]57 devfreq-events = <&dfi>;
58 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 0>;
59 clocks = <&cru SCLK_DDRCLK>;
60 clock-names = "dmc_clk";
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]61 bootph-all;
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]62 };
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]63};
64
Quentin Schulz12df9cf2022-09-02 15:10:54 +0200[diff] [blame]65#if defined(CONFIG_ROCKCHIP_SPI_IMAGE) && defined(CONFIG_HAS_ROM)
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]66&binman {
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]67 multiple-images;
Simon Glass8251e032020-07-19 13:55:58 -0600[diff] [blame]68 rom {
69 filename = "u-boot.rom";
70 size = <0x400000>;
71 pad-byte = <0xff>;
72
73 mkimage {
74 args = "-n rk3399 -T rkspi";
75 u-boot-spl {
76 };
77 };
78 u-boot-img {
79 offset = <0x40000>;
80 };
81 u-boot {
82 offset = <0x300000>;
83 };
84 fdtmap {
85 };
86 };
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]87};
Simon Glassf1268222023-01-07 14:07:17 -0700[diff] [blame]88#endif /* CONFIG_ROCKCHIP_SPI_IMAGE && CONFIG_HAS_ROM */
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]89
Peter Robinson94fb4c42020-01-20 09:17:00 +0000[diff] [blame]90&cru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]91 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]92};
93
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]94&emmc_phy {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]95 bootph-pre-ram;
96 bootph-some-ram;
Yifeng Zhaod7e4c322021-11-01 12:43:47 +0800[diff] [blame]97};
98
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]99&grf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]100 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]101};
102
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]103&pcfg_pull_none {
104 bootph-all;
105};
106
107&pcfg_pull_up {
108 bootph-all;
109};
110
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]111&pinctrl {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]112 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]113};
114
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]115&pmu {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]116 bootph-all;
Jagan Teki9b545852019-07-16 17:27:34 +0530[diff] [blame]117};
118
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]119&pmucru {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]120 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]121};
122
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]123&pmugrf {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]124 bootph-all;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]125};
126
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]127&sdhci {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]128 bootph-pre-ram;
129 bootph-some-ram;
Jonas Karlman47f7e5f2024-04-30 15:30:20 +0000[diff] [blame]130 max-frequency = <200000000>;
131
132 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
Jonas Karlmanf79c5372023-05-06 17:41:11 +0000[diff] [blame]133 u-boot,spl-fifo-mode;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]134};
135
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]136&sdmmc {
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]137 bootph-pre-ram;
138 bootph-some-ram;
Deepak Das4ef2ded2020-04-15 08:55:24 +0530[diff] [blame]139
140 /* mmc to sram can't do dma, prevent aborts transferring TF-A parts */
141 u-boot,spl-fifo-mode;
Jagan Teki208badd2019-03-11 13:50:03 +0530[diff] [blame]142};
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]143
Jonas Karlman6a6b4f52024-04-30 15:30:24 +0000[diff] [blame]144&sdmmc_bus4 {
145 bootph-pre-ram;
146 bootph-some-ram;
147};
148
149&sdmmc_cd {
150 bootph-pre-ram;
151 bootph-some-ram;
152};
153
154&sdmmc_clk {
155 bootph-pre-ram;
156 bootph-some-ram;
157};
158
159&sdmmc_cmd {
160 bootph-pre-ram;
161 bootph-some-ram;
162};
163
164&spi1_clk {
165 bootph-pre-ram;
166 bootph-some-ram;
167};
168
169&spi1_cs0 {
170 bootph-pre-ram;
171 bootph-some-ram;
172};
173
174&spi1_rx {
175 bootph-pre-ram;
176 bootph-some-ram;
177};
178
179&spi1_tx {
180 bootph-pre-ram;
181 bootph-some-ram;
Jagan Teki60c5fed2019-05-07 23:51:51 +0530[diff] [blame]182};
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]183
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]184&uart2 {
Simon Glassd3a98cb2023-02-13 08:56:33 -0700[diff] [blame]185 bootph-all;
Jonas Karlmanfab0bd32024-04-30 15:30:23 +0000[diff] [blame]186 clock-frequency = <24000000>;
187};
188
189&uart2c_xfer {
190 bootph-pre-sram;
191 bootph-pre-ram;
Jagan Teki2ff51fd2019-06-21 00:25:02 +0530[diff] [blame]192};
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]193
194&vopb {
Jonas Karlman98519912024-04-30 15:30:21 +0000[diff] [blame]195 bootph-some-ram;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]196};
197
198&vopl {
Jonas Karlman98519912024-04-30 15:30:21 +0000[diff] [blame]199 bootph-some-ram;
Peter Robinsondd44a152019-11-09 20:30:05 +0000[diff] [blame]200};