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Eugen Hristev32f36cf2023-02-22 11:05:12 +02001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Collabora Ltd.
4 */
5
6#include "rk3588-u-boot.dtsi"
Eugen Hristeva856b1a2023-05-15 12:59:45 +03007#include <dt-bindings/pinctrl/rockchip.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/gpio/gpio.h>
Eugen Hristev41bbad82023-05-29 13:01:35 +030010#include <dt-bindings/usb/pd.h>
Eugen Hristev32f36cf2023-02-22 11:05:12 +020011
12/ {
Eugen Hristev32f36cf2023-02-22 11:05:12 +020013 chosen {
Jonas Karlmanced8be02023-04-18 16:46:41 +000014 u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
Eugen Hristev32f36cf2023-02-22 11:05:12 +020015 };
Eugen Hristeva856b1a2023-05-15 12:59:45 +030016
Eugen Hristev41bbad82023-05-29 13:01:35 +030017 vcc12v_dcin: vcc12v-dcin-regulator {
18 compatible = "regulator-fixed";
19 regulator-name = "vcc12v_dcin";
20 regulator-always-on;
21 regulator-boot-on;
22 regulator-min-microvolt = <12000000>;
23 regulator-max-microvolt = <12000000>;
24 };
25
FUKAUMI Naoki6f396aa2023-09-05 20:47:36 +090026 vcc3v3_pcie30: vcc3v3-pcie30-regulator {
27 compatible = "regulator-fixed";
28 regulator-name = "vcc3v3_pcie30";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
31 enable-active-high;
32 gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
33 startup-delay-us = <5000>;
34 vin-supply = <&vcc5v0_sys>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&pcie3_vcc3v3_en>;
37 };
38
Eugen Hristev41bbad82023-05-29 13:01:35 +030039 vcc5v0_usbdcin: vcc5v0-usbdcin {
40 compatible = "regulator-fixed";
41 regulator-name = "vcc5v0_usbdcin";
42 regulator-always-on;
43 regulator-boot-on;
44 regulator-min-microvolt = <5000000>;
45 regulator-max-microvolt = <5000000>;
46 vin-supply = <&vcc12v_dcin>;
47 };
48
Eugen Hristev41bbad82023-05-29 13:01:35 +030049 vcc5v0_usb: vcc5v0-usb {
50 compatible = "regulator-fixed";
51 regulator-name = "vcc5v0_usb";
52 regulator-always-on;
53 regulator-boot-on;
54 regulator-min-microvolt = <5000000>;
55 regulator-max-microvolt = <5000000>;
56 vin-supply = <&vcc5v0_usbdcin>;
57 };
58
59 vbus5v0_typec: vbus5v0-typec {
60 compatible = "regulator-fixed";
61 regulator-name = "vbus5v0_typec";
62 regulator-min-microvolt = <5000000>;
63 regulator-max-microvolt = <5000000>;
64 enable-active-high;
65 gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>;
66 vin-supply = <&vcc5v0_usb>;
67 pinctrl-names = "default";
68 pinctrl-0 = <&typec5v_pwren>;
69 };
Eugen Hristeva856b1a2023-05-15 12:59:45 +030070};
71
Christopher Obbard6abdb9c2023-05-17 13:01:01 +030072&combphy0_ps {
73 status = "okay";
74};
75
Jonas Karlmanadb78942023-05-18 15:39:30 +000076&fspim2_pins {
77 bootph-all;
78};
79
Christopher Obbard6abdb9c2023-05-17 13:01:01 +030080&pcie2x1l2 {
81 pinctrl-names = "default";
82 pinctrl-0 = <&pcie2x1l2_pins &pcie_reset_h>;
83 reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
84 status = "okay";
85};
86
FUKAUMI Naoki6f396aa2023-09-05 20:47:36 +090087&pcie30phy {
88 status = "okay";
89};
90
91&pcie3x4 {
92 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
93 vpcie3v3-supply = <&vcc3v3_pcie30>;
94 pinctrl-names = "default";
95 pinctrl-0 = <&pcie3_rst>;
96 status = "okay";
97};
98
Eugen Hristeva856b1a2023-05-15 12:59:45 +030099&pinctrl {
Christopher Obbard6abdb9c2023-05-17 13:01:01 +0300100 pcie {
101 pcie_reset_h: pcie-reset-h {
102 rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
103 };
104
105 pcie2x1l2_pins: pcie2x1l2-pins {
106 rockchip,pins = <3 RK_PC7 4 &pcfg_pull_none>,
107 <3 RK_PD0 4 &pcfg_pull_none>;
108 };
FUKAUMI Naoki6f396aa2023-09-05 20:47:36 +0900109
110 pcie3_rst: pcie3-rst {
111 rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
112 };
113
114 pcie3_vcc3v3_en: pcie3-vcc3v3-en {
115 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
116 };
Christopher Obbard6abdb9c2023-05-17 13:01:01 +0300117 };
118
Eugen Hristev41bbad82023-05-29 13:01:35 +0300119 usb-typec {
120 usbc0_int: usbc0-int {
121 rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
122 };
123
124 typec5v_pwren: typec5v-pwren {
125 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
126 };
127 };
Eugen Hristev32f36cf2023-02-22 11:05:12 +0200128};
129
Jonas Karlmanced8be02023-04-18 16:46:41 +0000130&sdhci {
131 cap-mmc-highspeed;
132 mmc-ddr-1_8v;
133 mmc-hs200-1_8v;
Jonas Karlmanced8be02023-04-18 16:46:41 +0000134};
Eugen Hristeva856b1a2023-05-15 12:59:45 +0300135
Jonas Karlmanadb78942023-05-18 15:39:30 +0000136&sfc {
137 bootph-pre-ram;
138 u-boot,spl-sfc-no-dma;
139 pinctrl-names = "default";
140 pinctrl-0 = <&fspim2_pins>;
141 #address-cells = <1>;
142 #size-cells = <0>;
143 status = "okay";
144
145 flash@0 {
146 bootph-pre-ram;
147 compatible = "jedec,spi-nor";
148 reg = <0>;
149 spi-max-frequency = <24000000>;
150 spi-rx-bus-width = <4>;
151 spi-tx-bus-width = <1>;
152 };
153};
154
Eugen Hristev41bbad82023-05-29 13:01:35 +0300155&u2phy0 {
156 status = "okay";
157};
158
159&u2phy0_otg {
160 rockchip,typec-vbus-det;
161 status = "okay";
162};
163
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900164&u2phy1 {
Eugen Hristeva856b1a2023-05-15 12:59:45 +0300165 status = "okay";
166};
167
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900168&u2phy1_otg {
Eugen Hristeva856b1a2023-05-15 12:59:45 +0300169 status = "okay";
170};
171
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900172&usb2phy2_grf {
Eugen Hristeva856b1a2023-05-15 12:59:45 +0300173 status = "okay";
174};
175
176&usb2phy3_grf {
177 status = "okay";
178};
179
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900180&usb_host0_ehci {
181 companion = <&usb_host0_ohci>;
Eugen Hristeva856b1a2023-05-15 12:59:45 +0300182};
183
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900184&usb_host1_ehci {
185 companion = <&usb_host1_ohci>;
Eugen Hristeva856b1a2023-05-15 12:59:45 +0300186};
187
Eugen Hristev41bbad82023-05-29 13:01:35 +0300188&usbdp_phy0 {
189 orientation-switch;
190 svid = <0xff01>;
191 sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
192 sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
193 status = "okay";
194
195 port {
196 #address-cells = <1>;
197 #size-cells = <0>;
198 usbdp_phy0_orientation_switch: endpoint@0 {
199 reg = <0>;
200 remote-endpoint = <&usbc0_orien_sw>;
201 };
202
203 usbdp_phy0_dp_altmode_mux: endpoint@1 {
204 reg = <1>;
205 remote-endpoint = <&dp_altmode_mux>;
206 };
207 };
208};
209
210&usbdp_phy0_u3 {
211 status = "okay";
212};
213
Eugen Hristev41bbad82023-05-29 13:01:35 +0300214&usbdp_phy1 {
215 rockchip,dp-lane-mux = <2 3>;
216 status = "okay";
217};
218
219&usbdp_phy1_u3 {
220 status = "okay";
221};
222
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900223&usbdrd3_0 {
Eugen Hristev41bbad82023-05-29 13:01:35 +0300224 status = "okay";
225};
226
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900227&usbdrd3_1 {
Eugen Hristev41bbad82023-05-29 13:01:35 +0300228 status = "okay";
229};
230
FUKAUMI Naoki61315172023-09-05 20:47:35 +0900231&usbdrd_dwc3_0 {
232 usb-role-switch;
233
234 port {
235 #address-cells = <1>;
236 #size-cells = <0>;
237 dwc3_0_role_switch: endpoint@0 {
238 reg = <0>;
239 remote-endpoint = <&usbc0_role_sw>;
240 };
241 };
Eugen Hristev41bbad82023-05-29 13:01:35 +0300242};
243
244&i2c4 {
245 pinctrl-0 = <&i2c4m1_xfer>;
246 status = "okay";
247
248 usbc0: fusb302@22 {
249 compatible = "fcs,fusb302";
250 reg = <0x22>;
251 interrupt-parent = <&gpio3>;
252 interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
253 pinctrl-names = "default";
254 pinctrl-0 = <&usbc0_int>;
255 vbus-supply = <&vbus5v0_typec>;
256 status = "okay";
257
258 ports {
259 #address-cells = <1>;
260 #size-cells = <0>;
261
262 port@0 {
263 reg = <0>;
264 usbc0_role_sw: endpoint@0 {
265 remote-endpoint = <&dwc3_0_role_switch>;
266 };
267 };
268 };
269
270 usb_con: connector {
271 compatible = "usb-c-connector";
272 label = "USB-C";
273 data-role = "dual";
274 power-role = "dual";
275 try-power-role = "sink";
276 op-sink-microwatt = <1000000>;
277 sink-pdos =
278 <PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
279 source-pdos =
280 <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
281
282 altmodes {
283 #address-cells = <1>;
284 #size-cells = <0>;
285
286 altmode@0 {
287 reg = <0>;
288 svid = <0xff01>;
289 vdo = <0xffffffff>;
290 };
291 };
292
293 ports {
294 #address-cells = <1>;
295 #size-cells = <0>;
296
297 port@0 {
298 reg = <0>;
299 usbc0_orien_sw: endpoint {
300 remote-endpoint = <&usbdp_phy0_orientation_switch>;
301 };
302 };
303
304 port@1 {
305 reg = <1>;
306 dp_altmode_mux: endpoint {
307 remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
308 };
309 };
310 };
311 };
312 };
313};