| commit | 6abdb9cf9d04894068eae275836e73a2f11caacf | [log] [tgz] |
|---|---|---|
| author | Christopher Obbard <chris.obbard@collabora.com> | Wed May 17 13:01:01 2023 +0300 |
| committer | Kever Yang <kever.yang@rock-chips.com> | Thu May 18 08:44:04 2023 +0800 |
| tree | 2a08b5da236dcfc91b89ad4a67c7998f47cc138e | |
| parent | 8444550fa9014ad3e71baa61c6ffa6f4ab6f5e18 [diff] |
ARM: dts: rockchip: rock5b: enable pcie2x1l2 and associated combphy Enable the PCIe 2x1l 2 device and associated combphy. On this bus, the Rock5B has an Ethernet transceiver connected. Signed-off-by: Christopher Obbard <chris.obbard@collabora.com> [eugen.hristev@collabora.com: minor tweaks] Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com> [jonas@kwiboo.se: add PCIe pins] Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>