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Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +09001/*
2 * Configuation settings for the Renesas Solutions ECOVEC board
3 *
4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
7 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02008 * SPDX-License-Identifier: GPL-2.0+
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +09009 */
10
11#ifndef __ECOVEC_H
12#define __ECOVEC_H
13
14/*
15 * Address Interface BusWidth
16 *-----------------------------------------
17 * 0x0000_0000 U-Boot 16bit
18 * 0x0004_0000 Linux romImage 16bit
19 * 0x0014_0000 MTD for Linux 16bit
20 * 0x0400_0000 Internal I/O 16/32bit
21 * 0x0800_0000 DRAM 32bit
22 * 0x1800_0000 MFI 16bit
23 */
24
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090025#define CONFIG_CPU_SH7724 1
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090026#define CONFIG_ECOVEC 1
27
28#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
29#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
30
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090031#define CONFIG_CMD_SDRAM
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090032
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090033#define CONFIG_BOOTARGS "console=ttySC0,115200"
34
Vladimir Zapolskiy5e72b842016-11-28 00:15:30 +020035#define CONFIG_DISPLAY_BOARDINFO
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090036#undef CONFIG_SHOW_BOOT_PROGRESS
37
38/* I2C */
Nobuhiro Iwamatsu12240102013-10-29 13:33:51 +090039#define CONFIG_SYS_I2C
40#define CONFIG_SYS_I2C_SH
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090041#define CONFIG_SYS_I2C_SLAVE 0x7F
Nobuhiro Iwamatsu12240102013-10-29 13:33:51 +090042#define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
43#define CONFIG_SYS_I2C_SH_BASE0 0xA4470000
44#define CONFIG_SYS_I2C_SH_SPEED0 100000
45#define CONFIG_SYS_I2C_SH_BASE1 0xA4750000
46#define CONFIG_SYS_I2C_SH_SPEED1 100000
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090047#define CONFIG_SH_I2C_DATA_HIGH 4
48#define CONFIG_SH_I2C_DATA_LOW 5
49#define CONFIG_SH_I2C_CLOCK 41666666
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090050
51/* Ether */
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090052#define CONFIG_SH_ETHER 1
53#define CONFIG_SH_ETHER_USE_PORT (0)
54#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
Nobuhiro Iwamatsu3bb12e82011-12-01 18:48:38 +000055#define CONFIG_PHY_SMSC 1
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090056#define CONFIG_PHYLIB
57#define CONFIG_BITBANGMII
58#define CONFIG_BITBANGMII_MULTI
Nobuhiro Iwamatsu32f900e2012-05-16 10:23:21 +090059#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090060
61/* USB / R8A66597 */
62#define CONFIG_USB_R8A66597_HCD
63#define CONFIG_R8A66597_BASE_ADDR 0xA4D80000
64#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */
65#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */
66#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */
67#define CONFIG_SUPERH_ON_CHIP_R8A66597
68
69/* undef to save memory */
70#define CONFIG_SYS_LONGHELP
71/* Monitor Command Prompt */
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090072/* Buffer size for input from the Console */
73#define CONFIG_SYS_CBSIZE 256
74/* Buffer size for Console output */
75#define CONFIG_SYS_PBSIZE 256
76/* max args accepted for monitor commands */
77#define CONFIG_SYS_MAXARGS 16
78/* Buffer size for Boot Arguments passed to kernel */
79#define CONFIG_SYS_BARGSIZE 512
80/* List of legal baudrate settings for this board */
81#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
82
83/* SCIF */
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090084#define CONFIG_SCIF 1
85#define CONFIG_CONS_SCIF0 1
86
87/* Suppress display of console information at boot */
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +090088
89/* SDRAM */
90#define CONFIG_SYS_SDRAM_BASE (0x88000000)
91#define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024)
92#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
93
94#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
95#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
96/* Enable alternate, more extensive, memory test */
97#undef CONFIG_SYS_ALT_MEMTEST
98/* Scratch address used by the alternate memory test */
99#undef CONFIG_SYS_MEMTEST_SCRATCH
100
101/* Enable temporary baudrate change while serial download */
102#undef CONFIG_SYS_LOADS_BAUD_CHANGE
103
104/* FLASH */
105#define CONFIG_FLASH_CFI_DRIVER 1
106#define CONFIG_SYS_FLASH_CFI
107#undef CONFIG_SYS_FLASH_QUIET_TEST
108#define CONFIG_SYS_FLASH_EMPTY_INFO
109#define CONFIG_SYS_FLASH_BASE (0xA0000000)
110#define CONFIG_SYS_MAX_FLASH_SECT 512
111
112/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
113#define CONFIG_SYS_MAX_FLASH_BANKS 1
114#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
115
116/* Timeout for Flash erase operations (in ms) */
117#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
118/* Timeout for Flash write operations (in ms) */
119#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
120/* Timeout for Flash set sector lock bit operations (in ms) */
121#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
122/* Timeout for Flash clear lock bit operations (in ms) */
123#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
124
125/*
126 * Use hardware flash sectors protection instead
127 * of U-Boot software protection
128 */
129#undef CONFIG_SYS_FLASH_PROTECTION
130#undef CONFIG_SYS_DIRECT_FLASH_TFTP
131
132/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
133#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
134/* Monitor size */
135#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
136/* Size of DRAM reserved for malloc() use */
137#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +0900138#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
139
140/* ENV setting */
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +0900141#define CONFIG_ENV_OVERWRITE 1
142#define CONFIG_ENV_SECT_SIZE (128 * 1024)
143#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
144#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
145/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
146#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
147#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
148
149/* Board Clock */
150#define CONFIG_SYS_CLK_FREQ 41666666
Nobuhiro Iwamatsue6984492013-08-21 16:11:21 +0900151#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
152#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +0900153#define CONFIG_SYS_TMU_CLK_DIV 4
Nobuhiro Iwamatsu45befad2011-11-15 12:29:06 +0900154
155#endif /* __ECOVEC_H */