Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 1 | /* |
Scott Wood | 3f53f1a | 2010-08-30 18:04:52 -0500 | [diff] [blame] | 2 | * Copyright (C) Freescale Semiconductor, Inc. 2006, 2010. |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 3 | * |
Wolfgang Denk | bd8ec7e | 2013-10-07 13:07:26 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 5 | */ |
| 6 | /* |
| 7 | * mpc8313epb board configuration file |
| 8 | */ |
| 9 | |
| 10 | #ifndef __CONFIG_H |
| 11 | #define __CONFIG_H |
| 12 | |
Kim Phillips | d2f66b8 | 2015-03-17 12:00:45 -0500 | [diff] [blame] | 13 | #define CONFIG_DISPLAY_BOARDINFO |
| 14 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 15 | /* |
| 16 | * High Level Configuration Options |
| 17 | */ |
| 18 | #define CONFIG_E300 1 |
Peter Tyser | 72f2d39 | 2009-05-22 17:23:25 -0500 | [diff] [blame] | 19 | #define CONFIG_MPC831x 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 20 | #define CONFIG_MPC8313 1 |
| 21 | #define CONFIG_MPC8313ERDB 1 |
| 22 | |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 23 | #ifdef CONFIG_NAND |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 24 | #define CONFIG_SPL_INIT_MINIMAL |
| 25 | #define CONFIG_SPL_SERIAL_SUPPORT |
| 26 | #define CONFIG_SPL_NAND_SUPPORT |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 27 | #define CONFIG_SPL_FLUSH_IMAGE |
| 28 | #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" |
| 29 | #define CONFIG_SPL_MPC83XX_WAIT_FOR_NAND |
| 30 | |
| 31 | #ifdef CONFIG_SPL_BUILD |
| 32 | #define CONFIG_NS16550_MIN_FUNCTIONS |
| 33 | #endif |
| 34 | |
| 35 | #define CONFIG_SYS_TEXT_BASE 0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */ |
| 36 | #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000 |
| 37 | #define CONFIG_SPL_MAX_SIZE (4 * 1024) |
Benoît Thébaudeau | f018072 | 2013-04-11 09:35:49 +0000 | [diff] [blame] | 38 | #define CONFIG_SPL_PAD_TO 0x4000 |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 39 | |
Scott Wood | f60c06e | 2010-11-24 13:28:40 +0000 | [diff] [blame] | 40 | #define CONFIG_SYS_NAND_U_BOOT_SIZE (512 << 10) |
| 41 | #define CONFIG_SYS_NAND_U_BOOT_DST 0x00100000 |
| 42 | #define CONFIG_SYS_NAND_U_BOOT_START 0x00100100 |
| 43 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 16384 |
| 44 | #define CONFIG_SYS_NAND_U_BOOT_RELOC 0x00010000 |
| 45 | #define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_RELOC + 0x10000) |
| 46 | |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 47 | #ifdef CONFIG_SPL_BUILD |
Scott Wood | f60c06e | 2010-11-24 13:28:40 +0000 | [diff] [blame] | 48 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */ |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 49 | #endif |
| 50 | |
| 51 | #endif /* CONFIG_NAND */ |
Scott Wood | f60c06e | 2010-11-24 13:28:40 +0000 | [diff] [blame] | 52 | |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 53 | #ifndef CONFIG_SYS_TEXT_BASE |
| 54 | #define CONFIG_SYS_TEXT_BASE 0xFE000000 |
| 55 | #endif |
| 56 | |
Scott Wood | f60c06e | 2010-11-24 13:28:40 +0000 | [diff] [blame] | 57 | #ifndef CONFIG_SYS_MONITOR_BASE |
| 58 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
| 59 | #endif |
| 60 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 61 | #define CONFIG_PCI |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 62 | #define CONFIG_PCI_INDIRECT_BRIDGE |
Becky Bruce | dfe6e23 | 2010-06-17 11:37:18 -0500 | [diff] [blame] | 63 | #define CONFIG_FSL_ELBC 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 64 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 65 | #define CONFIG_MISC_INIT_R |
| 66 | |
| 67 | /* |
| 68 | * On-board devices |
York Sun | 224069c | 2008-05-15 15:26:27 -0500 | [diff] [blame] | 69 | * |
| 70 | * TSEC1 is VSC switch |
| 71 | * TSEC2 is SoC TSEC |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 72 | */ |
| 73 | #define CONFIG_VSC7385_ENET |
York Sun | 224069c | 2008-05-15 15:26:27 -0500 | [diff] [blame] | 74 | #define CONFIG_TSEC2 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 75 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 76 | #ifdef CONFIG_SYS_66MHZ |
Kim Phillips | ffc21c0 | 2007-04-25 12:34:38 -0500 | [diff] [blame] | 77 | #define CONFIG_83XX_CLKIN 66666667 /* in Hz */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 78 | #elif defined(CONFIG_SYS_33MHZ) |
Kim Phillips | ffc21c0 | 2007-04-25 12:34:38 -0500 | [diff] [blame] | 79 | #define CONFIG_83XX_CLKIN 33333333 /* in Hz */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 80 | #else |
| 81 | #error Unknown oscillator frequency. |
| 82 | #endif |
| 83 | |
| 84 | #define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN |
| 85 | |
Joe Hershberger | 37dabcc | 2011-11-11 15:55:38 -0600 | [diff] [blame] | 86 | #define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f */ |
| 87 | #define CONFIG_BOARD_EARLY_INIT_R /* call board_early_init_r */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 88 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 89 | #define CONFIG_SYS_IMMR 0xE0000000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 90 | |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 91 | #if defined(CONFIG_NAND) && !defined(CONFIG_SPL_BUILD) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 92 | #define CONFIG_DEFAULT_IMMR CONFIG_SYS_IMMR |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 93 | #endif |
| 94 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 95 | #define CONFIG_SYS_MEMTEST_START 0x00001000 |
| 96 | #define CONFIG_SYS_MEMTEST_END 0x07f00000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 97 | |
| 98 | /* Early revs of this board will lock up hard when attempting |
| 99 | * to access the PMC registers, unless a JTAG debugger is |
| 100 | * connected, or some resistor modifications are made. |
| 101 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 102 | #define CONFIG_SYS_8313ERDB_BROKEN_PMC 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 103 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 104 | #define CONFIG_SYS_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */ |
| 105 | #define CONFIG_SYS_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 106 | |
| 107 | /* |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 108 | * Device configurations |
| 109 | */ |
| 110 | |
| 111 | /* Vitesse 7385 */ |
| 112 | |
| 113 | #ifdef CONFIG_VSC7385_ENET |
| 114 | |
York Sun | 224069c | 2008-05-15 15:26:27 -0500 | [diff] [blame] | 115 | #define CONFIG_TSEC1 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 116 | |
| 117 | /* The flash address and size of the VSC7385 firmware image */ |
| 118 | #define CONFIG_VSC7385_IMAGE 0xFE7FE000 |
| 119 | #define CONFIG_VSC7385_IMAGE_SIZE 8192 |
| 120 | |
| 121 | #endif |
| 122 | |
| 123 | /* |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 124 | * DDR Setup |
| 125 | */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 126 | #define CONFIG_SYS_DDR_BASE 0x00000000 /* DDR is system memory*/ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 127 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_BASE |
| 128 | #define CONFIG_SYS_DDR_SDRAM_BASE CONFIG_SYS_DDR_BASE |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 129 | |
| 130 | /* |
| 131 | * Manually set up DDR parameters, as this board does not |
| 132 | * seem to have the SPD connected to I2C. |
| 133 | */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 134 | #define CONFIG_SYS_DDR_SIZE 128 /* MB */ |
Joe Hershberger | 5ade390 | 2011-10-11 23:57:31 -0500 | [diff] [blame] | 135 | #define CONFIG_SYS_DDR_CS0_CONFIG (CSCONFIG_EN \ |
Joe Hershberger | cc03b80 | 2011-10-11 23:57:29 -0500 | [diff] [blame] | 136 | | CSCONFIG_ODT_RD_NEVER \ |
| 137 | | CSCONFIG_ODT_WR_ONLY_CURRENT \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 138 | | CSCONFIG_ROW_BIT_13 \ |
| 139 | | CSCONFIG_COL_BIT_10) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 140 | /* 0x80010102 */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 141 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 142 | #define CONFIG_SYS_DDR_TIMING_3 0x00000000 |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 143 | #define CONFIG_SYS_DDR_TIMING_0 ((0 << TIMING_CFG0_RWT_SHIFT) \ |
| 144 | | (0 << TIMING_CFG0_WRT_SHIFT) \ |
| 145 | | (0 << TIMING_CFG0_RRT_SHIFT) \ |
| 146 | | (0 << TIMING_CFG0_WWT_SHIFT) \ |
| 147 | | (2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT) \ |
| 148 | | (2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT) \ |
| 149 | | (8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT) \ |
| 150 | | (2 << TIMING_CFG0_MRS_CYC_SHIFT)) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 151 | /* 0x00220802 */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 152 | #define CONFIG_SYS_DDR_TIMING_1 ((3 << TIMING_CFG1_PRETOACT_SHIFT) \ |
| 153 | | (8 << TIMING_CFG1_ACTTOPRE_SHIFT) \ |
| 154 | | (3 << TIMING_CFG1_ACTTORW_SHIFT) \ |
| 155 | | (5 << TIMING_CFG1_CASLAT_SHIFT) \ |
| 156 | | (10 << TIMING_CFG1_REFREC_SHIFT) \ |
| 157 | | (3 << TIMING_CFG1_WRREC_SHIFT) \ |
| 158 | | (2 << TIMING_CFG1_ACTTOACT_SHIFT) \ |
| 159 | | (2 << TIMING_CFG1_WRTORD_SHIFT)) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 160 | /* 0x3835a322 */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 161 | #define CONFIG_SYS_DDR_TIMING_2 ((1 << TIMING_CFG2_ADD_LAT_SHIFT) \ |
| 162 | | (5 << TIMING_CFG2_CPO_SHIFT) \ |
| 163 | | (2 << TIMING_CFG2_WR_LAT_DELAY_SHIFT) \ |
| 164 | | (2 << TIMING_CFG2_RD_TO_PRE_SHIFT) \ |
| 165 | | (2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT) \ |
| 166 | | (3 << TIMING_CFG2_CKE_PLS_SHIFT) \ |
| 167 | | (6 << TIMING_CFG2_FOUR_ACT_SHIFT)) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 168 | /* 0x129048c6 */ /* P9-45,may need tuning */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 169 | #define CONFIG_SYS_DDR_INTERVAL ((1296 << SDRAM_INTERVAL_REFINT_SHIFT) \ |
| 170 | | (1280 << SDRAM_INTERVAL_BSTOPRE_SHIFT)) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 171 | /* 0x05100500 */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 172 | #if defined(CONFIG_DDR_2T_TIMING) |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 173 | #define CONFIG_SYS_SDRAM_CFG (SDRAM_CFG_SREN \ |
Kim Phillips | 3b9c20f | 2007-08-16 22:52:48 -0500 | [diff] [blame] | 174 | | SDRAM_CFG_SDRAM_TYPE_DDR2 \ |
Joe Hershberger | cc03b80 | 2011-10-11 23:57:29 -0500 | [diff] [blame] | 175 | | SDRAM_CFG_DBW_32 \ |
| 176 | | SDRAM_CFG_2T_EN) |
| 177 | /* 0x43088000 */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 178 | #else |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 179 | #define CONFIG_SYS_SDRAM_CFG (SDRAM_CFG_SREN \ |
Kim Phillips | 3b9c20f | 2007-08-16 22:52:48 -0500 | [diff] [blame] | 180 | | SDRAM_CFG_SDRAM_TYPE_DDR2 \ |
Joe Hershberger | cc03b80 | 2011-10-11 23:57:29 -0500 | [diff] [blame] | 181 | | SDRAM_CFG_DBW_32) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 182 | /* 0x43080000 */ |
| 183 | #endif |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 184 | #define CONFIG_SYS_SDRAM_CFG2 0x00401000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 185 | /* set burst length to 8 for 32-bit data path */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 186 | #define CONFIG_SYS_DDR_MODE ((0x4448 << SDRAM_MODE_ESD_SHIFT) \ |
| 187 | | (0x0632 << SDRAM_MODE_SD_SHIFT)) |
Poonam Aggrwal | ff45284 | 2008-01-14 09:41:14 +0530 | [diff] [blame] | 188 | /* 0x44480632 */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 189 | #define CONFIG_SYS_DDR_MODE_2 0x8000C000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 190 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 191 | #define CONFIG_SYS_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 192 | /*0x02000000*/ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 193 | #define CONFIG_SYS_DDRCDR_VALUE (DDRCDR_EN \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 194 | | DDRCDR_PZ_NOMZ \ |
| 195 | | DDRCDR_NZ_NOMZ \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 196 | | DDRCDR_M_ODR) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 197 | |
| 198 | /* |
| 199 | * FLASH on the Local Bus |
| 200 | */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 201 | #define CONFIG_SYS_FLASH_CFI /* use the Common Flash Interface */ |
| 202 | #define CONFIG_FLASH_CFI_DRIVER /* use the CFI driver */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 203 | #define CONFIG_SYS_FLASH_BASE 0xFE000000 /* start of FLASH */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 204 | #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ |
| 205 | #define CONFIG_SYS_FLASH_PROTECTION 1 /* Use h/w Flash protection. */ |
| 206 | #define CONFIG_SYS_FLASH_EMPTY_INFO /* display empty sectors */ |
| 207 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 208 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 209 | #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 210 | | BR_PS_16 /* 16 bit port */ \ |
| 211 | | BR_MS_GPCM /* MSEL = GPCM */ \ |
| 212 | | BR_V) /* valid */ |
| 213 | #define CONFIG_SYS_NOR_OR_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 214 | | OR_GPCM_XACS \ |
| 215 | | OR_GPCM_SCY_9 \ |
| 216 | | OR_GPCM_EHTR \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 217 | | OR_GPCM_EAD) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 218 | /* 0xFF006FF7 TODO SLOW 16 MB flash size */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 219 | /* window base at flash base */ |
| 220 | #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 221 | /* 16 MB window size */ |
| 222 | #define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_16MB) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 223 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 224 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ |
| 225 | #define CONFIG_SYS_MAX_FLASH_SECT 135 /* sectors per device */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 226 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 227 | #define CONFIG_SYS_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */ |
| 228 | #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 229 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 230 | #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE) && \ |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 231 | !defined(CONFIG_SPL_BUILD) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 232 | #define CONFIG_SYS_RAMBOOT |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 233 | #endif |
| 234 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 235 | #define CONFIG_SYS_INIT_RAM_LOCK 1 |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 236 | #define CONFIG_SYS_INIT_RAM_ADDR 0xFD000000 /* Initial RAM addr */ |
| 237 | #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in RAM*/ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 238 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 239 | #define CONFIG_SYS_GBL_DATA_OFFSET \ |
| 240 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 241 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 242 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 243 | /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */ |
Kevin Hao | 349a015 | 2016-07-08 11:25:14 +0800 | [diff] [blame] | 244 | #define CONFIG_SYS_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Mon */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 245 | #define CONFIG_SYS_MALLOC_LEN (512 * 1024) /* Reserved for malloc */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 246 | |
| 247 | /* |
| 248 | * Local Bus LCRR and LBCR regs |
| 249 | */ |
Kim Phillips | 328040a | 2009-09-25 18:19:44 -0500 | [diff] [blame] | 250 | #define CONFIG_SYS_LCRR_EADC LCRR_EADC_1 |
| 251 | #define CONFIG_SYS_LCRR_CLKDIV LCRR_CLKDIV_4 |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 252 | #define CONFIG_SYS_LBC_LBCR (0x00040000 /* TODO */ \ |
| 253 | | (0xFF << LBCR_BMT_SHIFT) \ |
| 254 | | 0xF) /* 0x0004ff0f */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 255 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 256 | /* LB refresh timer prescal, 266MHz/32 */ |
| 257 | #define CONFIG_SYS_LBC_MRTPR 0x20000000 /*TODO */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 258 | |
Marcel Ziswiler | aea6856 | 2007-12-30 03:30:46 +0100 | [diff] [blame] | 259 | /* drivers/mtd/nand/nand.c */ |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 260 | #if defined(CONFIG_NAND) && defined(CONFIG_SPL_BUILD) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 261 | #define CONFIG_SYS_NAND_BASE 0xFFF00000 |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 262 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 263 | #define CONFIG_SYS_NAND_BASE 0xE2800000 |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 264 | #endif |
| 265 | |
Scott Wood | 3f53f1a | 2010-08-30 18:04:52 -0500 | [diff] [blame] | 266 | #define CONFIG_MTD_DEVICE |
| 267 | #define CONFIG_MTD_PARTITION |
| 268 | #define CONFIG_CMD_MTDPARTS |
| 269 | #define MTDIDS_DEFAULT "nand0=e2800000.flash" |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 270 | #define MTDPARTS_DEFAULT \ |
Kevin Hao | 9c74796 | 2016-07-08 11:25:15 +0800 | [diff] [blame] | 271 | "mtdparts=e2800000.flash:512k(uboot),128k(env),6m@1m(kernel),-(fs)" |
Scott Wood | 3f53f1a | 2010-08-30 18:04:52 -0500 | [diff] [blame] | 272 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 273 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Scott Wood | b7dac21 | 2008-06-26 14:06:52 -0500 | [diff] [blame] | 274 | #define CONFIG_CMD_NAND 1 |
| 275 | #define CONFIG_NAND_FSL_ELBC 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 276 | #define CONFIG_SYS_NAND_BLOCK_SIZE 16384 |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 277 | #define CONFIG_SYS_NAND_WINDOW_SIZE (32 * 1024) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 278 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 279 | #define CONFIG_SYS_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE \ |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 280 | | BR_DECC_CHK_GEN /* Use HW ECC */ \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 281 | | BR_PS_8 /* 8 bit port */ \ |
Wolfgang Denk | 4892339 | 2007-05-16 01:16:53 +0200 | [diff] [blame] | 282 | | BR_MS_FCM /* MSEL = FCM */ \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 283 | | BR_V) /* valid */ |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 284 | #define CONFIG_SYS_NAND_OR_PRELIM \ |
| 285 | (P2SZ_TO_AM(CONFIG_SYS_NAND_WINDOW_SIZE) \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 286 | | OR_FCM_CSCT \ |
| 287 | | OR_FCM_CST \ |
| 288 | | OR_FCM_CHT \ |
| 289 | | OR_FCM_SCY_1 \ |
| 290 | | OR_FCM_TRLX \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 291 | | OR_FCM_EHTR) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 292 | /* 0xFFFF8396 */ |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 293 | |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 294 | #ifdef CONFIG_NAND |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 295 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM |
| 296 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM |
| 297 | #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NOR_BR_PRELIM |
| 298 | #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NOR_OR_PRELIM |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 299 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 300 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NOR_BR_PRELIM |
| 301 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NOR_OR_PRELIM |
| 302 | #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM |
| 303 | #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 304 | #endif |
| 305 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 306 | #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 307 | #define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 308 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 309 | #define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM |
| 310 | #define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 311 | |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 312 | /* local bus write LED / read status buffer (BCSR) mapping */ |
| 313 | #define CONFIG_SYS_BCSR_ADDR 0xFA000000 |
| 314 | #define CONFIG_SYS_BCSR_SIZE (32 * 1024) /* 0x00008000 */ |
| 315 | /* map at 0xFA000000 on LCS3 */ |
| 316 | #define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_BCSR_ADDR \ |
| 317 | | BR_PS_8 /* 8 bit port */ \ |
| 318 | | BR_MS_GPCM /* MSEL = GPCM */ \ |
| 319 | | BR_V) /* valid */ |
| 320 | /* 0xFA000801 */ |
| 321 | #define CONFIG_SYS_OR3_PRELIM (P2SZ_TO_AM(CONFIG_SYS_BCSR_SIZE) \ |
| 322 | | OR_GPCM_CSNT \ |
| 323 | | OR_GPCM_ACS_DIV2 \ |
| 324 | | OR_GPCM_XACS \ |
| 325 | | OR_GPCM_SCY_15 \ |
| 326 | | OR_GPCM_TRLX_SET \ |
| 327 | | OR_GPCM_EHTR_SET \ |
| 328 | | OR_GPCM_EAD) |
| 329 | /* 0xFFFF8FF7 */ |
| 330 | #define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_BCSR_ADDR |
| 331 | #define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 332 | |
| 333 | /* Vitesse 7385 */ |
| 334 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 335 | #ifdef CONFIG_VSC7385_ENET |
| 336 | |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 337 | /* VSC7385 Base address on LCS2 */ |
| 338 | #define CONFIG_SYS_VSC7385_BASE 0xF0000000 |
| 339 | #define CONFIG_SYS_VSC7385_SIZE (128 * 1024) /* 0x00020000 */ |
| 340 | |
| 341 | #define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_VSC7385_BASE \ |
| 342 | | BR_PS_8 /* 8 bit port */ \ |
| 343 | | BR_MS_GPCM /* MSEL = GPCM */ \ |
| 344 | | BR_V) /* valid */ |
| 345 | #define CONFIG_SYS_OR2_PRELIM (P2SZ_TO_AM(CONFIG_SYS_VSC7385_SIZE) \ |
| 346 | | OR_GPCM_CSNT \ |
| 347 | | OR_GPCM_XACS \ |
| 348 | | OR_GPCM_SCY_15 \ |
| 349 | | OR_GPCM_SETA \ |
| 350 | | OR_GPCM_TRLX_SET \ |
| 351 | | OR_GPCM_EHTR_SET \ |
| 352 | | OR_GPCM_EAD) |
| 353 | /* 0xFFFE09FF */ |
| 354 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 355 | /* Access window base at VSC7385 base */ |
| 356 | #define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_VSC7385_BASE |
Joe Hershberger | f05b933 | 2011-10-11 23:57:30 -0500 | [diff] [blame] | 357 | #define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_128KB) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 358 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 359 | #endif |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 360 | |
Joe Hershberger | 37dabcc | 2011-11-11 15:55:38 -0600 | [diff] [blame] | 361 | #define CONFIG_MPC83XX_GPIO 1 |
Joe Hershberger | 37dabcc | 2011-11-11 15:55:38 -0600 | [diff] [blame] | 362 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 363 | /* |
| 364 | * Serial Port |
| 365 | */ |
| 366 | #define CONFIG_CONS_INDEX 1 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 367 | #define CONFIG_SYS_NS16550_SERIAL |
| 368 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 369 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 370 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 371 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200} |
| 372 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 373 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_IMMR+0x4500) |
| 374 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_IMMR+0x4600) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 375 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 376 | /* I2C */ |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 377 | #define CONFIG_SYS_I2C |
| 378 | #define CONFIG_SYS_I2C_FSL |
| 379 | #define CONFIG_SYS_FSL_I2C_SPEED 400000 |
| 380 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 381 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 |
| 382 | #define CONFIG_SYS_FSL_I2C2_SPEED 400000 |
| 383 | #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F |
| 384 | #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 |
| 385 | #define CONFIG_SYS_I2C_NOPROBES { {0, 0x69} } |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 386 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 387 | /* |
| 388 | * General PCI |
| 389 | * Addresses are mapped 1-1. |
| 390 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 391 | #define CONFIG_SYS_PCI1_MEM_BASE 0x80000000 |
| 392 | #define CONFIG_SYS_PCI1_MEM_PHYS CONFIG_SYS_PCI1_MEM_BASE |
| 393 | #define CONFIG_SYS_PCI1_MEM_SIZE 0x10000000 /* 256M */ |
| 394 | #define CONFIG_SYS_PCI1_MMIO_BASE 0x90000000 |
| 395 | #define CONFIG_SYS_PCI1_MMIO_PHYS CONFIG_SYS_PCI1_MMIO_BASE |
| 396 | #define CONFIG_SYS_PCI1_MMIO_SIZE 0x10000000 /* 256M */ |
| 397 | #define CONFIG_SYS_PCI1_IO_BASE 0x00000000 |
| 398 | #define CONFIG_SYS_PCI1_IO_PHYS 0xE2000000 |
| 399 | #define CONFIG_SYS_PCI1_IO_SIZE 0x00100000 /* 1M */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 400 | |
| 401 | #define CONFIG_PCI_PNP /* do pci plug-and-play */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 402 | #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 403 | |
| 404 | /* |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 405 | * TSEC |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 406 | */ |
| 407 | #define CONFIG_TSEC_ENET /* TSEC ethernet support */ |
| 408 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 409 | #define CONFIG_GMII /* MII PHY management */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 410 | |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 411 | #ifdef CONFIG_TSEC1 |
| 412 | #define CONFIG_HAS_ETH0 |
Kim Phillips | 177e58f | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 413 | #define CONFIG_TSEC1_NAME "TSEC0" |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 414 | #define CONFIG_SYS_TSEC1_OFFSET 0x24000 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 415 | #define TSEC1_PHY_ADDR 0x1c |
| 416 | #define TSEC1_FLAGS TSEC_GIGABIT |
| 417 | #define TSEC1_PHYIDX 0 |
| 418 | #endif |
| 419 | |
| 420 | #ifdef CONFIG_TSEC2 |
| 421 | #define CONFIG_HAS_ETH1 |
Kim Phillips | 177e58f | 2007-05-16 16:52:19 -0500 | [diff] [blame] | 422 | #define CONFIG_TSEC2_NAME "TSEC1" |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 423 | #define CONFIG_SYS_TSEC2_OFFSET 0x25000 |
Timur Tabi | 3e1d49a | 2008-02-08 13:15:55 -0600 | [diff] [blame] | 424 | #define TSEC2_PHY_ADDR 4 |
| 425 | #define TSEC2_FLAGS TSEC_GIGABIT |
| 426 | #define TSEC2_PHYIDX 0 |
| 427 | #endif |
| 428 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 429 | /* Options are: TSEC[0-1] */ |
| 430 | #define CONFIG_ETHPRIME "TSEC1" |
| 431 | |
| 432 | /* |
| 433 | * Configure on-board RTC |
| 434 | */ |
| 435 | #define CONFIG_RTC_DS1337 |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 436 | #define CONFIG_SYS_I2C_RTC_ADDR 0x68 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 437 | |
| 438 | /* |
| 439 | * Environment |
| 440 | */ |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 441 | #if defined(CONFIG_NAND) |
Jean-Christophe PLAGNIOL-VILLARD | dda84dd | 2008-09-10 22:47:58 +0200 | [diff] [blame] | 442 | #define CONFIG_ENV_IS_IN_NAND 1 |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 443 | #define CONFIG_ENV_OFFSET (512 * 1024) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 444 | #define CONFIG_ENV_SECT_SIZE CONFIG_SYS_NAND_BLOCK_SIZE |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 445 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 446 | #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE |
| 447 | #define CONFIG_ENV_RANGE (CONFIG_ENV_SECT_SIZE * 4) |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 448 | #define CONFIG_ENV_OFFSET_REDUND \ |
| 449 | (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 450 | #elif !defined(CONFIG_SYS_RAMBOOT) |
Jean-Christophe PLAGNIOL-VILLARD | 53db4cd | 2008-09-10 22:48:04 +0200 | [diff] [blame] | 451 | #define CONFIG_ENV_IS_IN_FLASH 1 |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 452 | #define CONFIG_ENV_ADDR \ |
| 453 | (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 454 | #define CONFIG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */ |
| 455 | #define CONFIG_ENV_SIZE 0x2000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 456 | |
| 457 | /* Address and size of Redundant Environment Sector */ |
| 458 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 68a8756 | 2008-09-10 22:48:00 +0200 | [diff] [blame] | 459 | #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 460 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) |
Jean-Christophe PLAGNIOL-VILLARD | 7e1cda6 | 2008-09-10 22:48:06 +0200 | [diff] [blame] | 461 | #define CONFIG_ENV_SIZE 0x2000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 462 | #endif |
| 463 | |
| 464 | #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 465 | #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 466 | |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 467 | /* |
Jon Loeliger | 5c4ddae | 2007-07-10 10:12:10 -0500 | [diff] [blame] | 468 | * BOOTP options |
| 469 | */ |
| 470 | #define CONFIG_BOOTP_BOOTFILESIZE |
| 471 | #define CONFIG_BOOTP_BOOTPATH |
| 472 | #define CONFIG_BOOTP_GATEWAY |
| 473 | #define CONFIG_BOOTP_HOSTNAME |
| 474 | |
Jon Loeliger | 5c4ddae | 2007-07-10 10:12:10 -0500 | [diff] [blame] | 475 | /* |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 476 | * Command line configuration. |
| 477 | */ |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 478 | #define CONFIG_CMD_DATE |
| 479 | #define CONFIG_CMD_PCI |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 480 | |
Jon Loeliger | 3b7116d | 2007-07-04 22:30:06 -0500 | [diff] [blame] | 481 | #define CONFIG_CMDLINE_EDITING 1 |
Kim Phillips | 26c16d8 | 2010-04-15 17:36:05 -0500 | [diff] [blame] | 482 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 483 | |
| 484 | /* |
| 485 | * Miscellaneous configurable options |
| 486 | */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 487 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 488 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 489 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 490 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 491 | /* Print Buffer Size */ |
| 492 | #define CONFIG_SYS_PBSIZE \ |
| 493 | (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) |
| 494 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 495 | /* Boot Argument Buffer Size */ |
| 496 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 497 | |
| 498 | /* |
| 499 | * For booting Linux, the board info and command line data |
Ira W. Snyder | c5a22d0 | 2010-09-10 15:42:32 -0700 | [diff] [blame] | 500 | * have to be in the first 256 MB of memory, since this is |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 501 | * the maximum mapped by the Linux kernel during initialization. |
| 502 | */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 503 | /* Initial Memory map for Linux*/ |
| 504 | #define CONFIG_SYS_BOOTMAPSZ (256 << 20) |
Kevin Hao | 9c74796 | 2016-07-08 11:25:15 +0800 | [diff] [blame] | 505 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 506 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 507 | #define CONFIG_SYS_RCWH_PCIHOST 0x80000000 /* PCIHOST */ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 508 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 509 | #ifdef CONFIG_SYS_66MHZ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 510 | |
| 511 | /* 66MHz IN, 133MHz CSB, 266 DDR, 266 CORE */ |
| 512 | /* 0x62040000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 513 | #define CONFIG_SYS_HRCW_LOW (\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 514 | 0x20000000 /* reserved, must be set */ |\ |
| 515 | HRCWL_DDRCM |\ |
| 516 | HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ |
| 517 | HRCWL_DDR_TO_SCB_CLK_2X1 |\ |
| 518 | HRCWL_CSB_TO_CLKIN_2X1 |\ |
| 519 | HRCWL_CORE_TO_CSB_2X1) |
| 520 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 521 | #define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 2) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 522 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 523 | #elif defined(CONFIG_SYS_33MHZ) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 524 | |
| 525 | /* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */ |
| 526 | /* 0x65040000 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 527 | #define CONFIG_SYS_HRCW_LOW (\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 528 | 0x20000000 /* reserved, must be set */ |\ |
| 529 | HRCWL_DDRCM |\ |
| 530 | HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\ |
| 531 | HRCWL_DDR_TO_SCB_CLK_2X1 |\ |
| 532 | HRCWL_CSB_TO_CLKIN_5X1 |\ |
| 533 | HRCWL_CORE_TO_CSB_2X1) |
| 534 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 535 | #define CONFIG_SYS_NS16550_CLK (CONFIG_83XX_CLKIN * 5) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 536 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 537 | #endif |
| 538 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 539 | #define CONFIG_SYS_HRCW_HIGH_BASE (\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 540 | HRCWH_PCI_HOST |\ |
| 541 | HRCWH_PCI1_ARBITER_ENABLE |\ |
| 542 | HRCWH_CORE_ENABLE |\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 543 | HRCWH_BOOTSEQ_DISABLE |\ |
| 544 | HRCWH_SW_WATCHDOG_DISABLE |\ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 545 | HRCWH_TSEC1M_IN_RGMII |\ |
| 546 | HRCWH_TSEC2M_IN_RGMII |\ |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 547 | HRCWH_BIG_ENDIAN) |
| 548 | |
Scott Wood | 488af0d | 2012-12-06 13:33:18 +0000 | [diff] [blame] | 549 | #ifdef CONFIG_NAND |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 550 | #define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\ |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 551 | HRCWH_FROM_0XFFF00100 |\ |
| 552 | HRCWH_ROM_LOC_NAND_SP_8BIT |\ |
| 553 | HRCWH_RL_EXT_NAND) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 554 | #else |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 555 | #define CONFIG_SYS_HRCW_HIGH (CONFIG_SYS_HRCW_HIGH_BASE |\ |
Wolfgang Denk | 74e0dde | 2008-08-14 14:41:06 +0200 | [diff] [blame] | 556 | HRCWH_FROM_0X00000100 |\ |
| 557 | HRCWH_ROM_LOC_LOCAL_16BIT |\ |
| 558 | HRCWH_RL_EXT_LEGACY) |
Scott Wood | b71689b | 2008-06-30 14:13:28 -0500 | [diff] [blame] | 559 | #endif |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 560 | |
| 561 | /* System IO Config */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 562 | #define CONFIG_SYS_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */ |
Joe Hershberger | 37dabcc | 2011-11-11 15:55:38 -0600 | [diff] [blame] | 563 | /* Enable Internal USB Phy and GPIO on LCD Connector */ |
| 564 | #define CONFIG_SYS_SICRL (SICRL_USBDR_10 | SICRL_LBC) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 565 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 566 | #define CONFIG_SYS_HID0_INIT 0x000000000 |
| 567 | #define CONFIG_SYS_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \ |
Kim Phillips | f3c7cd9 | 2010-04-20 19:37:54 -0500 | [diff] [blame] | 568 | HID0_ENABLE_INSTRUCTION_CACHE | \ |
| 569 | HID0_ENABLE_DYNAMIC_POWER_MANAGMENT) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 570 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 571 | #define CONFIG_SYS_HID2 HID2_HBE |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 572 | |
Becky Bruce | 03ea1be | 2008-05-08 19:02:12 -0500 | [diff] [blame] | 573 | #define CONFIG_HIGH_BATS 1 /* High BATs supported */ |
| 574 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 575 | /* DDR @ 0x00000000 */ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 576 | #define CONFIG_SYS_IBAT0L (CONFIG_SYS_SDRAM_BASE | BATL_PP_RW) |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 577 | #define CONFIG_SYS_IBAT0U (CONFIG_SYS_SDRAM_BASE \ |
| 578 | | BATU_BL_256M \ |
| 579 | | BATU_VS \ |
| 580 | | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 581 | |
| 582 | /* PCI @ 0x80000000 */ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 583 | #define CONFIG_SYS_IBAT1L (CONFIG_SYS_PCI1_MEM_BASE | BATL_PP_RW) |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 584 | #define CONFIG_SYS_IBAT1U (CONFIG_SYS_PCI1_MEM_BASE \ |
| 585 | | BATU_BL_256M \ |
| 586 | | BATU_VS \ |
| 587 | | BATU_VP) |
| 588 | #define CONFIG_SYS_IBAT2L (CONFIG_SYS_PCI1_MMIO_BASE \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 589 | | BATL_PP_RW \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 590 | | BATL_CACHEINHIBIT \ |
| 591 | | BATL_GUARDEDSTORAGE) |
| 592 | #define CONFIG_SYS_IBAT2U (CONFIG_SYS_PCI1_MMIO_BASE \ |
| 593 | | BATU_BL_256M \ |
| 594 | | BATU_VS \ |
| 595 | | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 596 | |
| 597 | /* PCI2 not supported on 8313 */ |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 598 | #define CONFIG_SYS_IBAT3L (0) |
| 599 | #define CONFIG_SYS_IBAT3U (0) |
| 600 | #define CONFIG_SYS_IBAT4L (0) |
| 601 | #define CONFIG_SYS_IBAT4U (0) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 602 | |
| 603 | /* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 604 | #define CONFIG_SYS_IBAT5L (CONFIG_SYS_IMMR \ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 605 | | BATL_PP_RW \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 606 | | BATL_CACHEINHIBIT \ |
| 607 | | BATL_GUARDEDSTORAGE) |
| 608 | #define CONFIG_SYS_IBAT5U (CONFIG_SYS_IMMR \ |
| 609 | | BATU_BL_256M \ |
| 610 | | BATU_VS \ |
| 611 | | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 612 | |
| 613 | /* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ |
Joe Hershberger | bfd8973 | 2011-10-11 23:57:28 -0500 | [diff] [blame] | 614 | #define CONFIG_SYS_IBAT6L (0xF0000000 | BATL_PP_RW | BATL_GUARDEDSTORAGE) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 615 | #define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 616 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 617 | #define CONFIG_SYS_IBAT7L (0) |
| 618 | #define CONFIG_SYS_IBAT7U (0) |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 619 | |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 620 | #define CONFIG_SYS_DBAT0L CONFIG_SYS_IBAT0L |
| 621 | #define CONFIG_SYS_DBAT0U CONFIG_SYS_IBAT0U |
| 622 | #define CONFIG_SYS_DBAT1L CONFIG_SYS_IBAT1L |
| 623 | #define CONFIG_SYS_DBAT1U CONFIG_SYS_IBAT1U |
| 624 | #define CONFIG_SYS_DBAT2L CONFIG_SYS_IBAT2L |
| 625 | #define CONFIG_SYS_DBAT2U CONFIG_SYS_IBAT2U |
| 626 | #define CONFIG_SYS_DBAT3L CONFIG_SYS_IBAT3L |
| 627 | #define CONFIG_SYS_DBAT3U CONFIG_SYS_IBAT3U |
| 628 | #define CONFIG_SYS_DBAT4L CONFIG_SYS_IBAT4L |
| 629 | #define CONFIG_SYS_DBAT4U CONFIG_SYS_IBAT4U |
| 630 | #define CONFIG_SYS_DBAT5L CONFIG_SYS_IBAT5L |
| 631 | #define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U |
| 632 | #define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L |
| 633 | #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U |
| 634 | #define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L |
| 635 | #define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 636 | |
| 637 | /* |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 638 | * Environment Configuration |
| 639 | */ |
| 640 | #define CONFIG_ENV_OVERWRITE |
| 641 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 642 | #define CONFIG_NETDEV "eth1" |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 643 | |
| 644 | #define CONFIG_HOSTNAME mpc8313erdb |
Joe Hershberger | 257ff78 | 2011-10-13 13:03:47 +0000 | [diff] [blame] | 645 | #define CONFIG_ROOTPATH "/nfs/root/path" |
Joe Hershberger | e4da248 | 2011-10-13 13:03:48 +0000 | [diff] [blame] | 646 | #define CONFIG_BOOTFILE "uImage" |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 647 | /* U-Boot image on TFTP server */ |
| 648 | #define CONFIG_UBOOTPATH "u-boot.bin" |
| 649 | #define CONFIG_FDTFILE "mpc8313erdb.dtb" |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 650 | |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 651 | /* default location for tftp and bootm */ |
| 652 | #define CONFIG_LOADADDR 800000 |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 653 | #define CONFIG_BAUDRATE 115200 |
| 654 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 655 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 656 | "netdev=" CONFIG_NETDEV "\0" \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 657 | "ethprime=TSEC1\0" \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 658 | "uboot=" CONFIG_UBOOTPATH "\0" \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 659 | "tftpflash=tftpboot $loadaddr $uboot; " \ |
Marek Vasut | 0b3176c | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 660 | "protect off " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 661 | " +$filesize; " \ |
| 662 | "erase " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 663 | " +$filesize; " \ |
| 664 | "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 665 | " $filesize; " \ |
| 666 | "protect on " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 667 | " +$filesize; " \ |
| 668 | "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE) \ |
| 669 | " $filesize\0" \ |
Kim Phillips | fd3a3fc | 2009-08-21 16:34:38 -0500 | [diff] [blame] | 670 | "fdtaddr=780000\0" \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 671 | "fdtfile=" CONFIG_FDTFILE "\0" \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 672 | "console=ttyS0\0" \ |
| 673 | "setbootargs=setenv bootargs " \ |
| 674 | "root=$rootdev rw console=$console,$baudrate $othbootargs\0" \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 675 | "setipargs=setenv bootargs nfsroot=$serverip:$rootpath " \ |
Joe Hershberger | b263cae | 2011-10-11 23:57:10 -0500 | [diff] [blame] | 676 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:"\ |
| 677 | "$netdev:off " \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 678 | "root=$rootdev rw console=$console,$baudrate $othbootargs\0" |
| 679 | |
| 680 | #define CONFIG_NFSBOOTCOMMAND \ |
| 681 | "setenv rootdev /dev/nfs;" \ |
Wolfgang Denk | a1be476 | 2008-05-20 16:00:29 +0200 | [diff] [blame] | 682 | "run setbootargs;" \ |
| 683 | "run setipargs;" \ |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 684 | "tftp $loadaddr $bootfile;" \ |
| 685 | "tftp $fdtaddr $fdtfile;" \ |
| 686 | "bootm $loadaddr - $fdtaddr" |
| 687 | |
| 688 | #define CONFIG_RAMBOOTCOMMAND \ |
| 689 | "setenv rootdev /dev/ram;" \ |
| 690 | "run setbootargs;" \ |
| 691 | "tftp $ramdiskaddr $ramdiskfile;" \ |
| 692 | "tftp $loadaddr $bootfile;" \ |
| 693 | "tftp $fdtaddr $fdtfile;" \ |
| 694 | "bootm $loadaddr $ramdiskaddr $fdtaddr" |
| 695 | |
Scott Wood | 865b8ae | 2007-04-16 14:54:15 -0500 | [diff] [blame] | 696 | #endif /* __CONFIG_H */ |