Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 1 | /* |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 2 | * Copyright 2010-2012 Freescale Semiconductor, Inc. |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 3 | * Authors: Srikanth Srinivasan <srikanth.srinivasan@freescale.com> |
| 4 | * Timur Tabi <timur@freescale.com> |
| 5 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 6 | * SPDX-License-Identifier: GPL-2.0+ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __CONFIG_H |
| 10 | #define __CONFIG_H |
| 11 | |
| 12 | #include "../board/freescale/common/ics307_clk.h" |
| 13 | |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 14 | #ifdef CONFIG_SDCARD |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 15 | #define CONFIG_SPL_MMC_MINIMAL |
| 16 | #define CONFIG_SPL_FLUSH_IMAGE |
| 17 | #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 18 | #define CONFIG_SYS_TEXT_BASE 0x11001000 |
| 19 | #define CONFIG_SPL_TEXT_BASE 0xf8f81000 |
Ying Zhang | 25daf57 | 2014-01-24 15:50:06 +0800 | [diff] [blame] | 20 | #define CONFIG_SPL_PAD_TO 0x20000 |
| 21 | #define CONFIG_SPL_MAX_SIZE (128 * 1024) |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 22 | #define CONFIG_SYS_MMC_U_BOOT_SIZE (768 << 10) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 23 | #define CONFIG_SYS_MMC_U_BOOT_DST (0x11000000) |
| 24 | #define CONFIG_SYS_MMC_U_BOOT_START (0x11000000) |
Ying Zhang | 25daf57 | 2014-01-24 15:50:06 +0800 | [diff] [blame] | 25 | #define CONFIG_SYS_MMC_U_BOOT_OFFS (128 << 10) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 26 | #define CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 27 | #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" |
| 28 | #define CONFIG_SPL_MMC_BOOT |
| 29 | #ifdef CONFIG_SPL_BUILD |
| 30 | #define CONFIG_SPL_COMMON_INIT_DDR |
| 31 | #endif |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 32 | #endif |
| 33 | |
| 34 | #ifdef CONFIG_SPIFLASH |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 35 | #define CONFIG_SPL_SPI_FLASH_MINIMAL |
| 36 | #define CONFIG_SPL_FLUSH_IMAGE |
| 37 | #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 38 | #define CONFIG_SYS_TEXT_BASE 0x11001000 |
| 39 | #define CONFIG_SPL_TEXT_BASE 0xf8f81000 |
Ying Zhang | 25daf57 | 2014-01-24 15:50:06 +0800 | [diff] [blame] | 40 | #define CONFIG_SPL_PAD_TO 0x20000 |
| 41 | #define CONFIG_SPL_MAX_SIZE (128 * 1024) |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 42 | #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE (768 << 10) |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 43 | #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST (0x11000000) |
| 44 | #define CONFIG_SYS_SPI_FLASH_U_BOOT_START (0x11000000) |
Ying Zhang | 25daf57 | 2014-01-24 15:50:06 +0800 | [diff] [blame] | 45 | #define CONFIG_SYS_SPI_FLASH_U_BOOT_OFFS (128 << 10) |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 46 | #define CONFIG_SYS_MPC85XX_NO_RESETVEC |
| 47 | #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot.lds" |
| 48 | #define CONFIG_SPL_SPI_BOOT |
| 49 | #ifdef CONFIG_SPL_BUILD |
| 50 | #define CONFIG_SPL_COMMON_INIT_DDR |
| 51 | #endif |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 52 | #endif |
| 53 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 54 | #define CONFIG_NAND_FSL_ELBC |
York Sun | 4a34305 | 2013-12-17 11:21:08 -0800 | [diff] [blame] | 55 | #define CONFIG_SYS_NAND_MAX_ECCPOS 56 |
| 56 | #define CONFIG_SYS_NAND_MAX_OOBFREE 5 |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 57 | |
| 58 | #ifdef CONFIG_NAND |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 59 | #ifdef CONFIG_TPL_BUILD |
| 60 | #define CONFIG_SPL_NAND_BOOT |
| 61 | #define CONFIG_SPL_FLUSH_IMAGE |
Simon Glass | 7db65a8 | 2016-09-12 23:18:45 -0600 | [diff] [blame] | 62 | #define CONFIG_SPL_NAND_INIT |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 63 | #define CONFIG_SPL_COMMON_INIT_DDR |
| 64 | #define CONFIG_SPL_MAX_SIZE (128 << 10) |
| 65 | #define CONFIG_SPL_TEXT_BASE 0xf8f81000 |
| 66 | #define CONFIG_SYS_MPC85XX_NO_RESETVEC |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 67 | #define CONFIG_SYS_NAND_U_BOOT_SIZE (832 << 10) |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 68 | #define CONFIG_SYS_NAND_U_BOOT_DST (0x11000000) |
| 69 | #define CONFIG_SYS_NAND_U_BOOT_START (0x11000000) |
| 70 | #define CONFIG_SYS_NAND_U_BOOT_OFFS ((128 + 128) << 10) |
| 71 | #elif defined(CONFIG_SPL_BUILD) |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 72 | #define CONFIG_SPL_INIT_MINIMAL |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 73 | #define CONFIG_SPL_FLUSH_IMAGE |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 74 | #define CONFIG_SPL_TEXT_BASE 0xff800000 |
| 75 | #define CONFIG_SPL_MAX_SIZE 4096 |
| 76 | #define CONFIG_SYS_NAND_U_BOOT_SIZE (128 << 10) |
| 77 | #define CONFIG_SYS_NAND_U_BOOT_DST 0xf8f80000 |
| 78 | #define CONFIG_SYS_NAND_U_BOOT_START 0xf8f80000 |
| 79 | #define CONFIG_SYS_NAND_U_BOOT_OFFS (128 << 10) |
| 80 | #endif |
| 81 | #define CONFIG_SPL_PAD_TO 0x20000 |
| 82 | #define CONFIG_TPL_PAD_TO 0x20000 |
| 83 | #define CONFIG_SPL_TARGET "u-boot-with-spl.bin" |
| 84 | #define CONFIG_SYS_TEXT_BASE 0x11001000 |
| 85 | #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds" |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 86 | #endif |
| 87 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 88 | /* High Level Configuration Options */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 89 | #define CONFIG_MP /* support multiple processors */ |
| 90 | |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 91 | #ifndef CONFIG_SYS_TEXT_BASE |
Prabhakar Kushwaha | f203656 | 2014-01-14 11:34:26 +0530 | [diff] [blame] | 92 | #define CONFIG_SYS_TEXT_BASE 0xeff40000 |
Wolfgang Denk | 291ba1b | 2010-10-06 09:05:45 +0200 | [diff] [blame] | 93 | #endif |
| 94 | |
Kumar Gala | e727a36 | 2011-01-12 02:48:53 -0600 | [diff] [blame] | 95 | #ifndef CONFIG_RESET_VECTOR_ADDRESS |
| 96 | #define CONFIG_RESET_VECTOR_ADDRESS 0xeffffffc |
| 97 | #endif |
| 98 | |
Robert P. J. Day | a809981 | 2016-05-03 19:52:49 -0400 | [diff] [blame] | 99 | #define CONFIG_PCIE1 /* PCIE controller 1 (slot 1) */ |
| 100 | #define CONFIG_PCIE2 /* PCIE controller 2 (slot 2) */ |
| 101 | #define CONFIG_PCIE3 /* PCIE controller 3 (ULI bridge) */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 102 | #define CONFIG_FSL_PCI_INIT /* Use common FSL init code */ |
| 103 | #define CONFIG_FSL_PCIE_RESET /* need PCIe reset errata */ |
| 104 | #define CONFIG_SYS_PCI_64BIT /* enable 64-bit PCI resources */ |
| 105 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 106 | #define CONFIG_ENABLE_36BIT_PHYS |
Timur Tabi | 6a873c9 | 2011-09-06 09:36:06 -0500 | [diff] [blame] | 107 | |
| 108 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 109 | #define CONFIG_ADDR_MAP |
| 110 | #define CONFIG_SYS_NUM_ADDR_MAP 16 /* number of TLB1 entries */ |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 111 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 112 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 113 | #define CONFIG_SYS_CLK_FREQ get_board_sys_clk() |
| 114 | #define CONFIG_DDR_CLK_FREQ get_board_ddr_clk() |
| 115 | #define CONFIG_ICS307_REFCLK_HZ 33333000 /* ICS307 clock chip ref freq */ |
| 116 | |
| 117 | /* |
| 118 | * These can be toggled for performance analysis, otherwise use default. |
| 119 | */ |
| 120 | #define CONFIG_L2_CACHE |
| 121 | #define CONFIG_BTB |
| 122 | |
| 123 | #define CONFIG_SYS_MEMTEST_START 0x00000000 |
| 124 | #define CONFIG_SYS_MEMTEST_END 0x7fffffff |
| 125 | |
Timur Tabi | d8f341c | 2011-08-04 18:03:41 -0500 | [diff] [blame] | 126 | #define CONFIG_SYS_CCSRBAR 0xffe00000 |
| 127 | #define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 128 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 129 | /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k |
| 130 | SPL code*/ |
| 131 | #ifdef CONFIG_SPL_BUILD |
| 132 | #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE |
| 133 | #endif |
| 134 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 135 | /* DDR Setup */ |
| 136 | #define CONFIG_DDR_SPD |
| 137 | #define CONFIG_VERY_BIG_RAM |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 138 | |
| 139 | #ifdef CONFIG_DDR_ECC |
| 140 | #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER |
| 141 | #define CONFIG_MEM_INIT_VALUE 0xdeadbeef |
| 142 | #endif |
| 143 | |
| 144 | #define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000 |
| 145 | #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE |
| 146 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 147 | #define CONFIG_DIMM_SLOTS_PER_CTLR 1 |
| 148 | #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) |
| 149 | |
| 150 | /* I2C addresses of SPD EEPROMs */ |
| 151 | #define CONFIG_SYS_SPD_BUS_NUM 1 |
Kumar Gala | c68e86c | 2011-01-31 22:18:47 -0600 | [diff] [blame] | 152 | #define SPD_EEPROM_ADDRESS 0x51 /* CTLR 0 DIMM 0 */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 153 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 154 | /* These are used when DDR doesn't use SPD. */ |
| 155 | #define CONFIG_SYS_SDRAM_SIZE 2048 |
| 156 | #define CONFIG_SYS_SDRAM_SIZE_LAW LAW_SIZE_2G |
| 157 | #define CONFIG_SYS_DDR_CS0_BNDS 0x0000003F |
| 158 | #define CONFIG_SYS_DDR_CS0_CONFIG 0x80014202 |
| 159 | #define CONFIG_SYS_DDR_CS1_BNDS 0x0040007F |
| 160 | #define CONFIG_SYS_DDR_CS1_CONFIG 0x80014202 |
| 161 | #define CONFIG_SYS_DDR_TIMING_3 0x00010000 |
| 162 | #define CONFIG_SYS_DDR_TIMING_0 0x40110104 |
| 163 | #define CONFIG_SYS_DDR_TIMING_1 0x5c5bd746 |
| 164 | #define CONFIG_SYS_DDR_TIMING_2 0x0fa8d4ca |
| 165 | #define CONFIG_SYS_DDR_MODE_1 0x00441221 |
| 166 | #define CONFIG_SYS_DDR_MODE_2 0x00000000 |
| 167 | #define CONFIG_SYS_DDR_INTERVAL 0x0a280100 |
| 168 | #define CONFIG_SYS_DDR_DATA_INIT 0xdeadbeef |
| 169 | #define CONFIG_SYS_DDR_CLK_CTRL 0x02800000 |
| 170 | #define CONFIG_SYS_DDR_CONTROL 0xc7000008 |
| 171 | #define CONFIG_SYS_DDR_CONTROL_2 0x24401041 |
| 172 | #define CONFIG_SYS_DDR_TIMING_4 0x00220001 |
| 173 | #define CONFIG_SYS_DDR_TIMING_5 0x02401400 |
| 174 | #define CONFIG_SYS_DDR_ZQ_CONTROL 0x89080600 |
| 175 | #define CONFIG_SYS_DDR_WRLVL_CONTROL 0x8675f608 |
| 176 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 177 | /* |
| 178 | * Memory map |
| 179 | * |
| 180 | * 0x0000_0000 0x7fff_ffff DDR 2G Cacheable |
| 181 | * 0x8000_0000 0xdfff_ffff PCI Express Mem 1.5G non-cacheable |
| 182 | * 0xffc0_0000 0xffc2_ffff PCI IO range 192K non-cacheable |
| 183 | * |
| 184 | * Localbus cacheable (TBD) |
| 185 | * 0xXXXX_XXXX 0xXXXX_XXXX SRAM YZ M Cacheable |
| 186 | * |
| 187 | * Localbus non-cacheable |
| 188 | * 0xe000_0000 0xe80f_ffff Promjet/free 128M non-cacheable |
| 189 | * 0xe800_0000 0xefff_ffff FLASH 128M non-cacheable |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 190 | * 0xff80_0000 0xff80_7fff NAND 32K non-cacheable |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 191 | * 0xffdf_0000 0xffdf_7fff PIXIS 32K non-cacheable TLB0 |
| 192 | * 0xffd0_0000 0xffd0_3fff L1 for stack 16K Cacheable TLB0 |
| 193 | * 0xffe0_0000 0xffef_ffff CCSR 1M non-cacheable |
| 194 | */ |
| 195 | |
| 196 | /* |
| 197 | * Local Bus Definitions |
| 198 | */ |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 199 | #define CONFIG_SYS_FLASH_BASE 0xe8000000 /* start of FLASH 128M */ |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 200 | #ifdef CONFIG_PHYS_64BIT |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 201 | #define CONFIG_SYS_FLASH_BASE_PHYS 0xfe8000000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 202 | #else |
| 203 | #define CONFIG_SYS_FLASH_BASE_PHYS CONFIG_SYS_FLASH_BASE |
| 204 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 205 | |
| 206 | #define CONFIG_FLASH_BR_PRELIM \ |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 207 | (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) | BR_PS_16 | BR_V) |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 208 | #define CONFIG_FLASH_OR_PRELIM (OR_AM_128MB | 0xff7) |
| 209 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 210 | #ifdef CONFIG_NAND |
| 211 | #define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ |
| 212 | #define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ |
| 213 | #else |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 214 | #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ |
| 215 | #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 216 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 217 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 218 | #define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE_PHYS} |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 219 | #define CONFIG_SYS_FLASH_QUIET_TEST |
| 220 | #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */ |
| 221 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 222 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 223 | #define CONFIG_SYS_MAX_FLASH_SECT 1024 |
| 224 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 225 | #ifndef CONFIG_SYS_MONITOR_BASE |
| 226 | #ifdef CONFIG_SPL_BUILD |
| 227 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SPL_TEXT_BASE |
| 228 | #else |
Wolfgang Denk | 0708bc6 | 2010-10-07 21:51:12 +0200 | [diff] [blame] | 229 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */ |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 230 | #endif |
| 231 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 232 | |
| 233 | #define CONFIG_FLASH_CFI_DRIVER |
| 234 | #define CONFIG_SYS_FLASH_CFI |
| 235 | #define CONFIG_SYS_FLASH_EMPTY_INFO |
| 236 | |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 237 | /* Nand Flash */ |
| 238 | #if defined(CONFIG_NAND_FSL_ELBC) |
| 239 | #define CONFIG_SYS_NAND_BASE 0xff800000 |
| 240 | #ifdef CONFIG_PHYS_64BIT |
| 241 | #define CONFIG_SYS_NAND_BASE_PHYS 0xfff800000ull |
| 242 | #else |
| 243 | #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE |
| 244 | #endif |
| 245 | |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 246 | #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 247 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 248 | #define CONFIG_CMD_NAND 1 |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 249 | #define CONFIG_SYS_NAND_BLOCK_SIZE (256 * 1024) |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 250 | #define CONFIG_ELBC_NAND_SPL_STATIC_PGSIZE |
| 251 | |
| 252 | /* NAND flash config */ |
| 253 | #define CONFIG_SYS_NAND_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_NAND_BASE_PHYS) \ |
| 254 | | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ |
| 255 | | BR_PS_8 /* Port Size = 8 bit */ \ |
| 256 | | BR_MS_FCM /* MSEL = FCM */ \ |
| 257 | | BR_V) /* valid */ |
| 258 | #define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB /* length 256K */ \ |
| 259 | | OR_FCM_PGS /* Large Page*/ \ |
| 260 | | OR_FCM_CSCT \ |
| 261 | | OR_FCM_CST \ |
| 262 | | OR_FCM_CHT \ |
| 263 | | OR_FCM_SCY_1 \ |
| 264 | | OR_FCM_TRLX \ |
| 265 | | OR_FCM_EHTR) |
| 266 | #ifdef CONFIG_NAND |
| 267 | #define CONFIG_SYS_BR0_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ |
| 268 | #define CONFIG_SYS_OR0_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ |
| 269 | #else |
| 270 | #define CONFIG_SYS_BR1_PRELIM CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Address */ |
| 271 | #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */ |
| 272 | #endif |
| 273 | |
| 274 | #endif /* CONFIG_NAND_FSL_ELBC */ |
| 275 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 276 | #define CONFIG_BOARD_EARLY_INIT_R |
| 277 | #define CONFIG_MISC_INIT_R |
Timur Tabi | 8848d47 | 2010-07-21 16:56:19 -0500 | [diff] [blame] | 278 | #define CONFIG_HWCONFIG |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 279 | |
| 280 | #define CONFIG_FSL_NGPIXIS |
| 281 | #define PIXIS_BASE 0xffdf0000 /* PIXIS registers */ |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 282 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 283 | #define PIXIS_BASE_PHYS 0xfffdf0000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 284 | #else |
| 285 | #define PIXIS_BASE_PHYS PIXIS_BASE |
| 286 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 287 | |
| 288 | #define CONFIG_SYS_BR2_PRELIM (BR_PHYS_ADDR(PIXIS_BASE_PHYS) | BR_PS_8 | BR_V) |
| 289 | #define CONFIG_SYS_OR2_PRELIM (OR_AM_32KB | 0x6ff7) |
| 290 | |
| 291 | #define PIXIS_LBMAP_SWITCH 7 |
York Sun | 362c993 | 2011-01-26 10:30:00 -0800 | [diff] [blame] | 292 | #define PIXIS_LBMAP_MASK 0xF0 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 293 | #define PIXIS_LBMAP_ALTBANK 0x20 |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 294 | #define PIXIS_SPD 0x07 |
| 295 | #define PIXIS_SPD_SYSCLK_MASK 0x07 |
Jiang Yutang | 382e357 | 2011-02-24 16:11:56 +0800 | [diff] [blame] | 296 | #define PIXIS_ELBC_SPI_MASK 0xc0 |
| 297 | #define PIXIS_SPI 0x80 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 298 | |
| 299 | #define CONFIG_SYS_INIT_RAM_LOCK |
| 300 | #define CONFIG_SYS_INIT_RAM_ADDR 0xffd00000 /* Initial L1 address */ |
Wolfgang Denk | 1c2e98e | 2010-10-26 13:32:32 +0200 | [diff] [blame] | 301 | #define CONFIG_SYS_INIT_RAM_SIZE 0x00004000 /* Size of used area in RAM */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 302 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 303 | #define CONFIG_SYS_GBL_DATA_OFFSET \ |
Wolfgang Denk | 0191e47 | 2010-10-26 14:34:52 +0200 | [diff] [blame] | 304 | (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 305 | #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET |
| 306 | |
Prabhakar Kushwaha | f402731 | 2014-03-31 15:31:48 +0530 | [diff] [blame] | 307 | #define CONFIG_SYS_MONITOR_LEN (768 * 1024) |
Jerry Huang | 5b5bd37 | 2011-11-02 09:16:44 +0800 | [diff] [blame] | 308 | #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 309 | |
| 310 | /* |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 311 | * Config the L2 Cache as L2 SRAM |
| 312 | */ |
| 313 | #if defined(CONFIG_SPL_BUILD) |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 314 | #if defined(CONFIG_SDCARD) || defined(CONFIG_SPIFLASH) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 315 | #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 |
| 316 | #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR |
| 317 | #define CONFIG_SYS_L2_SIZE (256 << 10) |
| 318 | #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) |
| 319 | #define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 |
Ying Zhang | 3587a83 | 2014-01-24 15:50:08 +0800 | [diff] [blame] | 320 | #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 116 * 1024) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 321 | #define CONFIG_SPL_RELOC_STACK_SIZE (32 << 10) |
Ying Zhang | 3587a83 | 2014-01-24 15:50:08 +0800 | [diff] [blame] | 322 | #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 148 * 1024) |
| 323 | #define CONFIG_SPL_RELOC_MALLOC_SIZE (108 << 10) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 324 | #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 112 * 1024) |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 325 | #elif defined(CONFIG_NAND) |
| 326 | #ifdef CONFIG_TPL_BUILD |
| 327 | #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 |
| 328 | #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR |
| 329 | #define CONFIG_SYS_L2_SIZE (256 << 10) |
| 330 | #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) |
| 331 | #define CONFIG_SPL_RELOC_TEXT_BASE 0xf8f81000 |
| 332 | #define CONFIG_SPL_RELOC_STACK (CONFIG_SYS_INIT_L2_ADDR + 192 * 1024) |
| 333 | #define CONFIG_SPL_RELOC_MALLOC_ADDR (CONFIG_SYS_INIT_L2_ADDR + 208 * 1024) |
| 334 | #define CONFIG_SPL_RELOC_MALLOC_SIZE (48 << 10) |
| 335 | #define CONFIG_SPL_GD_ADDR (CONFIG_SYS_INIT_L2_ADDR + 176 * 1024) |
| 336 | #else |
| 337 | #define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 |
| 338 | #define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR |
| 339 | #define CONFIG_SYS_L2_SIZE (256 << 10) |
| 340 | #define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) |
| 341 | #define CONFIG_SPL_RELOC_TEXT_BASE (CONFIG_SYS_INIT_L2_END - 0x2000) |
| 342 | #define CONFIG_SPL_RELOC_STACK ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) |
| 343 | #endif |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 344 | #endif |
| 345 | #endif |
| 346 | |
| 347 | /* |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 348 | * Serial Port |
| 349 | */ |
| 350 | #define CONFIG_CONS_INDEX 1 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 351 | #define CONFIG_SYS_NS16550_SERIAL |
| 352 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
| 353 | #define CONFIG_SYS_NS16550_CLK get_bus_freq(0) |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 354 | #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL) |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 355 | #define CONFIG_NS16550_MIN_FUNCTIONS |
| 356 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 357 | |
| 358 | #define CONFIG_SYS_BAUDRATE_TABLE \ |
| 359 | {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200} |
| 360 | |
| 361 | #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500) |
| 362 | #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600) |
| 363 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 364 | /* Video */ |
Timur Tabi | 32f709e | 2011-04-11 14:18:22 -0500 | [diff] [blame] | 365 | |
Timur Tabi | 209c072 | 2010-09-24 01:25:53 +0200 | [diff] [blame] | 366 | #ifdef CONFIG_FSL_DIU_FB |
| 367 | #define CONFIG_SYS_DIU_ADDR (CONFIG_SYS_CCSRBAR + 0x10000) |
Timur Tabi | 209c072 | 2010-09-24 01:25:53 +0200 | [diff] [blame] | 368 | #define CONFIG_VIDEO_LOGO |
| 369 | #define CONFIG_VIDEO_BMP_LOGO |
Timur Tabi | 970c01f | 2010-09-16 16:35:44 -0500 | [diff] [blame] | 370 | #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS |
| 371 | /* |
| 372 | * With CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS, flash I/O is really slow, so |
| 373 | * disable empty flash sector detection, which is I/O-intensive. |
| 374 | */ |
| 375 | #undef CONFIG_SYS_FLASH_EMPTY_INFO |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 376 | #endif |
| 377 | |
Timur Tabi | 32f709e | 2011-04-11 14:18:22 -0500 | [diff] [blame] | 378 | #ifndef CONFIG_FSL_DIU_FB |
Jiang Yutang | 6c698c0 | 2011-01-24 18:21:19 +0800 | [diff] [blame] | 379 | #endif |
| 380 | |
| 381 | #ifdef CONFIG_ATI |
| 382 | #define VIDEO_IO_OFFSET CONFIG_SYS_PCIE1_IO_VIRT |
Jiang Yutang | 6c698c0 | 2011-01-24 18:21:19 +0800 | [diff] [blame] | 383 | #define CONFIG_BIOSEMU |
Jiang Yutang | 6c698c0 | 2011-01-24 18:21:19 +0800 | [diff] [blame] | 384 | #define CONFIG_ATI_RADEON_FB |
| 385 | #define CONFIG_VIDEO_LOGO |
| 386 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS VIDEO_IO_OFFSET |
Jiang Yutang | 6c698c0 | 2011-01-24 18:21:19 +0800 | [diff] [blame] | 387 | #endif |
| 388 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 389 | /* I2C */ |
Heiko Schocher | f285074 | 2012-10-24 13:48:22 +0200 | [diff] [blame] | 390 | #define CONFIG_SYS_I2C |
| 391 | #define CONFIG_SYS_I2C_FSL |
| 392 | #define CONFIG_SYS_FSL_I2C_SPEED 400000 |
| 393 | #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F |
| 394 | #define CONFIG_SYS_FSL_I2C_OFFSET 0x3000 |
| 395 | #define CONFIG_SYS_FSL_I2C2_SPEED 400000 |
| 396 | #define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F |
| 397 | #define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 398 | #define CONFIG_SYS_I2C_NOPROBES {{0, 0x29}} |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 399 | |
| 400 | /* |
| 401 | * I2C2 EEPROM |
| 402 | */ |
| 403 | #define CONFIG_ID_EEPROM |
| 404 | #define CONFIG_SYS_I2C_EEPROM_NXID |
| 405 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x57 |
| 406 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 407 | #define CONFIG_SYS_EEPROM_BUS_NUM 1 |
| 408 | |
| 409 | /* |
Jiang Yutang | 382e357 | 2011-02-24 16:11:56 +0800 | [diff] [blame] | 410 | * eSPI - Enhanced SPI |
| 411 | */ |
Jiang Yutang | 382e357 | 2011-02-24 16:11:56 +0800 | [diff] [blame] | 412 | |
| 413 | #define CONFIG_HARD_SPI |
Jiang Yutang | 382e357 | 2011-02-24 16:11:56 +0800 | [diff] [blame] | 414 | |
Jiang Yutang | 382e357 | 2011-02-24 16:11:56 +0800 | [diff] [blame] | 415 | #define CONFIG_SF_DEFAULT_SPEED 10000000 |
| 416 | #define CONFIG_SF_DEFAULT_MODE 0 |
| 417 | |
| 418 | /* |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 419 | * General PCI |
| 420 | * Memory space is mapped 1-1, but I/O space must start from 0. |
| 421 | */ |
| 422 | |
| 423 | /* controller 1, Slot 2, tgtid 1, Base address a000 */ |
| 424 | #define CONFIG_SYS_PCIE1_MEM_VIRT 0xc0000000 |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 425 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 426 | #define CONFIG_SYS_PCIE1_MEM_BUS 0xe0000000 |
| 427 | #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc40000000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 428 | #else |
| 429 | #define CONFIG_SYS_PCIE1_MEM_BUS 0xc0000000 |
| 430 | #define CONFIG_SYS_PCIE1_MEM_PHYS 0xc0000000 |
| 431 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 432 | #define CONFIG_SYS_PCIE1_MEM_SIZE 0x20000000 /* 512M */ |
| 433 | #define CONFIG_SYS_PCIE1_IO_VIRT 0xffc20000 |
| 434 | #define CONFIG_SYS_PCIE1_IO_BUS 0x00000000 |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 435 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 436 | #define CONFIG_SYS_PCIE1_IO_PHYS 0xfffc20000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 437 | #else |
| 438 | #define CONFIG_SYS_PCIE1_IO_PHYS 0xffc20000 |
| 439 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 440 | #define CONFIG_SYS_PCIE1_IO_SIZE 0x00010000 /* 64k */ |
| 441 | |
| 442 | /* controller 2, direct to uli, tgtid 2, Base address 9000 */ |
| 443 | #define CONFIG_SYS_PCIE2_MEM_VIRT 0xa0000000 |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 444 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 445 | #define CONFIG_SYS_PCIE2_MEM_BUS 0xe0000000 |
| 446 | #define CONFIG_SYS_PCIE2_MEM_PHYS 0xc20000000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 447 | #else |
| 448 | #define CONFIG_SYS_PCIE2_MEM_BUS 0xa0000000 |
| 449 | #define CONFIG_SYS_PCIE2_MEM_PHYS 0xa0000000 |
| 450 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 451 | #define CONFIG_SYS_PCIE2_MEM_SIZE 0x20000000 /* 512M */ |
| 452 | #define CONFIG_SYS_PCIE2_IO_VIRT 0xffc10000 |
| 453 | #define CONFIG_SYS_PCIE2_IO_BUS 0x00000000 |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 454 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 455 | #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 456 | #else |
| 457 | #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 |
| 458 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 459 | #define CONFIG_SYS_PCIE2_IO_SIZE 0x00010000 /* 64k */ |
| 460 | |
| 461 | /* controller 3, Slot 1, tgtid 3, Base address b000 */ |
| 462 | #define CONFIG_SYS_PCIE3_MEM_VIRT 0x80000000 |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 463 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 464 | #define CONFIG_SYS_PCIE3_MEM_BUS 0xe0000000 |
| 465 | #define CONFIG_SYS_PCIE3_MEM_PHYS 0xc00000000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 466 | #else |
| 467 | #define CONFIG_SYS_PCIE3_MEM_BUS 0x80000000 |
| 468 | #define CONFIG_SYS_PCIE3_MEM_PHYS 0x80000000 |
| 469 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 470 | #define CONFIG_SYS_PCIE3_MEM_SIZE 0x20000000 /* 512M */ |
| 471 | #define CONFIG_SYS_PCIE3_IO_VIRT 0xffc00000 |
| 472 | #define CONFIG_SYS_PCIE3_IO_BUS 0x00000000 |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 473 | #ifdef CONFIG_PHYS_64BIT |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 474 | #define CONFIG_SYS_PCIE3_IO_PHYS 0xfffc00000ull |
Jiang Yutang | b7738b5 | 2011-01-24 18:21:15 +0800 | [diff] [blame] | 475 | #else |
| 476 | #define CONFIG_SYS_PCIE3_IO_PHYS 0xffc00000 |
| 477 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 478 | #define CONFIG_SYS_PCIE3_IO_SIZE 0x00010000 /* 64k */ |
| 479 | |
| 480 | #ifdef CONFIG_PCI |
Gabor Juhos | b445873 | 2013-05-30 07:06:12 +0000 | [diff] [blame] | 481 | #define CONFIG_PCI_INDIRECT_BRIDGE |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 482 | #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */ |
| 483 | #endif |
| 484 | |
| 485 | /* SATA */ |
| 486 | #define CONFIG_LIBATA |
| 487 | #define CONFIG_FSL_SATA |
Zang Roy-R61911 | 2ce421a | 2012-11-26 00:05:38 +0000 | [diff] [blame] | 488 | #define CONFIG_FSL_SATA_V2 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 489 | |
| 490 | #define CONFIG_SYS_SATA_MAX_DEVICE 2 |
| 491 | #define CONFIG_SATA1 |
| 492 | #define CONFIG_SYS_SATA1 CONFIG_SYS_MPC85xx_SATA1_ADDR |
| 493 | #define CONFIG_SYS_SATA1_FLAGS FLAGS_DMA |
| 494 | #define CONFIG_SATA2 |
| 495 | #define CONFIG_SYS_SATA2 CONFIG_SYS_MPC85xx_SATA2_ADDR |
| 496 | #define CONFIG_SYS_SATA2_FLAGS FLAGS_DMA |
| 497 | |
| 498 | #ifdef CONFIG_FSL_SATA |
| 499 | #define CONFIG_LBA48 |
| 500 | #define CONFIG_CMD_SATA |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 501 | #endif |
| 502 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 503 | #ifdef CONFIG_MMC |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 504 | #define CONFIG_FSL_ESDHC |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 505 | #define CONFIG_SYS_FSL_ESDHC_ADDR CONFIG_SYS_MPC85xx_ESDHC_ADDR |
| 506 | #endif |
| 507 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 508 | #define CONFIG_TSEC_ENET |
| 509 | #ifdef CONFIG_TSEC_ENET |
| 510 | |
| 511 | #define CONFIG_TSECV2 |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 512 | |
| 513 | #define CONFIG_MII /* MII PHY management */ |
| 514 | #define CONFIG_TSEC1 1 |
| 515 | #define CONFIG_TSEC1_NAME "eTSEC1" |
| 516 | #define CONFIG_TSEC2 1 |
| 517 | #define CONFIG_TSEC2_NAME "eTSEC2" |
| 518 | |
| 519 | #define TSEC1_PHY_ADDR 1 |
| 520 | #define TSEC2_PHY_ADDR 2 |
| 521 | |
| 522 | #define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) |
| 523 | #define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED) |
| 524 | |
| 525 | #define TSEC1_PHYIDX 0 |
| 526 | #define TSEC2_PHYIDX 0 |
| 527 | |
| 528 | #define CONFIG_ETHPRIME "eTSEC1" |
| 529 | |
| 530 | #define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */ |
| 531 | #endif |
| 532 | |
| 533 | /* |
Yangbo Lu | 140b2bb | 2014-10-16 10:58:55 +0800 | [diff] [blame] | 534 | * Dynamic MTD Partition support with mtdparts |
| 535 | */ |
| 536 | #define CONFIG_MTD_DEVICE |
| 537 | #define CONFIG_MTD_PARTITIONS |
| 538 | #define CONFIG_CMD_MTDPARTS |
| 539 | #define CONFIG_FLASH_CFI_MTD |
| 540 | #ifdef CONFIG_PHYS_64BIT |
| 541 | #define MTDIDS_DEFAULT "nor0=fe8000000.nor" |
| 542 | #define MTDPARTS_DEFAULT "mtdparts=fe8000000.nor:48m(ramdisk)," \ |
| 543 | "14m(diagnostic),2m(dink),6m(kernel),58112k(fs)," \ |
| 544 | "512k(dtb),768k(u-boot)" |
| 545 | #else |
| 546 | #define MTDIDS_DEFAULT "nor0=e8000000.nor" |
| 547 | #define MTDPARTS_DEFAULT "mtdparts=e8000000.nor:48m(ramdisk)," \ |
| 548 | "14m(diagnostic),2m(dink),6m(kernel),58112k(fs)," \ |
| 549 | "512k(dtb),768k(u-boot)" |
| 550 | #endif |
| 551 | |
| 552 | /* |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 553 | * Environment |
| 554 | */ |
Ying Zhang | 9b155ca | 2013-08-16 15:16:14 +0800 | [diff] [blame] | 555 | #ifdef CONFIG_SPIFLASH |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 556 | #define CONFIG_ENV_IS_IN_SPI_FLASH |
| 557 | #define CONFIG_ENV_SPI_BUS 0 |
| 558 | #define CONFIG_ENV_SPI_CS 0 |
| 559 | #define CONFIG_ENV_SPI_MAX_HZ 10000000 |
| 560 | #define CONFIG_ENV_SPI_MODE 0 |
| 561 | #define CONFIG_ENV_SIZE 0x2000 /* 8KB */ |
| 562 | #define CONFIG_ENV_OFFSET 0x100000 /* 1MB */ |
| 563 | #define CONFIG_ENV_SECT_SIZE 0x10000 |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 564 | #elif defined(CONFIG_SDCARD) |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 565 | #define CONFIG_ENV_IS_IN_MMC |
Ying Zhang | dfb2b15 | 2013-08-16 15:16:12 +0800 | [diff] [blame] | 566 | #define CONFIG_FSL_FIXED_MMC_LOCATION |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 567 | #define CONFIG_ENV_SIZE 0x2000 |
| 568 | #define CONFIG_SYS_MMC_ENV_DEV 0 |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 569 | #elif defined(CONFIG_NAND) |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 570 | #ifdef CONFIG_TPL_BUILD |
| 571 | #define CONFIG_ENV_SIZE 0x2000 |
| 572 | #define CONFIG_ENV_ADDR (CONFIG_SYS_INIT_L2_ADDR + (160 << 10)) |
| 573 | #else |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 574 | #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE |
Ying Zhang | 9c2e84f | 2013-08-16 15:16:16 +0800 | [diff] [blame] | 575 | #endif |
| 576 | #define CONFIG_ENV_IS_IN_NAND |
| 577 | #define CONFIG_ENV_OFFSET (1024 * 1024) |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 578 | #define CONFIG_ENV_RANGE (3 * CONFIG_ENV_SIZE) |
Matthew McClintock | cd99caa | 2013-02-18 10:02:19 +0000 | [diff] [blame] | 579 | #elif defined(CONFIG_SYS_RAMBOOT) |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 580 | #define CONFIG_ENV_IS_NOWHERE /* Store ENV in memory only */ |
| 581 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) |
| 582 | #define CONFIG_ENV_SIZE 0x2000 |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 583 | #else |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 584 | #define CONFIG_ENV_IS_IN_FLASH |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 585 | #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 586 | #define CONFIG_ENV_SIZE 0x2000 |
Matthew McClintock | c4253e9 | 2012-05-18 06:04:17 +0000 | [diff] [blame] | 587 | #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ |
| 588 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 589 | |
| 590 | #define CONFIG_LOADS_ECHO |
| 591 | #define CONFIG_SYS_LOADS_BAUD_CHANGE |
| 592 | |
| 593 | /* |
| 594 | * Command line configuration. |
| 595 | */ |
Matthew McClintock | 49b9da1 | 2010-12-17 17:26:41 -0600 | [diff] [blame] | 596 | #define CONFIG_CMD_REGINFO |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 597 | |
| 598 | #ifdef CONFIG_PCI |
| 599 | #define CONFIG_CMD_PCI |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 600 | #endif |
| 601 | |
| 602 | /* |
| 603 | * USB |
| 604 | */ |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 605 | #define CONFIG_HAS_FSL_DR_USB |
| 606 | #ifdef CONFIG_HAS_FSL_DR_USB |
Tom Rini | ceed5d2 | 2017-05-12 22:33:27 -0400 | [diff] [blame] | 607 | #ifdef CONFIG_USB_EHCI_HCD |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 608 | #define CONFIG_EHCI_HCD_INIT_AFTER_RESET |
| 609 | #define CONFIG_USB_EHCI_FSL |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 610 | #endif |
ramneek mehresh | 3d33963 | 2012-04-18 19:39:53 +0000 | [diff] [blame] | 611 | #endif |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 612 | |
| 613 | /* |
| 614 | * Miscellaneous configurable options |
| 615 | */ |
| 616 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| 617 | #define CONFIG_CMDLINE_EDITING /* Command-line editing */ |
Kim Phillips | f7758c1 | 2010-07-14 19:47:18 -0500 | [diff] [blame] | 618 | #define CONFIG_AUTO_COMPLETE /* add autocompletion support */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 619 | #define CONFIG_SYS_LOAD_ADDR 0x2000000 /* default load address */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 620 | #ifdef CONFIG_CMD_KGDB |
| 621 | #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ |
| 622 | #else |
| 623 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 624 | #endif |
| 625 | /* Print Buffer Size */ |
| 626 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
| 627 | #define CONFIG_SYS_MAXARGS 16 |
| 628 | #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 629 | |
| 630 | /* |
| 631 | * For booting Linux, the board info and command line data |
Kumar Gala | 39ffcc1 | 2011-04-28 10:13:41 -0500 | [diff] [blame] | 632 | * have to be in the first 64 MB of memory, since this is |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 633 | * the maximum mapped by the Linux kernel during initialization. |
| 634 | */ |
Kumar Gala | 39ffcc1 | 2011-04-28 10:13:41 -0500 | [diff] [blame] | 635 | #define CONFIG_SYS_BOOTMAPSZ (64 << 20) /* Initial Memory map for Linux*/ |
| 636 | #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 637 | |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 638 | #ifdef CONFIG_CMD_KGDB |
| 639 | #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 640 | #endif |
| 641 | |
| 642 | /* |
| 643 | * Environment Configuration |
| 644 | */ |
| 645 | |
| 646 | #define CONFIG_HOSTNAME p1022ds |
Joe Hershberger | 257ff78 | 2011-10-13 13:03:47 +0000 | [diff] [blame] | 647 | #define CONFIG_ROOTPATH "/opt/nfsroot" |
Joe Hershberger | e4da248 | 2011-10-13 13:03:48 +0000 | [diff] [blame] | 648 | #define CONFIG_BOOTFILE "uImage" |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 649 | #define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */ |
| 650 | |
| 651 | #define CONFIG_LOADADDR 1000000 |
| 652 | |
Timur Tabi | 1a70b23 | 2012-05-04 12:21:29 +0000 | [diff] [blame] | 653 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 654 | "netdev=eth0\0" \ |
Marek Vasut | 0b3176c | 2012-09-23 17:41:24 +0200 | [diff] [blame] | 655 | "uboot=" __stringify(CONFIG_UBOOTPATH) "\0" \ |
| 656 | "ubootaddr=" __stringify(CONFIG_SYS_TEXT_BASE) "\0" \ |
Timur Tabi | 1a70b23 | 2012-05-04 12:21:29 +0000 | [diff] [blame] | 657 | "tftpflash=tftpboot $loadaddr $uboot && " \ |
| 658 | "protect off $ubootaddr +$filesize && " \ |
| 659 | "erase $ubootaddr +$filesize && " \ |
| 660 | "cp.b $loadaddr $ubootaddr $filesize && " \ |
| 661 | "protect on $ubootaddr +$filesize && " \ |
| 662 | "cmp.b $loadaddr $ubootaddr $filesize\0" \ |
| 663 | "consoledev=ttyS0\0" \ |
| 664 | "ramdiskaddr=2000000\0" \ |
| 665 | "ramdiskfile=rootfs.ext2.gz.uboot\0" \ |
Scott Wood | b7f4b85 | 2016-07-19 17:52:06 -0500 | [diff] [blame] | 666 | "fdtaddr=1e00000\0" \ |
Timur Tabi | 1a70b23 | 2012-05-04 12:21:29 +0000 | [diff] [blame] | 667 | "fdtfile=p1022ds.dtb\0" \ |
| 668 | "bdev=sda3\0" \ |
Timur Tabi | 32f709e | 2011-04-11 14:18:22 -0500 | [diff] [blame] | 669 | "hwconfig=esdhc;audclk:12\0" |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 670 | |
| 671 | #define CONFIG_HDBOOT \ |
| 672 | "setenv bootargs root=/dev/$bdev rw " \ |
Timur Tabi | 1a70b23 | 2012-05-04 12:21:29 +0000 | [diff] [blame] | 673 | "console=$consoledev,$baudrate $othbootargs $videobootargs;" \ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 674 | "tftp $loadaddr $bootfile;" \ |
| 675 | "tftp $fdtaddr $fdtfile;" \ |
| 676 | "bootm $loadaddr - $fdtaddr" |
| 677 | |
| 678 | #define CONFIG_NFSBOOTCOMMAND \ |
| 679 | "setenv bootargs root=/dev/nfs rw " \ |
| 680 | "nfsroot=$serverip:$rootpath " \ |
| 681 | "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \ |
Timur Tabi | 1a70b23 | 2012-05-04 12:21:29 +0000 | [diff] [blame] | 682 | "console=$consoledev,$baudrate $othbootargs $videobootargs;" \ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 683 | "tftp $loadaddr $bootfile;" \ |
| 684 | "tftp $fdtaddr $fdtfile;" \ |
| 685 | "bootm $loadaddr - $fdtaddr" |
| 686 | |
| 687 | #define CONFIG_RAMBOOTCOMMAND \ |
| 688 | "setenv bootargs root=/dev/ram rw " \ |
Timur Tabi | 1a70b23 | 2012-05-04 12:21:29 +0000 | [diff] [blame] | 689 | "console=$consoledev,$baudrate $othbootargs $videobootargs;" \ |
Timur Tabi | 9b45b5a | 2010-06-14 15:28:24 -0500 | [diff] [blame] | 690 | "tftp $ramdiskaddr $ramdiskfile;" \ |
| 691 | "tftp $loadaddr $bootfile;" \ |
| 692 | "tftp $fdtaddr $fdtfile;" \ |
| 693 | "bootm $loadaddr $ramdiskaddr $fdtaddr" |
| 694 | |
| 695 | #define CONFIG_BOOTCOMMAND CONFIG_RAMBOOTCOMMAND |
| 696 | |
| 697 | #endif |