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git01.mediatek.com / filogic / uboot / 1d8bbff36546baffa5062a7090a465448e527adf / . / configs / am62x_evm_r5_defconfig
blob: ae3789bad3dc7a50144c2bc7f2d2916109c99df1 [file] [log] [blame]
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]1CONFIG_ARM=y
2CONFIG_ARCH_K3=y
Praneeth Bajjuriaac60642023-04-05 17:40:47 -0500[diff] [blame]3CONFIG_TI_SECURE_DEVICE=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]4CONFIG_SYS_MALLOC_LEN=0x08000000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]5CONFIG_SYS_MALLOC_F_LEN=0x9000
6CONFIG_SPL_LIBCOMMON_SUPPORT=y
7CONFIG_SPL_LIBGENERIC_SUPPORT=y
Georgi Vlaev8b1bbf92022-06-14 17:45:34 +0300[diff] [blame]8CONFIG_NR_DRAM_BANKS=2
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]9CONFIG_SOC_K3_AM625=y
10CONFIG_TARGET_AM625_R5_EVM=y
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]11CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
Kamlesh Gurudasani0725cf42023-03-02 19:40:47 +0530[diff] [blame]12CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0
Tom Rinia77d6f82023-05-01 11:50:26 -0400[diff] [blame]13CONFIG_SF_DEFAULT_SPEED=25000000
14CONFIG_SF_DEFAULT_MODE=0
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]15CONFIG_ENV_SIZE=0x20000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]16CONFIG_DM_GPIO=y
17CONFIG_SPL_DM_SPI=y
18CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk"
19CONFIG_SPL_TEXT_BASE=0x43c00000
Tom Rini9924ca12023-02-17 09:58:06 -0500[diff] [blame]20CONFIG_DM_RESET=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]21CONFIG_SPL_MMC=y
22CONFIG_SPL_SERIAL=y
Tom Rinie0a54502022-07-25 17:19:18 -0400[diff] [blame]23CONFIG_SPL_DRIVERS_MISC=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]24CONFIG_SPL_STACK_R_ADDR=0x82000000
Kamlesh Gurudasani0725cf42023-03-02 19:40:47 +0530[diff] [blame]25CONFIG_SPL_SYS_MALLOC_F_LEN=0x7000
26CONFIG_SPL_SIZE_LIMIT=0x3A7F0
27CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]28CONFIG_SPL_FS_FAT=y
29CONFIG_SPL_LIBDISK_SUPPORT=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]30CONFIG_SPL_SPI_FLASH_SUPPORT=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]31CONFIG_SPL_SPI=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]32CONFIG_SPL_LOAD_FIT=y
33CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]34# CONFIG_DISPLAY_CPUINFO is not set
Kamlesh Gurudasani0725cf42023-03-02 19:40:47 +0530[diff] [blame]35CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y
36CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y
37CONFIG_SPL_MAX_SIZE=0x3B000
38CONFIG_SPL_PAD_TO=0x0
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]39CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
Kamlesh Gurudasani0725cf42023-03-02 19:40:47 +0530[diff] [blame]40CONFIG_SPL_BSS_START_ADDR=0x43c3b000
41CONFIG_SPL_BSS_MAX_SIZE=0x3000
42CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]43CONFIG_SPL_SYS_MALLOC_SIMPLE=y
44CONFIG_SPL_STACK_R=y
45CONFIG_SPL_SEPARATE_BSS=y
Simon Glass67e3fca2023-09-26 08:14:16 -0600[diff] [blame]46CONFIG_SPL_SYS_MALLOC=y
47CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y
48CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000
49CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]50CONFIG_SPL_EARLY_BSS=y
51CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
52CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400
53CONFIG_SPL_DM_MAILBOX=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]54CONFIG_SPL_DM_SPI_FLASH=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]55CONFIG_SPL_DM_RESET=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]56CONFIG_SPL_POWER_DOMAIN=y
57CONFIG_SPL_RAM_SUPPORT=y
58CONFIG_SPL_RAM_DEVICE=y
59CONFIG_SPL_REMOTEPROC=y
Dhruva Golec52e8d32022-10-27 20:23:11 +0530[diff] [blame]60# CONFIG_SPL_SPI_FLASH_TINY is not set
61CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y
62CONFIG_SPL_SPI_LOAD=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]63CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]64CONFIG_SPL_YMODEM_SUPPORT=y
65CONFIG_HUSH_PARSER=y
66CONFIG_CMD_ASKENV=y
67CONFIG_CMD_DFU=y
68CONFIG_CMD_GPT=y
69CONFIG_CMD_MMC=y
70CONFIG_CMD_REMOTEPROC=y
71# CONFIG_CMD_SETEXPR is not set
72CONFIG_CMD_TIME=y
73CONFIG_CMD_FAT=y
74CONFIG_OF_CONTROL=y
75CONFIG_SPL_OF_CONTROL=y
76CONFIG_SPL_MULTI_DTB_FIT=y
77CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
78CONFIG_SYS_RELOC_GD_ENV_ADDR=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]79CONFIG_SPL_DM=y
80CONFIG_SPL_DM_SEQ_ALIAS=y
81CONFIG_REGMAP=y
82CONFIG_SPL_REGMAP=y
83CONFIG_SPL_OF_TRANSLATE=y
84CONFIG_CLK=y
85CONFIG_SPL_CLK=y
86CONFIG_SPL_CLK_CCF=y
87CONFIG_SPL_CLK_K3_PLL=y
88CONFIG_SPL_CLK_K3=y
89CONFIG_TI_SCI_PROTOCOL=y
90CONFIG_DA8XX_GPIO=y
91CONFIG_DM_MAILBOX=y
92CONFIG_K3_SEC_PROXY=y
Tom Rinie0a54502022-07-25 17:19:18 -0400[diff] [blame]93CONFIG_SPL_MISC=y
94CONFIG_ESM_K3=y
Nishanth Menoncb897512023-08-25 13:02:59 -0500[diff] [blame]95CONFIG_SUPPORT_EMMC_BOOT=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]96CONFIG_MMC_SDHCI=y
97CONFIG_MMC_SDHCI_ADMA=y
98CONFIG_SPL_MMC_SDHCI_ADMA=y
99CONFIG_MMC_SDHCI_AM654=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]100CONFIG_DM_SPI_FLASH=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]101CONFIG_SPI_FLASH_SFDP_SUPPORT=y
102CONFIG_SPI_FLASH_SOFT_RESET=y
103CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y
104CONFIG_SPI_FLASH_SPANSION=y
105CONFIG_SPI_FLASH_S28HX_T=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]106CONFIG_PINCTRL=y
107# CONFIG_PINCTRL_GENERIC is not set
108CONFIG_SPL_PINCTRL=y
109# CONFIG_SPL_PINCTRL_GENERIC is not set
110CONFIG_PINCTRL_SINGLE=y
111CONFIG_POWER_DOMAIN=y
112CONFIG_TI_POWER_DOMAIN=y
113CONFIG_K3_SYSTEM_CONTROLLER=y
114CONFIG_REMOTEPROC_TI_K3_ARM64=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]115CONFIG_RESET_TI_SCI=y
116CONFIG_SPECIFY_CONSOLE_INDEX=y
117CONFIG_DM_SERIAL=y
118CONFIG_SOC_DEVICE=y
119CONFIG_SOC_DEVICE_TI_K3=y
120CONFIG_SOC_TI=y
Sjoerd Simons05b61862022-12-20 16:21:44 +0100[diff] [blame]121CONFIG_SPI=y
122CONFIG_DM_SPI=y
123CONFIG_CADENCE_QSPI=y
Vignesh Raghavendrabf9bca72022-05-25 13:38:49 +0530[diff] [blame]124CONFIG_TIMER=y
125CONFIG_SPL_TIMER=y
126CONFIG_OMAP_TIMER=y
127CONFIG_LIB_RATIONAL=y
128CONFIG_SPL_LIB_RATIONAL=y