| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Andreas Färber |
| Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_RK3368_COMMON_H |
| 7 | #define __CONFIG_RK3368_COMMON_H |
| 8 | |
| Klaus Goger | a850b2b | 2017-10-06 19:24:09 +0200 | [diff] [blame] | 9 | #include "rockchip-common.h" |
| 10 | |
| Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 11 | #include <linux/sizes.h> |
| 12 | |
| Tom Rini | bb4dd96 | 2022-11-16 13:10:37 -0500 | [diff] [blame] | 13 | #define CFG_SYS_SDRAM_BASE 0 |
| Kever Yang | 5db9e67 | 2017-06-23 16:11:05 +0800 | [diff] [blame] | 14 | #define SDRAM_MAX_SIZE 0xff000000 |
| Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 15 | |
| Tom Rini | 3088b31 | 2022-12-04 10:04:13 -0500 | [diff] [blame] | 16 | #define CFG_IRAM_BASE 0xff8c0000 |
| Kever Yang | af37632 | 2019-07-22 19:59:09 +0800 | [diff] [blame] | 17 | |
| Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 18 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 19 | "scriptaddr=0x00500000\0" \ |
| 20 | "pxefile_addr_r=0x00600000\0" \ |
| 21 | "fdt_addr_r=0x5600000\0" \ |
| 22 | "kernel_addr_r=0x280000\0" \ |
| 23 | "ramdisk_addr_r=0x5bf0000\0" |
| 24 | |
| Tom Rini | c9edebe | 2022-12-04 10:03:50 -0500 | [diff] [blame] | 25 | #define CFG_EXTRA_ENV_SETTINGS \ |
| Klaus Goger | 2b6b4f2 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 26 | "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
| Simon Glass | f27e9d5 | 2023-04-24 13:49:51 +1200 | [diff] [blame] | 27 | ENV_MEM_LAYOUT_SETTINGS \ |
| 28 | "boot_targets=" BOOT_TARGETS "\0" |
| Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 29 | |
| 30 | #endif |