Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2016 Andreas Färber |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #ifndef __CONFIG_RK3368_COMMON_H |
| 7 | #define __CONFIG_RK3368_COMMON_H |
| 8 | |
Klaus Goger | a850b2b | 2017-10-06 19:24:09 +0200 | [diff] [blame] | 9 | #include "rockchip-common.h" |
| 10 | |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 11 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
| 12 | |
Kever Yang | 9fbe17c | 2019-03-28 11:01:23 +0800 | [diff] [blame] | 13 | #include <asm/arch-rockchip/hardware.h> |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 14 | #include <linux/sizes.h> |
| 15 | |
Kever Yang | 5db9e67 | 2017-06-23 16:11:05 +0800 | [diff] [blame] | 16 | #define CONFIG_SYS_SDRAM_BASE 0 |
| 17 | #define SDRAM_MAX_SIZE 0xff000000 |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 18 | #define CONFIG_BAUDRATE 115200 |
| 19 | #define CONFIG_SYS_MALLOC_LEN (32 << 20) |
| 20 | #define CONFIG_SYS_CBSIZE 1024 |
| 21 | #define CONFIG_SKIP_LOWLEVEL_INIT |
| 22 | |
Kever Yang | e421230 | 2019-07-09 22:00:31 +0800 | [diff] [blame] | 23 | #define CONFIG_ROCKCHIP_STIMER_BASE 0xff830020 |
| 24 | #define COUNTER_FREQUENCY 24000000 |
Philipp Tomsich | 9b687c7 | 2017-06-22 23:31:55 +0200 | [diff] [blame] | 25 | |
Kever Yang | af37632 | 2019-07-22 19:59:09 +0800 | [diff] [blame^] | 26 | #define CONFIG_IRAM_BASE 0xff8c0000 |
| 27 | |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 28 | #define CONFIG_SYS_INIT_SP_ADDR 0x00300000 |
| 29 | #define CONFIG_SYS_LOAD_ADDR 0x00280000 |
| 30 | |
Kever Yang | 1455982 | 2019-03-29 22:48:26 +0800 | [diff] [blame] | 31 | #define CONFIG_SPL_MAX_SIZE 0x60000 |
Philipp Tomsich | 0c1c09f | 2017-07-14 17:52:09 +0200 | [diff] [blame] | 32 | #define CONFIG_SPL_BSS_START_ADDR 0x400000 |
| 33 | #define CONFIG_SPL_BSS_MAX_SIZE 0x20000 |
Kever Yang | 1455982 | 2019-03-29 22:48:26 +0800 | [diff] [blame] | 34 | #define CONFIG_SPL_STACK 0x00188000 |
Philipp Tomsich | 0c1c09f | 2017-07-14 17:52:09 +0200 | [diff] [blame] | 35 | |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 36 | #ifndef CONFIG_SPL_BUILD |
| 37 | #define ENV_MEM_LAYOUT_SETTINGS \ |
| 38 | "scriptaddr=0x00500000\0" \ |
| 39 | "pxefile_addr_r=0x00600000\0" \ |
| 40 | "fdt_addr_r=0x5600000\0" \ |
| 41 | "kernel_addr_r=0x280000\0" \ |
| 42 | "ramdisk_addr_r=0x5bf0000\0" |
| 43 | |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 44 | #include <config_distro_bootcmd.h> |
| 45 | |
| 46 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
Klaus Goger | 2b6b4f2 | 2018-05-25 23:45:05 +0200 | [diff] [blame] | 47 | "fdtfile=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \ |
Andy Yan | c35846d | 2017-09-04 20:32:23 +0800 | [diff] [blame] | 48 | ENV_MEM_LAYOUT_SETTINGS \ |
Andreas Färber | 9e3ad68 | 2017-05-15 17:51:18 +0800 | [diff] [blame] | 49 | BOOTENV |
| 50 | |
| 51 | #endif |
| 52 | |
| 53 | #endif |