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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05302/*
Marcel Ziswiler510c2dd2019-03-25 17:25:01 +01003 * Copyright 2015-2019 Toradex, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05304 *
Marcel Ziswilerd92dee52016-11-16 17:49:23 +01005 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05306 *
7 * Based on vf610twr.h:
8 * Copyright 2013 Freescale Semiconductor, Inc.
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +05309 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <asm/arch/imx-regs.h>
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +010015#include <linux/sizes.h>
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053016
Gong Qianyu52de2e52015-10-26 19:47:42 +080017#define CONFIG_SYS_FSL_CLK
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053018
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053019#define CONFIG_SKIP_LOWLEVEL_INIT
20
Stefan Agner13011752017-04-11 11:12:14 +053021#ifdef CONFIG_VIDEO_FSL_DCU_FB
Stefan Agner13011752017-04-11 11:12:14 +053022#define CONFIG_SPLASH_SCREEN_ALIGN
23#define CONFIG_VIDEO_LOGO
24#define CONFIG_VIDEO_BMP_LOGO
25#define CONFIG_SYS_FSL_DCU_LE
26
27#define CONFIG_SYS_DCU_ADDR DCU0_BASE_ADDR
28#define DCU_LAYER_MAX_NUM 64
29#endif
30
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053031/* Size of malloc() pool */
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +010032#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * SZ_1M)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053033
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053034/* Allow to overwrite serial and ethaddr */
35#define CONFIG_ENV_OVERWRITE
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053036
37/* NAND support */
Stefan Agner4ce682a2015-05-08 19:07:13 +020038#define CONFIG_SYS_NAND_ONFI_DETECTION
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053039#define CONFIG_SYS_MAX_NAND_DEVICE 1
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053040
41#define CONFIG_IPADDR 192.168.10.2
42#define CONFIG_NETMASK 255.255.255.0
43#define CONFIG_SERVERIP 192.168.10.1
44
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053045#define CONFIG_LOADADDR 0x80008000
46#define CONFIG_FDTADDR 0x84000000
47
48/* We boot from the gfxRAM area of the OCRAM. */
Stefan Agner1faaa3c2017-10-17 13:59:19 +020049#define CONFIG_BOARD_SIZE_LIMIT 520192
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053050
Stefan Agnerc0594832019-03-25 17:25:03 +010051#define MEM_LAYOUT_ENV_SETTINGS \
52 "bootm_size=0x10000000\0" \
53 "fdt_addr_r=0x82000000\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +010054 "kernel_addr_r=0x81000000\0" \
55 "pxefile_addr_r=0x87100000\0" \
56 "ramdisk_addr_r=0x82100000\0" \
57 "scriptaddr=0x87000000\0"
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053058
Igor Opaniukaf80e152019-12-09 12:33:32 +020059#define UBOOT_UPDATE \
60 "update_uboot=nand erase.part u-boot && " \
61 "nand write ${loadaddr} u-boot ${filesize}\0" \
62
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053063#define NFS_BOOTCMD \
64 "nfsargs=ip=:::::eth0: root=/dev/nfs\0" \
65 "nfsboot=run setup; " \
66 "setenv bootargs ${defargs} ${nfsargs} ${mtdparts} " \
67 "${setupargs} ${vidargs}; echo Booting from NFS...;" \
68 "dhcp ${kernel_addr_r} && " \
69 "tftp ${fdt_addr_r} ${soc}-colibri-${fdt_board}.dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053070 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053071
Stefan Agnerc0594832019-03-25 17:25:03 +010072#define SD_BOOTCMD \
Igor Opaniuk81a87562019-05-29 13:00:41 +030073 "set_sdargs=setenv sdargs root=PARTUUID=${uuid} ro rootwait\0" \
74 "sdboot=run setup; run sdfinduuid; run set_sdargs; " \
75 "setenv bootargs ${defargs} ${sdargs} ${mtdparts} " \
Stefan Agnerc0594832019-03-25 17:25:03 +010076 "${setupargs} ${vidargs}; echo Booting from MMC/SD card...; " \
Igor Opaniuk81a87562019-05-29 13:00:41 +030077 "load mmc ${sddev}:${sdbootpart} ${kernel_addr_r} ${kernel_file} && " \
78 "load mmc ${sddev}:${sdbootpart} ${fdt_addr_r} " \
79 "${soc}-colibri-${fdt_board}.dtb && " \
Stefan Agnerc0594832019-03-25 17:25:03 +010080 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Igor Opaniuk81a87562019-05-29 13:00:41 +030081 "sdbootpart=1\0" \
82 "sddev=0\0" \
83 "sdfinduuid=part uuid mmc ${sddev}:${sdrootpart} uuid\0" \
84 "sdrootpart=2\0"
85
Stefan Agnerc0594832019-03-25 17:25:03 +010086
87#define UBI_BOOTCMD \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053088 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
89 "ubi.fm_autoconvert=1\0" \
90 "ubiboot=run setup; " \
91 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
92 "${setupargs} ${vidargs}; echo Booting from NAND...; " \
Sanchayan Maity27e4e102016-11-25 16:19:17 +053093 "ubi part ubi && " \
94 "ubi read ${kernel_addr_r} kernel && " \
95 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maitya48b4272016-12-02 14:28:27 +053096 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +053097
Stefan Agner7f411a52019-03-25 17:25:04 +010098#define CONFIG_BOOTCOMMAND "run ubiboot; " \
99 "setenv fdtfile ${soc}-colibri-${fdt_board}.dtb && run distro_bootcmd;"
Stefan Agnerc0594832019-03-25 17:25:03 +0100100
101#define BOOT_TARGET_DEVICES(func) \
102 func(MMC, mmc, 0) \
103 func(USB, usb, 0) \
104 func(DHCP, dhcp, na)
105#include <config_distro_bootcmd.h>
106#undef BOOTENV_RUN_NET_USB_START
107#define BOOTENV_RUN_NET_USB_START ""
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530108
Sanchayan Maity7755e532015-04-17 18:56:42 +0530109#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
110
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530111#define CONFIG_EXTRA_ENV_SETTINGS \
Stefan Agnerc0594832019-03-25 17:25:03 +0100112 BOOTENV \
113 MEM_LAYOUT_ENV_SETTINGS \
114 NFS_BOOTCMD \
115 SD_BOOTCMD \
116 UBI_BOOTCMD \
Igor Opaniukaf80e152019-12-09 12:33:32 +0200117 UBOOT_UPDATE \
Stefan Agnerc0594832019-03-25 17:25:03 +0100118 "console=ttyLP0\0" \
Stefan Agnerb093f0f2019-03-25 17:25:07 +0100119 "defargs=user_debug=30\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100120 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530121 "fdt_board=eval-v3\0" \
Sanchayan Maitya48b4272016-12-02 14:28:27 +0530122 "fdt_fixup=;\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100123 "kernel_file=zImage\0" \
124 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530125 "setsdupdate=mmc rescan && set interface mmc && " \
Stefan Agnerc0594832019-03-25 17:25:03 +0100126 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
127 "source ${loadaddr}\0" \
128 "setup=setenv setupargs console=tty1 console=${console}" \
129 ",${baudrate}n8 ${memargs}\0" \
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530130 "setupdate=run setsdupdate || run setusbupdate\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100131 "setusbupdate=usb start && set interface usb && " \
132 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
133 "source ${loadaddr}\0" \
Stefan Agner13011752017-04-11 11:12:14 +0530134 "splashpos=m,m\0" \
Stefan Agnerc0594832019-03-25 17:25:03 +0100135 "video-mode=dcufb:640x480-16@60,monitor=lcd\0"
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530136
137/* Miscellaneous configurable options */
Sanchayan Maity0d92de42015-06-08 12:40:41 +0530138#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530139#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
140
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530141#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
142#define CONFIG_SYS_HZ 1000
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530143
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530144/* Physical memory map */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530145#define PHYS_SDRAM (0x80000000)
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +0100146#define PHYS_SDRAM_SIZE (256 * SZ_1M)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530147
148#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
149#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
150#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
151
152#define CONFIG_SYS_INIT_SP_OFFSET \
153 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
154#define CONFIG_SYS_INIT_SP_ADDR \
155 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
156
157/* Environment organization */
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530158#ifdef CONFIG_ENV_IS_IN_NAND
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530159#define CONFIG_ENV_RANGE (4 * 64 * 2048)
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530160#endif
161
Sanchayan Maity7755e532015-04-17 18:56:42 +0530162/* USB Host Support */
Sanchayan Maity7755e532015-04-17 18:56:42 +0530163#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
164#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
165
Sanchayan Maity7755e532015-04-17 18:56:42 +0530166/* USB DFU */
Marcel Ziswiler2e3b3d52019-03-25 17:25:02 +0100167#define CONFIG_SYS_DFU_DATA_BUF_SIZE (SZ_1M)
Sanchayan Maity7755e532015-04-17 18:56:42 +0530168
Sanchayan Maitycc4d78f2015-04-15 16:24:26 +0530169#endif /* __CONFIG_H */