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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Ian Campbell6efe3692014-05-05 11:52:26 +01002/*
3 * (C) Copyright 2012-2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 *
5 * (C) Copyright 2007-2011
6 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
7 * Tom Cubie <tangliang@allwinnertech.com>
8 *
9 * Configuration settings for the Allwinner sunxi series of boards.
Ian Campbell6efe3692014-05-05 11:52:26 +010010 */
11
12#ifndef _SUNXI_COMMON_CONFIG_H
13#define _SUNXI_COMMON_CONFIG_H
14
Hans de Goede22a1a532015-09-13 17:29:33 +020015#include <asm/arch/cpu.h>
Hans de Goeded241ecf2015-05-19 22:12:31 +020016#include <linux/stringify.h>
17
Andre Przywarad8362162017-04-26 01:32:48 +010018#ifdef CONFIG_ARM64
Jagan Tekia4e696b2017-11-10 22:21:09 +053019#define CONFIG_SYS_BOOTM_LEN (32 << 20)
Andre Przywarad8362162017-04-26 01:32:48 +010020#endif
21
Ian Campbell6efe3692014-05-05 11:52:26 +010022/* Serial & console */
Ian Campbell6efe3692014-05-05 11:52:26 +010023#define CONFIG_SYS_NS16550_SERIAL
24/* ns16550 reg in the low bits of cpu reg */
Ian Campbell6efe3692014-05-05 11:52:26 +010025#define CONFIG_SYS_NS16550_CLK 24000000
Thomas Chou00ad1f02015-11-19 21:48:13 +080026#ifndef CONFIG_DM_SERIAL
Simon Glass66648982014-10-30 20:25:50 -060027# define CONFIG_SYS_NS16550_REG_SIZE -4
28# define CONFIG_SYS_NS16550_COM1 SUNXI_UART0_BASE
29# define CONFIG_SYS_NS16550_COM2 SUNXI_UART1_BASE
30# define CONFIG_SYS_NS16550_COM3 SUNXI_UART2_BASE
31# define CONFIG_SYS_NS16550_COM4 SUNXI_UART3_BASE
32# define CONFIG_SYS_NS16550_COM5 SUNXI_R_UART_BASE
33#endif
Ian Campbell6efe3692014-05-05 11:52:26 +010034
Paul Kocialkowskide05f942015-05-16 19:52:11 +020035/* CPU */
Andre Przywara70c78932017-02-16 01:20:19 +000036#define COUNTER_FREQUENCY 24000000
Paul Kocialkowskide05f942015-05-16 19:52:11 +020037
Hans de Goeded241ecf2015-05-19 22:12:31 +020038/*
39 * The DRAM Base differs between some models. We cannot use macros for the
40 * CONFIG_FOO defines which contain the DRAM base address since they end
41 * up unexpanded in include/autoconf.mk .
42 *
43 * So we have to have this #ifdef #else #endif block for these.
44 */
45#ifdef CONFIG_MACH_SUN9I
46#define SDRAM_OFFSET(x) 0x2##x
47#define CONFIG_SYS_SDRAM_BASE 0x20000000
Jernej Skrabec7654ef82021-03-23 21:27:31 +010048/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
Hans de Goede66ab79d2015-09-13 13:02:48 +020049 * since it needs to fit in with the other values. By also #defining it
50 * we get warnings if the Kconfig value mismatches. */
51#define CONFIG_SPL_STACK_R_ADDR 0x2fe00000
Hans de Goeded241ecf2015-05-19 22:12:31 +020052#define CONFIG_SPL_BSS_START_ADDR 0x2ff80000
53#else
54#define SDRAM_OFFSET(x) 0x4##x
Ian Campbell6efe3692014-05-05 11:52:26 +010055#define CONFIG_SYS_SDRAM_BASE 0x40000000
Icenowy Zheng52e61882017-04-08 15:30:12 +080056/* V3s do not have enough memory to place code at 0x4a000000 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +010057/* Note SPL_STACK_R_ADDR is set through Kconfig, we include it here
Hans de Goede66ab79d2015-09-13 13:02:48 +020058 * since it needs to fit in with the other values. By also #defining it
59 * we get warnings if the Kconfig value mismatches. */
60#define CONFIG_SPL_STACK_R_ADDR 0x4fe00000
Hans de Goeded241ecf2015-05-19 22:12:31 +020061#define CONFIG_SPL_BSS_START_ADDR 0x4ff80000
62#endif
63
64#define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 /* 512 KiB */
Hans de Goeded241ecf2015-05-19 22:12:31 +020065
Hans de Goede0b95a282015-05-20 15:27:16 +020066/*
67 * The A80's A1 sram starts at 0x00010000 rather then at 0x00000000 and is
68 * slightly bigger. Note that it is possible to map the first 32 KiB of the
69 * A1 at 0x00000000 like with older SoCs by writing 0x16aa0001 to the
70 * undocumented 0x008000e0 SYS_CTRL register. Where the 16aa is a key and
71 * the 1 actually activates the mapping of the first 32 KiB to 0x00000000.
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080072 * A64 and H5 also has SRAM A1 at 0x00010000, but no magic remap register
73 * is known yet.
74 * H6 has SRAM A1 at 0x00020000.
Hans de Goede0b95a282015-05-20 15:27:16 +020075 */
Icenowy Zheng5e6dd272018-07-21 16:20:20 +080076#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SUNXI_SRAM_ADDRESS
77/* FIXME: this may be larger on some SoCs */
78#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 /* 32 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +010079
80#define CONFIG_SYS_INIT_SP_OFFSET \
81 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
82#define CONFIG_SYS_INIT_SP_ADDR \
83 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
84
Ian Campbell6efe3692014-05-05 11:52:26 +010085#define PHYS_SDRAM_0 CONFIG_SYS_SDRAM_BASE
86#define PHYS_SDRAM_0_SIZE 0x80000000 /* 2 GiB */
87
Ian Campbella2ebf922014-07-18 20:38:41 +010088#ifdef CONFIG_AHCI
Bernhard Nortmannb4946db2015-06-10 10:51:40 +020089#define CONFIG_SYS_64BIT_LBA
Ian Campbella2ebf922014-07-18 20:38:41 +010090#endif
91
Hans de Goede3ce35f92015-08-16 14:48:22 +020092#ifdef CONFIG_NAND_SUNXI
Boris Brezillon94754ad2016-06-15 21:09:27 +020093#define CONFIG_SYS_NAND_MAX_ECCPOS 1664
Boris Brezillon57f20382016-06-15 21:09:23 +020094#define CONFIG_SYS_MAX_NAND_DEVICE 8
Piotr Zierhoffere2b662b2015-07-23 14:33:03 +020095#endif
96
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010097/* mmc config */
Maxime Riparde0c7aa42015-10-15 22:04:07 +020098#ifdef CONFIG_MMC
Ian Campbellb4e9f2f2014-05-05 14:42:31 +010099#define CONFIG_MMC_SUNXI_SLOT 0
Maxime Ripardd780cdc2017-02-27 18:22:03 +0100100#endif
101
102#if defined(CONFIG_ENV_IS_IN_MMC)
Maxime Ripard814d82b2018-01-16 09:44:24 +0100103
104#ifdef CONFIG_ARM64
105/*
106 * This is actually (CONFIG_ENV_OFFSET -
107 * (CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)), but the value will be used
108 * directly in a makefile, without the preprocessor expansion.
109 */
110#define CONFIG_BOARD_SIZE_LIMIT 0x7e000
111#endif
112
Emmanuel Vadot63b45782016-11-05 20:51:11 +0100113#define CONFIG_SYS_MMC_MAX_DEVICE 4
Chen-Yu Tsaid4ea92b2014-10-22 16:47:42 +0800114#endif
Ian Campbellb4e9f2f2014-05-05 14:42:31 +0100115
Ian Campbell6efe3692014-05-05 11:52:26 +0100116/*
117 * Miscellaneous configurable options
118 */
Ian Campbell428734e2014-10-07 14:20:30 +0100119#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
120#define CONFIG_SYS_PBSIZE 1024 /* Print Buffer Size */
Ian Campbell6efe3692014-05-05 11:52:26 +0100121
Ian Campbell6efe3692014-05-05 11:52:26 +0100122/* standalone support */
Hans de Goeded241ecf2015-05-19 22:12:31 +0200123#define CONFIG_STANDALONE_LOAD_ADDR CONFIG_SYS_LOAD_ADDR
Ian Campbell6efe3692014-05-05 11:52:26 +0100124
Ian Campbell6efe3692014-05-05 11:52:26 +0100125/* FLASH and environment organization */
126
Boris Brezillon8646f2a2015-07-27 16:21:26 +0200127#define CONFIG_SYS_MONITOR_LEN (768 << 10) /* 768 KiB */
Ian Campbell6efe3692014-05-05 11:52:26 +0100128
Simon Glass5debe1f2015-02-07 10:47:30 -0700129#define CONFIG_SPL_BOARD_LOAD_IMAGE
130
Icenowy Zheng5e6dd272018-07-21 16:20:20 +0800131/*
132 * We cannot use expressions here, because expressions won't be evaluated in
133 * autoconf.mk.
134 */
135#if CONFIG_SUNXI_SRAM_ADDRESS == 0x10000
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100136#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
Andre Przywaracced7482017-04-26 01:32:42 +0100137#ifdef CONFIG_ARM64
138/* end of SRAM A2 for now, as SRAM A1 is pretty tight for an ARM64 build */
139#define LOW_LEVEL_SRAM_STACK 0x00054000
140#else
Andre Przywarade454ec2017-02-16 01:20:23 +0000141#define LOW_LEVEL_SRAM_STACK 0x00018000
Andre Przywaracced7482017-04-26 01:32:42 +0100142#endif /* !CONFIG_ARM64 */
Icenowy Zheng73210762018-07-21 16:20:24 +0800143#elif CONFIG_SUNXI_SRAM_ADDRESS == 0x20000
Jernej Skrabece638e052021-01-11 21:11:46 +0100144#ifdef CONFIG_MACH_SUN50I_H616
145#define CONFIG_SPL_MAX_SIZE 0xbfa0 /* 48 KiB */
146#define LOW_LEVEL_SRAM_STACK 0x58000
147#else
Icenowy Zheng73210762018-07-21 16:20:24 +0800148#define CONFIG_SPL_MAX_SIZE 0x7fa0 /* 32 KiB */
149/* end of SRAM A2 on H6 for now */
150#define LOW_LEVEL_SRAM_STACK 0x00118000
Jernej Skrabece638e052021-01-11 21:11:46 +0100151#endif
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200152#else
Siarhei Siamashka6b0cd012017-04-26 01:32:49 +0100153#define CONFIG_SPL_MAX_SIZE 0x5fa0 /* 24KB on sun4i/sun7i */
Andre Przywarade454ec2017-02-16 01:20:23 +0000154#define LOW_LEVEL_SRAM_STACK 0x00008000 /* End of sram */
Siarhei Siamashka26c50fb2016-03-29 17:29:10 +0200155#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100156
Andre Przywarade454ec2017-02-16 01:20:23 +0000157#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
158
Jernej Skrabece638e052021-01-11 21:11:46 +0100159#ifndef CONFIG_MACH_SUN50I_H616
Ian Campbell140d8322014-05-05 11:52:30 +0100160#define CONFIG_SPL_PAD_TO 32768 /* decimal for 'dd' */
Jernej Skrabece638e052021-01-11 21:11:46 +0100161#endif
Ian Campbell140d8322014-05-05 11:52:30 +0100162
Hans de Goede73d7d422014-06-09 11:37:00 +0200163/* Ethernet support */
Hans de Goede73d7d422014-06-09 11:37:00 +0200164
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200165#ifdef CONFIG_USB_EHCI_HCD
Hans de Goede804fa572015-05-10 14:10:27 +0200166#define CONFIG_USB_OHCI_NEW
Hans de Goede804fa572015-05-10 14:10:27 +0200167#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
Hans de Goedef494cad2015-01-11 17:17:00 +0100168#endif
169
Ian Campbell6efe3692014-05-05 11:52:26 +0100170#ifndef CONFIG_SPL_BUILD
Hans de Goede6f2da072014-07-31 23:04:45 +0200171
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100172#ifdef CONFIG_ARM64
173/*
174 * Boards seem to come with at least 512MB of DRAM.
175 * The kernel should go at 512K, which is the default text offset (that will
176 * be adjusted at runtime if needed).
177 * There is no compression for arm64 kernels (yet), so leave some space
178 * for really big kernels, say 256MB for now.
179 * Scripts, PXE and DTBs should go afterwards, leaving the rest for the initrd.
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100180 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100181#define BOOTM_SIZE __stringify(0xa000000)
182#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(0080000))
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100183#define KERNEL_COMP_ADDR_R __stringify(SDRAM_OFFSET(4000000))
184#define KERNEL_COMP_SIZE __stringify(0xb000000)
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100185#define FDT_ADDR_R __stringify(SDRAM_OFFSET(FA00000))
186#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(FC00000))
187#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(FD00000))
188#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(FE00000))
189#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(FF00000))
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100190
191#else
Hans de Goede3400a7c2014-12-24 16:08:30 +0100192/*
Hans de Goede9f7dc802015-09-13 17:16:54 +0200193 * 160M RAM (256M minimum minus 64MB heap + 32MB for u-boot, stack, fb, etc.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100194 * 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100195 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Hans de Goede3400a7c2014-12-24 16:08:30 +0100196 */
Icenowy Zheng52e61882017-04-08 15:30:12 +0800197#ifndef CONFIG_MACH_SUN8I_V3S
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100198#define BOOTM_SIZE __stringify(0xa000000)
199#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(2000000))
200#define FDT_ADDR_R __stringify(SDRAM_OFFSET(3000000))
201#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(3100000))
202#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(3200000))
203#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(3300000))
204#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(3400000))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800205#else
206/*
207 * 64M RAM minus 2MB heap + 16MB for u-boot, stack, fb, etc.
208 * 16M uncompressed kernel, 8M compressed kernel, 1M fdt,
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100209 * 1M script, 1M pxe, 1M dt overlay and the ramdisk at the end.
Icenowy Zheng52e61882017-04-08 15:30:12 +0800210 */
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100211#define BOOTM_SIZE __stringify(0x2e00000)
212#define KERNEL_ADDR_R __stringify(SDRAM_OFFSET(1000000))
213#define FDT_ADDR_R __stringify(SDRAM_OFFSET(1800000))
214#define SCRIPT_ADDR_R __stringify(SDRAM_OFFSET(1900000))
215#define PXEFILE_ADDR_R __stringify(SDRAM_OFFSET(1A00000))
216#define FDTOVERLAY_ADDR_R __stringify(SDRAM_OFFSET(1B00000))
217#define RAMDISK_ADDR_R __stringify(SDRAM_OFFSET(1C00000))
Icenowy Zheng52e61882017-04-08 15:30:12 +0800218#endif
Andre Przywara65d2d1d2016-05-04 22:15:32 +0100219#endif
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200220
Hans de Goede2f60c312014-08-01 09:37:58 +0200221#define MEM_LAYOUT_ENV_SETTINGS \
Icenowy Zheng52e61882017-04-08 15:30:12 +0800222 "bootm_size=" BOOTM_SIZE "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200223 "kernel_addr_r=" KERNEL_ADDR_R "\0" \
224 "fdt_addr_r=" FDT_ADDR_R "\0" \
225 "scriptaddr=" SCRIPT_ADDR_R "\0" \
226 "pxefile_addr_r=" PXEFILE_ADDR_R "\0" \
Jernej Skrabec7654ef82021-03-23 21:27:31 +0100227 "fdtoverlay_addr_r=" FDTOVERLAY_ADDR_R "\0" \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200228 "ramdisk_addr_r=" RAMDISK_ADDR_R "\0"
229
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100230#ifdef CONFIG_ARM64
231
232#define MEM_LAYOUT_ENV_EXTRA_SETTINGS \
233 "kernel_comp_addr_r=" KERNEL_COMP_ADDR_R "\0" \
234 "kernel_comp_size=" KERNEL_COMP_SIZE "\0"
235
236#else
237
238#define MEM_LAYOUT_ENV_EXTRA_SETTINGS ""
239
240#endif
241
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200242#define DFU_ALT_INFO_RAM \
243 "dfu_alt_info_ram=" \
244 "kernel ram " KERNEL_ADDR_R " 0x1000000;" \
245 "fdt ram " FDT_ADDR_R " 0x100000;" \
246 "ramdisk ram " RAMDISK_ADDR_R " 0x4000000\0"
Hans de Goede2f60c312014-08-01 09:37:58 +0200247
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800248#ifdef CONFIG_MMC
Karsten Merker16b91632015-12-16 20:59:40 +0100249#if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1
Maxime Ripard65cefba2017-08-23 10:12:22 +0200250#define BOOTENV_DEV_MMC_AUTO(devtypeu, devtypel, instance) \
251 BOOTENV_DEV_MMC(MMC, mmc, 0) \
252 BOOTENV_DEV_MMC(MMC, mmc, 1) \
253 "bootcmd_mmc_auto=" \
254 "if test ${mmc_bootdev} -eq 1; then " \
255 "run bootcmd_mmc1; " \
256 "run bootcmd_mmc0; " \
257 "elif test ${mmc_bootdev} -eq 0; then " \
258 "run bootcmd_mmc0; " \
259 "run bootcmd_mmc1; " \
260 "fi\0"
261
262#define BOOTENV_DEV_NAME_MMC_AUTO(devtypeu, devtypel, instance) \
263 "mmc_auto "
264
265#define BOOT_TARGET_DEVICES_MMC(func) func(MMC_AUTO, mmc_auto, na)
Karsten Merker16b91632015-12-16 20:59:40 +0100266#else
Maxime Ripard65cefba2017-08-23 10:12:22 +0200267#define BOOT_TARGET_DEVICES_MMC(func) func(MMC, mmc, 0)
Karsten Merker16b91632015-12-16 20:59:40 +0100268#endif
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800269#else
270#define BOOT_TARGET_DEVICES_MMC(func)
271#endif
272
Hans de Goede6f2da072014-07-31 23:04:45 +0200273#ifdef CONFIG_AHCI
274#define BOOT_TARGET_DEVICES_SCSI(func) func(SCSI, scsi, 0)
275#else
276#define BOOT_TARGET_DEVICES_SCSI(func)
277#endif
278
Paul Kocialkowski00529e32015-08-04 17:04:09 +0200279#ifdef CONFIG_USB_STORAGE
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800280#define BOOT_TARGET_DEVICES_USB(func) func(USB, usb, 0)
281#else
282#define BOOT_TARGET_DEVICES_USB(func)
283#endif
284
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100285#ifdef CONFIG_CMD_PXE
286#define BOOT_TARGET_DEVICES_PXE(func) func(PXE, pxe, na)
287#else
288#define BOOT_TARGET_DEVICES_PXE(func)
289#endif
290
291#ifdef CONFIG_CMD_DHCP
292#define BOOT_TARGET_DEVICES_DHCP(func) func(DHCP, dhcp, na)
293#else
294#define BOOT_TARGET_DEVICES_DHCP(func)
295#endif
296
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200297/* FEL boot support, auto-execute boot.scr if a script address was provided */
298#define BOOTENV_DEV_FEL(devtypeu, devtypel, instance) \
299 "bootcmd_fel=" \
300 "if test -n ${fel_booted} && test -n ${fel_scriptaddr}; then " \
301 "echo '(FEL boot)'; " \
302 "source ${fel_scriptaddr}; " \
303 "fi\0"
304#define BOOTENV_DEV_NAME_FEL(devtypeu, devtypel, instance) \
305 "fel "
306
Hans de Goede6f2da072014-07-31 23:04:45 +0200307#define BOOT_TARGET_DEVICES(func) \
Bernhard Nortmann8fd443c2015-09-17 18:52:53 +0200308 func(FEL, fel, na) \
Chen-Yu Tsai4fb00c72014-10-07 15:11:49 +0800309 BOOT_TARGET_DEVICES_MMC(func) \
Hans de Goede6f2da072014-07-31 23:04:45 +0200310 BOOT_TARGET_DEVICES_SCSI(func) \
Chen-Yu Tsaiee0cf162014-10-03 20:16:22 +0800311 BOOT_TARGET_DEVICES_USB(func) \
Ondrej Jirman4823c6f2019-02-13 18:50:36 +0100312 BOOT_TARGET_DEVICES_PXE(func) \
313 BOOT_TARGET_DEVICES_DHCP(func)
Hans de Goede6f2da072014-07-31 23:04:45 +0200314
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100315#ifdef CONFIG_OLD_SUNXI_KERNEL_COMPAT
316#define BOOTCMD_SUNXI_COMPAT \
317 "bootcmd_sunxi_compat=" \
318 "setenv root /dev/mmcblk0p3 rootwait; " \
319 "if ext2load mmc 0 0x44000000 uEnv.txt; then " \
320 "echo Loaded environment from uEnv.txt; " \
321 "env import -t 0x44000000 ${filesize}; " \
322 "fi; " \
323 "setenv bootargs console=${console} root=${root} ${extraargs}; " \
324 "ext2load mmc 0 0x43000000 script.bin && " \
325 "ext2load mmc 0 0x48000000 uImage && " \
326 "bootm 0x48000000\0"
327#else
328#define BOOTCMD_SUNXI_COMPAT
329#endif
330
Hans de Goede6f2da072014-07-31 23:04:45 +0200331#include <config_distro_bootcmd.h>
332
Hans de Goede16030822014-09-18 21:03:34 +0200333#ifdef CONFIG_USB_KEYBOARD
334#define CONSOLE_STDIN_SETTINGS \
Hans de Goede16030822014-09-18 21:03:34 +0200335 "stdin=serial,usbkbd\0"
336#else
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200337#define CONSOLE_STDIN_SETTINGS \
338 "stdin=serial\0"
Hans de Goede16030822014-09-18 21:03:34 +0200339#endif
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200340
Jagan Teki5bc34cb2021-02-22 00:12:34 +0000341#ifdef CONFIG_DM_VIDEO
Jernej Skrabec8d91b462017-03-27 19:22:32 +0200342#define CONSOLE_STDOUT_SETTINGS \
343 "stdout=serial,vidconsole\0" \
344 "stderr=serial,vidconsole\0"
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200345#else
346#define CONSOLE_STDOUT_SETTINGS \
347 "stdout=serial\0" \
348 "stderr=serial\0"
349#endif
350
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100351#ifdef CONFIG_MTDIDS_DEFAULT
352#define SUNXI_MTDIDS_DEFAULT \
353 "mtdids=" CONFIG_MTDIDS_DEFAULT "\0"
354#else
355#define SUNXI_MTDIDS_DEFAULT
356#endif
357
358#ifdef CONFIG_MTDPARTS_DEFAULT
359#define SUNXI_MTDPARTS_DEFAULT \
360 "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0"
361#else
362#define SUNXI_MTDPARTS_DEFAULT
363#endif
364
Maxime Ripard32c544d2017-11-14 21:24:00 +0100365#define PARTS_DEFAULT \
366 "name=loader1,start=8k,size=32k,uuid=${uuid_gpt_loader1};" \
367 "name=loader2,size=984k,uuid=${uuid_gpt_loader2};" \
368 "name=esp,size=128M,bootable,uuid=${uuid_gpt_esp};" \
369 "name=system,size=-,uuid=${uuid_gpt_system};"
370
371#define UUID_GPT_ESP "c12a7328-f81f-11d2-ba4b-00a0c93ec93b"
372
373#ifdef CONFIG_ARM64
374#define UUID_GPT_SYSTEM "b921b045-1df0-41c3-af44-4c6f280d3fae"
375#else
376#define UUID_GPT_SYSTEM "69dad710-2ce4-4e3c-b16c-21a1d49abed3"
377#endif
378
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200379#define CONSOLE_ENV_SETTINGS \
380 CONSOLE_STDIN_SETTINGS \
381 CONSOLE_STDOUT_SETTINGS
382
Andreas Färber26f00d22017-04-14 18:44:47 +0200383#ifdef CONFIG_ARM64
384#define FDTFILE "allwinner/" CONFIG_DEFAULT_DEVICE_TREE ".dtb"
385#else
386#define FDTFILE CONFIG_DEFAULT_DEVICE_TREE ".dtb"
387#endif
388
Hans de Goede6f2da072014-07-31 23:04:45 +0200389#define CONFIG_EXTRA_ENV_SETTINGS \
Luc Verhaegenb01df1e2014-08-13 07:55:06 +0200390 CONSOLE_ENV_SETTINGS \
Hans de Goede2f60c312014-08-01 09:37:58 +0200391 MEM_LAYOUT_ENV_SETTINGS \
Arnaud Ferrarisd08e1292021-02-20 13:14:15 +0100392 MEM_LAYOUT_ENV_EXTRA_SETTINGS \
Siarhei Siamashkadb418342015-10-25 06:44:46 +0200393 DFU_ALT_INFO_RAM \
Andreas Färber26f00d22017-04-14 18:44:47 +0200394 "fdtfile=" FDTFILE "\0" \
Hans de Goede2f60c312014-08-01 09:37:58 +0200395 "console=ttyS0,115200\0" \
Maxime Ripardbe1d3562017-02-27 18:22:11 +0100396 SUNXI_MTDIDS_DEFAULT \
397 SUNXI_MTDPARTS_DEFAULT \
Maxime Ripard32c544d2017-11-14 21:24:00 +0100398 "uuid_gpt_esp=" UUID_GPT_ESP "\0" \
399 "uuid_gpt_system=" UUID_GPT_SYSTEM "\0" \
400 "partitions=" PARTS_DEFAULT "\0" \
Hans de Goede8ff8bc82015-10-09 17:11:15 +0100401 BOOTCMD_SUNXI_COMPAT \
Hans de Goede6f2da072014-07-31 23:04:45 +0200402 BOOTENV
403
404#else /* ifndef CONFIG_SPL_BUILD */
405#define CONFIG_EXTRA_ENV_SETTINGS
Ian Campbell6efe3692014-05-05 11:52:26 +0100406#endif
407
408#endif /* _SUNXI_COMMON_CONFIG_H */