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wdenke85390d2002-04-01 14:29:03 +00001/*
2 * COM1 NS16550 support
Stefan Roese88fbf932010-04-15 16:07:28 +02003 * originally from linux source (arch/powerpc/boot/ns16550.c)
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +02004 * modified to use CONFIG_SYS_ISA_MEM and new defines
wdenke85390d2002-04-01 14:29:03 +00005 */
6
Simon Glass85d65312019-12-28 10:44:58 -07007#include <clock_legacy.h>
Tom Rinidec7ea02024-05-20 13:35:03 -06008#include <config.h>
Paul Burton8aadc562016-09-08 07:47:29 +01009#include <clk.h>
Simon Glass79a9da32014-09-04 16:27:34 -060010#include <dm.h>
11#include <errno.h>
Simon Glass0f2af882020-05-10 11:40:05 -060012#include <log.h>
wdenke85390d2002-04-01 14:29:03 +000013#include <ns16550.h>
Ley Foon Tana1763392018-06-14 18:45:22 +080014#include <reset.h>
Simon Glassdbf9a082023-09-26 08:14:56 -060015#include <spl.h>
Ladislav Michlcc294422010-02-01 23:34:25 +010016#include <watchdog.h>
Simon Glass3ba929a2020-10-30 21:38:53 -060017#include <asm/global_data.h>
Simon Glassd66c5f72020-02-03 07:36:15 -070018#include <linux/err.h>
Graeme Russ14f06e62010-04-24 00:05:46 +100019#include <linux/types.h>
20#include <asm/io.h>
wdenke85390d2002-04-01 14:29:03 +000021
Simon Glass79a9da32014-09-04 16:27:34 -060022DECLARE_GLOBAL_DATA_PTR;
23
Detlev Zundel166fb542009-04-03 11:53:01 +020024#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */
25#define UART_MCRVAL (UART_MCR_DTR | \
26 UART_MCR_RTS) /* RTS/DTR */
Simon Glass79a9da32014-09-04 16:27:34 -060027
Simon Glassd945a492019-09-25 08:11:14 -060028#if !CONFIG_IS_ENABLED(DM_SERIAL)
Graeme Russ14f06e62010-04-24 00:05:46 +100029#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glassdd5497c2011-10-15 19:14:09 +000030#define serial_out(x, y) outb(x, (ulong)y)
31#define serial_in(y) inb((ulong)y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +000032#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0)
Simon Glassdd5497c2011-10-15 19:14:09 +000033#define serial_out(x, y) out_be32(y, x)
34#define serial_in(y) in_be32(y)
Dave Aldridgea51bebc2011-09-01 22:47:14 +000035#elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0)
Simon Glassdd5497c2011-10-15 19:14:09 +000036#define serial_out(x, y) out_le32(y, x)
37#define serial_in(y) in_le32(y)
Graeme Russ14f06e62010-04-24 00:05:46 +100038#else
Simon Glassdd5497c2011-10-15 19:14:09 +000039#define serial_out(x, y) writeb(x, y)
40#define serial_in(y) readb(y)
Graeme Russ14f06e62010-04-24 00:05:46 +100041#endif
Simon Glass79a9da32014-09-04 16:27:34 -060042#endif /* !CONFIG_DM_SERIAL */
wdenke85390d2002-04-01 14:29:03 +000043
Tom Rini84c0f692021-09-12 20:32:32 -040044#if defined(CONFIG_ARCH_KEYSTONE)
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -040045#define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0
46#define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0))
Karicheri, Muralidharancbc08882014-04-09 15:38:46 -040047#undef UART_MCRVAL
48#ifdef CONFIG_SERIAL_HW_FLOW_CONTROL
49#define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE)
50#else
51#define UART_MCRVAL (UART_MCR_RTS)
52#endif
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -040053#endif
54
Tom Rini364d0022023-01-10 11:19:45 -050055#ifndef CFG_SYS_NS16550_IER
56#define CFG_SYS_NS16550_IER 0x00
57#endif /* CFG_SYS_NS16550_IER */
Prafulla Wadaskar66216372010-10-27 21:58:31 +053058
Simon Glassb31fb122015-02-27 22:06:26 -070059static inline void serial_out_shift(void *addr, int shift, int value)
Simon Glass6aba4fd2015-01-26 18:27:08 -070060{
Simon Glass79a9da32014-09-04 16:27:34 -060061#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass96e230b2014-10-10 07:49:13 -060062 outb(value, (ulong)addr);
Bernhard Messerklingerd8427e72018-02-15 09:02:26 +010063#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
Simon Glass79a9da32014-09-04 16:27:34 -060064 out_le32(addr, value);
65#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
66 out_be32(addr, value);
Simon Glass0b31ec72015-05-12 14:55:02 -060067#elif defined(CONFIG_SYS_NS16550_MEM32)
68 writel(value, addr);
Simon Glass79a9da32014-09-04 16:27:34 -060069#elif defined(CONFIG_SYS_BIG_ENDIAN)
Simon Glass6aba4fd2015-01-26 18:27:08 -070070 writeb(value, addr + (1 << shift) - 1);
Simon Glass79a9da32014-09-04 16:27:34 -060071#else
72 writeb(value, addr);
73#endif
74}
75
Simon Glassb31fb122015-02-27 22:06:26 -070076static inline int serial_in_shift(void *addr, int shift)
Simon Glass79a9da32014-09-04 16:27:34 -060077{
Simon Glass79a9da32014-09-04 16:27:34 -060078#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Simon Glass96e230b2014-10-10 07:49:13 -060079 return inb((ulong)addr);
Bernhard Messerklingerd8427e72018-02-15 09:02:26 +010080#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN)
Simon Glass79a9da32014-09-04 16:27:34 -060081 return in_le32(addr);
82#elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN)
83 return in_be32(addr);
Simon Glass0b31ec72015-05-12 14:55:02 -060084#elif defined(CONFIG_SYS_NS16550_MEM32)
85 return readl(addr);
Simon Glass79a9da32014-09-04 16:27:34 -060086#elif defined(CONFIG_SYS_BIG_ENDIAN)
Axel Linb5c372d2015-02-28 15:55:36 +080087 return readb(addr + (1 << shift) - 1);
Simon Glass79a9da32014-09-04 16:27:34 -060088#else
89 return readb(addr);
90#endif
91}
92
Simon Glassd945a492019-09-25 08:11:14 -060093#if CONFIG_IS_ENABLED(DM_SERIAL)
Marek Vasut3e97cbb2016-05-25 02:13:03 +020094
Tom Rinidf6a2152022-11-16 13:10:28 -050095#ifndef CFG_SYS_NS16550_CLK
96#define CFG_SYS_NS16550_CLK 0
Marek Vasut3e97cbb2016-05-25 02:13:03 +020097#endif
98
Simon Glassf8b1a242019-12-19 17:58:18 -070099/*
100 * Use this #ifdef for now since many platforms don't define in(), out(),
101 * out_le32(), etc. but we don't have #defines to indicate this.
102 *
103 * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available
104 * on a platform
105 */
106#ifdef CONFIG_NS16550_DYNAMIC
Simon Glassb75b15b2020-12-03 16:55:23 -0700107static void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr,
Simon Glassf8b1a242019-12-19 17:58:18 -0700108 int value)
109{
110 if (plat->flags & NS16550_FLAG_IO) {
111 outb(value, addr);
112 } else if (plat->reg_width == 4) {
113 if (plat->flags & NS16550_FLAG_ENDIAN) {
114 if (plat->flags & NS16550_FLAG_BE)
J. Neuschäfer2c0bbf12025-02-18 14:39:45 +0100115 out_be32((u32 *)addr, value);
Simon Glassf8b1a242019-12-19 17:58:18 -0700116 else
J. Neuschäfer2c0bbf12025-02-18 14:39:45 +0100117 out_le32((u32 *)addr, value);
Simon Glassf8b1a242019-12-19 17:58:18 -0700118 } else {
119 writel(value, addr);
120 }
121 } else if (plat->flags & NS16550_FLAG_BE) {
122 writeb(value, addr + (1 << plat->reg_shift) - 1);
123 } else {
124 writeb(value, addr);
125 }
126}
127
Simon Glassb75b15b2020-12-03 16:55:23 -0700128static int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr)
Simon Glassf8b1a242019-12-19 17:58:18 -0700129{
130 if (plat->flags & NS16550_FLAG_IO) {
131 return inb(addr);
132 } else if (plat->reg_width == 4) {
133 if (plat->flags & NS16550_FLAG_ENDIAN) {
134 if (plat->flags & NS16550_FLAG_BE)
J. Neuschäfer2c0bbf12025-02-18 14:39:45 +0100135 return in_be32((u32 *)addr);
Simon Glassf8b1a242019-12-19 17:58:18 -0700136 else
J. Neuschäfer2c0bbf12025-02-18 14:39:45 +0100137 return in_le32((u32 *)addr);
Simon Glassf8b1a242019-12-19 17:58:18 -0700138 } else {
139 return readl(addr);
140 }
141 } else if (plat->flags & NS16550_FLAG_BE) {
142 return readb(addr + (1 << plat->reg_shift) - 1);
143 } else {
144 return readb(addr);
145 }
146}
147#else
Simon Glassb75b15b2020-12-03 16:55:23 -0700148static inline void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr,
Simon Glassf8b1a242019-12-19 17:58:18 -0700149 int value)
150{
151}
152
Simon Glassb75b15b2020-12-03 16:55:23 -0700153static inline int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr)
Simon Glassf8b1a242019-12-19 17:58:18 -0700154{
155 return 0;
156}
157
158#endif /* CONFIG_NS16550_DYNAMIC */
159
Gokul Praveenc204afd2024-11-26 16:21:30 +0530160void ns16550_writeb(struct ns16550 *port, int offset, int value)
Simon Glass6aba4fd2015-01-26 18:27:08 -0700161{
Simon Glassb75b15b2020-12-03 16:55:23 -0700162 struct ns16550_plat *plat = port->plat;
Simon Glass6aba4fd2015-01-26 18:27:08 -0700163 unsigned char *addr;
164
165 offset *= 1 << plat->reg_shift;
Simon Glassf8b1a242019-12-19 17:58:18 -0700166 addr = (unsigned char *)plat->base + offset + plat->reg_offset;
Paul Burtonc8acc892016-05-17 07:43:26 +0100167
Simon Glassf8b1a242019-12-19 17:58:18 -0700168 if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
169 serial_out_dynamic(plat, addr, value);
170 else
171 serial_out_shift(addr, plat->reg_shift, value);
Simon Glass6aba4fd2015-01-26 18:27:08 -0700172}
173
Simon Glass119e7ef2020-12-22 19:30:18 -0700174static int ns16550_readb(struct ns16550 *port, int offset)
Simon Glass6aba4fd2015-01-26 18:27:08 -0700175{
Simon Glassb75b15b2020-12-03 16:55:23 -0700176 struct ns16550_plat *plat = port->plat;
Simon Glass6aba4fd2015-01-26 18:27:08 -0700177 unsigned char *addr;
178
179 offset *= 1 << plat->reg_shift;
Simon Glassf8b1a242019-12-19 17:58:18 -0700180 addr = (unsigned char *)plat->base + offset + plat->reg_offset;
Simon Glass6aba4fd2015-01-26 18:27:08 -0700181
Simon Glassf8b1a242019-12-19 17:58:18 -0700182 if (IS_ENABLED(CONFIG_NS16550_DYNAMIC))
183 return serial_in_dynamic(plat, addr);
184 else
185 return serial_in_shift(addr, plat->reg_shift);
Simon Glass6aba4fd2015-01-26 18:27:08 -0700186}
187
Simon Glass119e7ef2020-12-22 19:30:18 -0700188static u32 ns16550_getfcr(struct ns16550 *port)
Marek Vasutf523c9c2016-12-01 02:06:29 +0100189{
Simon Glassb75b15b2020-12-03 16:55:23 -0700190 struct ns16550_plat *plat = port->plat;
Marek Vasutf523c9c2016-12-01 02:06:29 +0100191
192 return plat->fcr;
193}
194
Marek Vasutf523c9c2016-12-01 02:06:29 +0100195#else
Simon Glass119e7ef2020-12-22 19:30:18 -0700196static u32 ns16550_getfcr(struct ns16550 *port)
Marek Vasutf523c9c2016-12-01 02:06:29 +0100197{
Heiko Schocher06f108e2017-01-18 08:05:49 +0100198 return UART_FCR_DEFVAL;
Marek Vasutf523c9c2016-12-01 02:06:29 +0100199}
Simon Glass79a9da32014-09-04 16:27:34 -0600200#endif
201
Simon Glass119e7ef2020-12-22 19:30:18 -0700202int ns16550_calc_divisor(struct ns16550 *port, int clock, int baudrate)
Simon Glasse98e01e2014-09-04 16:27:32 -0600203{
204 const unsigned int mode_x_div = 16;
205
Simon Glass27afb522015-01-26 18:27:09 -0700206 return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate);
207}
208
Gokul Praveenc204afd2024-11-26 16:21:30 +0530209void ns16550_setbrg(struct ns16550 *com_port, int baud_divisor)
Simon Glassc31ebfe2014-09-04 16:27:33 -0600210{
Simon Goldschmidtba2d0aa2018-11-02 21:28:08 +0100211 /* to keep serial format, read lcr before writing BKSE */
212 int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE;
213
214 serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr);
Simon Glassc31ebfe2014-09-04 16:27:33 -0600215 serial_out(baud_divisor & 0xff, &com_port->dll);
216 serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm);
Simon Goldschmidtba2d0aa2018-11-02 21:28:08 +0100217 serial_out(lcr_val, &com_port->lcr);
Simon Glassc31ebfe2014-09-04 16:27:33 -0600218}
219
Simon Glass2b923982020-12-22 19:30:19 -0700220void ns16550_init(struct ns16550 *com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000221{
Simon Glass7ec24132024-09-29 19:49:48 -0600222#if defined(CONFIG_XPL_BUILD) && defined(CONFIG_OMAP34XX)
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000223 /*
Gregoire Gentil6b05d0a2014-11-10 11:04:10 -0800224 * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode
225 * before SPL starts only THRE bit is set. We have to empty the
226 * transmitter before initialization starts.
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000227 */
228 if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE))
229 == UART_LSR_THRE) {
Simon Glass79a9da32014-09-04 16:27:34 -0600230 if (baud_divisor != -1)
Simon Glass2b923982020-12-22 19:30:19 -0700231 ns16550_setbrg(com_port, baud_divisor);
Patrik Dahlström7e1bda92019-12-21 17:25:12 +0100232 else {
233 // Re-use old baud rate divisor to flush transmit reg.
234 const int dll = serial_in(&com_port->dll);
235 const int dlm = serial_in(&com_port->dlm);
236 const int divisor = dll | (dlm << 8);
Simon Glass2b923982020-12-22 19:30:19 -0700237 ns16550_setbrg(com_port, divisor);
Patrik Dahlström7e1bda92019-12-21 17:25:12 +0100238 }
Manfred Huberf9b8ae32013-03-29 02:52:36 +0000239 serial_out(0, &com_port->mdr1);
240 }
241#endif
242
Scott Wood6c6f0612012-09-18 18:19:05 -0500243 while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT))
244 ;
245
Tom Rini364d0022023-01-10 11:19:45 -0500246 serial_out(CFG_SYS_NS16550_IER, &com_port->ier);
Lokesh Vutla42cb4b82018-08-27 15:55:24 +0530247#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL)
Graeme Russ14f06e62010-04-24 00:05:46 +1000248 serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/
wdenk21136db2003-07-16 21:53:01 +0000249#endif
Ley Foon Tana1763392018-06-14 18:45:22 +0800250
Graeme Russ14f06e62010-04-24 00:05:46 +1000251 serial_out(UART_MCRVAL, &com_port->mcr);
Marek Vasutf523c9c2016-12-01 02:06:29 +0100252 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
Simon Goldschmidtba2d0aa2018-11-02 21:28:08 +0100253 /* initialize serial config to 8N1 before writing baudrate */
254 serial_out(UART_LCRVAL, &com_port->lcr);
Simon Glass79a9da32014-09-04 16:27:34 -0600255 if (baud_divisor != -1)
Simon Glass2b923982020-12-22 19:30:19 -0700256 ns16550_setbrg(com_port, baud_divisor);
Lokesh Vutla42cb4b82018-08-27 15:55:24 +0530257#if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \
258 defined(CONFIG_OMAP_SERIAL)
Simon Glassdd5497c2011-10-15 19:14:09 +0000259 /* /16 is proper to hit 115200 with 48MHz */
260 serial_out(0, &com_port->mdr1);
Tom Rinif28c4342017-05-12 22:33:16 -0400261#endif
Tom Rini84c0f692021-09-12 20:32:32 -0400262#if defined(CONFIG_ARCH_KEYSTONE)
Vitaly Andrianov7bcf4d62014-04-04 13:16:53 -0400263 serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC);
264#endif
wdenke85390d2002-04-01 14:29:03 +0000265}
266
Tom Rini10ac24f2022-11-16 13:10:26 -0500267#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS)
Simon Glass2b923982020-12-22 19:30:19 -0700268void ns16550_reinit(struct ns16550 *com_port, int baud_divisor)
wdenke85390d2002-04-01 14:29:03 +0000269{
Tom Rini364d0022023-01-10 11:19:45 -0500270 serial_out(CFG_SYS_NS16550_IER, &com_port->ier);
Simon Glass2b923982020-12-22 19:30:19 -0700271 ns16550_setbrg(com_port, 0);
Graeme Russ14f06e62010-04-24 00:05:46 +1000272 serial_out(UART_MCRVAL, &com_port->mcr);
Marek Vasutf523c9c2016-12-01 02:06:29 +0100273 serial_out(ns16550_getfcr(com_port), &com_port->fcr);
Simon Glass2b923982020-12-22 19:30:19 -0700274 ns16550_setbrg(com_port, baud_divisor);
wdenke85390d2002-04-01 14:29:03 +0000275}
Tom Rini10ac24f2022-11-16 13:10:26 -0500276#endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */
wdenke85390d2002-04-01 14:29:03 +0000277
Simon Glass2b923982020-12-22 19:30:19 -0700278void ns16550_putc(struct ns16550 *com_port, char c)
wdenke85390d2002-04-01 14:29:03 +0000279{
Simon Glassdd5497c2011-10-15 19:14:09 +0000280 while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0)
281 ;
Graeme Russ14f06e62010-04-24 00:05:46 +1000282 serial_out(c, &com_port->thr);
Stefan Roese57b99882010-10-12 09:39:45 +0200283
284 /*
Rasmus Villemoes76aaf692024-05-28 13:13:21 +0200285 * Call schedule() upon newline. This is done here in putc
Stefan Roese57b99882010-10-12 09:39:45 +0200286 * since the environment code uses a single puts() to print the complete
Rasmus Villemoes76aaf692024-05-28 13:13:21 +0200287 * environment upon "printenv". So we can't put this schedule call
Stefan Roese57b99882010-10-12 09:39:45 +0200288 * in puts().
289 */
290 if (c == '\n')
Stefan Roese80877fa2022-09-02 14:10:46 +0200291 schedule();
wdenke85390d2002-04-01 14:29:03 +0000292}
293
Tom Rini10ac24f2022-11-16 13:10:26 -0500294#if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS)
Simon Glass2b923982020-12-22 19:30:19 -0700295char ns16550_getc(struct ns16550 *com_port)
wdenke85390d2002-04-01 14:29:03 +0000296{
Tom Rini49b47322025-02-27 14:51:01 -0600297 while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0)
Stefan Roese80877fa2022-09-02 14:10:46 +0200298 schedule();
Tom Rini49b47322025-02-27 14:51:01 -0600299
Graeme Russ14f06e62010-04-24 00:05:46 +1000300 return serial_in(&com_port->rbr);
wdenke85390d2002-04-01 14:29:03 +0000301}
302
Simon Glass2b923982020-12-22 19:30:19 -0700303int ns16550_tstc(struct ns16550 *com_port)
wdenke85390d2002-04-01 14:29:03 +0000304{
Simon Glassdd5497c2011-10-15 19:14:09 +0000305 return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0;
wdenke85390d2002-04-01 14:29:03 +0000306}
307
Tom Rini10ac24f2022-11-16 13:10:26 -0500308#endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */
Simon Glass79a9da32014-09-04 16:27:34 -0600309
Simon Glass27afb522015-01-26 18:27:09 -0700310#ifdef CONFIG_DEBUG_UART_NS16550
311
312#include <debug_uart.h>
313
Simon Glass60517d72015-10-18 19:51:23 -0600314static inline void _debug_uart_init(void)
Simon Glass27afb522015-01-26 18:27:09 -0700315{
Pali Rohár53a85a72022-05-06 11:05:16 +0200316 struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE);
Simon Glass27afb522015-01-26 18:27:09 -0700317 int baud_divisor;
318
Pali Rohárb318d6e2022-06-23 14:13:56 +0200319 /* Wait until tx buffer is empty */
320 while (!(serial_din(&com_port->lsr) & UART_LSR_TEMT))
321 ;
322
Simon Glass27afb522015-01-26 18:27:09 -0700323 /*
324 * We copy the code from above because it is already horribly messy.
325 * Trying to refactor to nicely remove the duplication doesn't seem
326 * feasible. The better fix is to move all users of this driver to
327 * driver model.
328 */
Marek Vasut3b164a52016-05-25 02:13:16 +0200329 baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK,
330 CONFIG_BAUDRATE);
Tom Rini364d0022023-01-10 11:19:45 -0500331 serial_dout(&com_port->ier, CFG_SYS_NS16550_IER);
Lokesh Vutla771d69c2017-04-22 15:57:25 +0530332 serial_dout(&com_port->mcr, UART_MCRVAL);
333 serial_dout(&com_port->fcr, UART_FCR_DEFVAL);
334
335 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
336 serial_dout(&com_port->dll, baud_divisor & 0xff);
337 serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff);
338 serial_dout(&com_port->lcr, UART_LCRVAL);
339}
340
Simon Glass119e7ef2020-12-22 19:30:18 -0700341static inline int NS16550_read_baud_divisor(struct ns16550 *com_port)
Simon Goldschmidte03ad212019-01-09 20:35:31 +0100342{
343 int ret;
344
345 serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL);
346 ret = serial_din(&com_port->dll) & 0xff;
347 ret |= (serial_din(&com_port->dlm) & 0xff) << 8;
348 serial_dout(&com_port->lcr, UART_LCRVAL);
349
350 return ret;
351}
352
Lokesh Vutla771d69c2017-04-22 15:57:25 +0530353static inline void _debug_uart_putc(int ch)
354{
Pali Rohár53a85a72022-05-06 11:05:16 +0200355 struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE);
Lokesh Vutla771d69c2017-04-22 15:57:25 +0530356
Simon Goldschmidte03ad212019-01-09 20:35:31 +0100357 while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) {
358#ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED
359 if (!NS16550_read_baud_divisor(com_port))
360 return;
361#endif
362 }
Lokesh Vutla771d69c2017-04-22 15:57:25 +0530363 serial_dout(&com_port->thr, ch);
364}
365
366DEBUG_UART_FUNCS
367
368#endif
369
Simon Glassd945a492019-09-25 08:11:14 -0600370#if CONFIG_IS_ENABLED(DM_SERIAL)
Gokul Praveenc204afd2024-11-26 16:21:30 +0530371int ns16550_serial_putc(struct udevice *dev, const char ch)
Simon Glass79a9da32014-09-04 16:27:34 -0600372{
Simon Glass119e7ef2020-12-22 19:30:18 -0700373 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glass79a9da32014-09-04 16:27:34 -0600374
375 if (!(serial_in(&com_port->lsr) & UART_LSR_THRE))
376 return -EAGAIN;
377 serial_out(ch, &com_port->thr);
378
379 /*
Rasmus Villemoes76aaf692024-05-28 13:13:21 +0200380 * Call schedule() upon newline. This is done here in putc
Simon Glass79a9da32014-09-04 16:27:34 -0600381 * since the environment code uses a single puts() to print the complete
Rasmus Villemoes76aaf692024-05-28 13:13:21 +0200382 * environment upon "printenv". So we can't put this schedule call
Simon Glass79a9da32014-09-04 16:27:34 -0600383 * in puts().
384 */
385 if (ch == '\n')
Stefan Roese80877fa2022-09-02 14:10:46 +0200386 schedule();
Simon Glass79a9da32014-09-04 16:27:34 -0600387
388 return 0;
389}
390
Gokul Praveenc204afd2024-11-26 16:21:30 +0530391int ns16550_serial_pending(struct udevice *dev, bool input)
Simon Glass79a9da32014-09-04 16:27:34 -0600392{
Simon Glass119e7ef2020-12-22 19:30:18 -0700393 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glass79a9da32014-09-04 16:27:34 -0600394
395 if (input)
Mario Sixaed664a2018-01-15 11:09:49 +0100396 return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0;
Simon Glass79a9da32014-09-04 16:27:34 -0600397 else
Mario Sixaed664a2018-01-15 11:09:49 +0100398 return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1;
Simon Glass79a9da32014-09-04 16:27:34 -0600399}
400
Gokul Praveenc204afd2024-11-26 16:21:30 +0530401int ns16550_serial_getc(struct udevice *dev)
Simon Glass79a9da32014-09-04 16:27:34 -0600402{
Simon Glass119e7ef2020-12-22 19:30:18 -0700403 struct ns16550 *const com_port = dev_get_priv(dev);
Stefan Roese48b771c2017-08-16 17:37:15 +0200404
405 if (!(serial_in(&com_port->lsr) & UART_LSR_DR))
Simon Glass79a9da32014-09-04 16:27:34 -0600406 return -EAGAIN;
407
Stefan Roese48b771c2017-08-16 17:37:15 +0200408 return serial_in(&com_port->rbr);
Simon Glass79a9da32014-09-04 16:27:34 -0600409}
410
Gokul Praveenc204afd2024-11-26 16:21:30 +0530411int ns16550_serial_setbrg(struct udevice *dev, int baudrate)
Simon Glass79a9da32014-09-04 16:27:34 -0600412{
Simon Glass119e7ef2020-12-22 19:30:18 -0700413 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glassb75b15b2020-12-03 16:55:23 -0700414 struct ns16550_plat *plat = com_port->plat;
Simon Glass79a9da32014-09-04 16:27:34 -0600415 int clock_divisor;
416
417 clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate);
418
Simon Glass2b923982020-12-22 19:30:19 -0700419 ns16550_setbrg(com_port, clock_divisor);
Simon Glass79a9da32014-09-04 16:27:34 -0600420
Simon Goldschmidtba2d0aa2018-11-02 21:28:08 +0100421 return 0;
422}
423
Gokul Praveenc204afd2024-11-26 16:21:30 +0530424int ns16550_serial_setconfig(struct udevice *dev, uint serial_config)
Simon Goldschmidtba2d0aa2018-11-02 21:28:08 +0100425{
Simon Glass119e7ef2020-12-22 19:30:18 -0700426 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Goldschmidtba2d0aa2018-11-02 21:28:08 +0100427 int lcr_val = UART_LCR_WLS_8;
428 uint parity = SERIAL_GET_PARITY(serial_config);
429 uint bits = SERIAL_GET_BITS(serial_config);
430 uint stop = SERIAL_GET_STOP(serial_config);
431
432 /*
433 * only parity config is implemented, check if other serial settings
434 * are the default one.
435 */
436 if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP)
437 return -ENOTSUPP; /* not supported in driver*/
438
439 switch (parity) {
440 case SERIAL_PAR_NONE:
441 /* no bits to add */
442 break;
443 case SERIAL_PAR_ODD:
444 lcr_val |= UART_LCR_PEN;
445 break;
446 case SERIAL_PAR_EVEN:
447 lcr_val |= UART_LCR_PEN | UART_LCR_EPS;
448 break;
449 default:
450 return -ENOTSUPP; /* not supported in driver*/
451 }
452
453 serial_out(lcr_val, &com_port->lcr);
Simon Glass79a9da32014-09-04 16:27:34 -0600454 return 0;
455}
456
Gokul Praveenc204afd2024-11-26 16:21:30 +0530457int ns16550_serial_getinfo(struct udevice *dev, struct serial_device_info *info)
Andy Shevchenkod778fc42018-11-20 23:52:36 +0200458{
Simon Glass119e7ef2020-12-22 19:30:18 -0700459 struct ns16550 *const com_port = dev_get_priv(dev);
Simon Glassb75b15b2020-12-03 16:55:23 -0700460 struct ns16550_plat *plat = com_port->plat;
Andy Shevchenkod778fc42018-11-20 23:52:36 +0200461
Simon Glassdbf9a082023-09-26 08:14:56 -0600462 /* save code size */
Simon Glasscd628772025-01-10 17:00:05 -0700463 if (!not_xpl() && !CONFIG_IS_ENABLED(UPL_OUT))
Simon Glassdbf9a082023-09-26 08:14:56 -0600464 return -ENOSYS;
465
Andy Shevchenkod778fc42018-11-20 23:52:36 +0200466 info->type = SERIAL_CHIP_16550_COMPATIBLE;
467#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
468 info->addr_space = SERIAL_ADDRESS_SPACE_IO;
469#else
470 info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY;
471#endif
472 info->addr = plat->base;
Simon Glass4289c262023-09-26 08:14:58 -0600473 info->size = plat->size;
Andy Shevchenkod778fc42018-11-20 23:52:36 +0200474 info->reg_width = plat->reg_width;
475 info->reg_shift = plat->reg_shift;
476 info->reg_offset = plat->reg_offset;
Andy Shevchenkoee2c9222020-02-27 17:21:55 +0200477 info->clock = plat->clock;
478
Andy Shevchenkod778fc42018-11-20 23:52:36 +0200479 return 0;
480}
481
Simon Glass4289c262023-09-26 08:14:58 -0600482static int ns16550_serial_assign_base(struct ns16550_plat *plat,
483 fdt_addr_t base, fdt_size_t size)
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100484{
Bin Menge92e09d2020-04-03 18:35:32 -0700485 if (base == FDT_ADDR_T_NONE)
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100486 return -EINVAL;
487
488#ifdef CONFIG_SYS_NS16550_PORT_MAPPED
Bin Menge92e09d2020-04-03 18:35:32 -0700489 plat->base = base;
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100490#else
Bin Menge92e09d2020-04-03 18:35:32 -0700491 plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE);
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100492#endif
Simon Glass4289c262023-09-26 08:14:58 -0600493 plat->size = size;
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100494
495 return 0;
496}
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100497
Simon Glass79a9da32014-09-04 16:27:34 -0600498int ns16550_serial_probe(struct udevice *dev)
499{
Simon Glass95588622020-12-22 19:30:28 -0700500 struct ns16550_plat *plat = dev_get_plat(dev);
Simon Glass119e7ef2020-12-22 19:30:18 -0700501 struct ns16550 *const com_port = dev_get_priv(dev);
Ley Foon Tana1763392018-06-14 18:45:22 +0800502 struct reset_ctl_bulk reset_bulk;
Bin Menge92e09d2020-04-03 18:35:32 -0700503 fdt_addr_t addr;
Simon Glass4289c262023-09-26 08:14:58 -0600504 fdt_addr_t size;
Ley Foon Tana1763392018-06-14 18:45:22 +0800505 int ret;
506
Bin Menge92e09d2020-04-03 18:35:32 -0700507 /*
508 * If we are on PCI bus, either directly attached to a PCI root port,
Simon Glass71fa5b42020-12-03 16:55:18 -0700509 * or via a PCI bridge, assign plat->base before probing hardware.
Bin Menge92e09d2020-04-03 18:35:32 -0700510 */
511 if (device_is_on_pci_bus(dev)) {
Simon Glass4289c262023-09-26 08:14:58 -0600512 addr = devfdt_get_addr_pci(dev, &size);
513 ret = ns16550_serial_assign_base(plat, addr, size);
Bin Menge92e09d2020-04-03 18:35:32 -0700514 if (ret)
515 return ret;
516 }
Wolfgang Wallnerf89c7ec2020-03-02 14:41:14 +0100517
Ley Foon Tana1763392018-06-14 18:45:22 +0800518 ret = reset_get_bulk(dev, &reset_bulk);
519 if (!ret)
520 reset_deassert_bulk(&reset_bulk);
Simon Glass79a9da32014-09-04 16:27:34 -0600521
Simon Glassfa20e932020-12-03 16:55:20 -0700522 com_port->plat = dev_get_plat(dev);
Simon Glass2b923982020-12-22 19:30:19 -0700523 ns16550_init(com_port, -1);
Simon Glass79a9da32014-09-04 16:27:34 -0600524
525 return 0;
526}
527
Marek Vasut1a59eec2016-12-01 02:06:30 +0100528#if CONFIG_IS_ENABLED(OF_CONTROL)
529enum {
530 PORT_NS16550 = 0,
Marek Vasut92a744f2016-12-01 02:06:31 +0100531 PORT_JZ4780,
Marek Vasut1a59eec2016-12-01 02:06:30 +0100532};
533#endif
534
Simon Glass3580f6d2021-08-07 07:24:03 -0600535#if CONFIG_IS_ENABLED(OF_REAL)
Simon Glassaad29ae2020-12-03 16:55:21 -0700536int ns16550_serial_of_to_plat(struct udevice *dev)
Simon Glass79a9da32014-09-04 16:27:34 -0600537{
Simon Glass95588622020-12-22 19:30:28 -0700538 struct ns16550_plat *plat = dev_get_plat(dev);
Marek Vasut92a744f2016-12-01 02:06:31 +0100539 const u32 port_type = dev_get_driver_data(dev);
Simon Glass4289c262023-09-26 08:14:58 -0600540 fdt_size_t size = 0;
Bin Menge92e09d2020-04-03 18:35:32 -0700541 fdt_addr_t addr;
Masahiro Yamada09abe2b2016-09-26 20:45:27 +0900542 struct clk clk;
543 int err;
Simon Glass79a9da32014-09-04 16:27:34 -0600544
Simon Glassf218eeb2024-09-29 19:49:37 -0600545 addr = not_xpl() ? dev_read_addr_size(dev, &size) :
Simon Glass4289c262023-09-26 08:14:58 -0600546 dev_read_addr(dev);
547 err = ns16550_serial_assign_base(plat, addr, size);
Bin Menge92e09d2020-04-03 18:35:32 -0700548 if (err && !device_is_on_pci_bus(dev))
549 return err;
550
Philipp Tomsiche74958e2017-06-07 18:46:02 +0200551 plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0);
552 plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0);
Andy Shevchenko72fccfe2018-11-20 23:52:35 +0200553 plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1);
Paul Burton8aadc562016-09-08 07:47:29 +0100554
Paul Burton8aadc562016-09-08 07:47:29 +0100555 if (!plat->clock)
Jonas Karlmandba266f2024-08-04 15:09:52 +0000556 plat->clock = dev_read_u32_default(dev, "clock-frequency", 0);
557 if (!plat->clock) {
558 err = clk_get_by_index(dev, 0, &clk);
559 if (!err) {
560 err = clk_get_rate(&clk);
561 if (!IS_ERR_VALUE(err))
562 plat->clock = err;
563 } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) {
564 debug("ns16550 failed to get clock\n");
565 return err;
566 }
567 }
Bin Meng48ab3df2021-02-03 22:42:25 +0800568 if (!plat->clock)
Tom Rinidf6a2152022-11-16 13:10:28 -0500569 plat->clock = CFG_SYS_NS16550_CLK;
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800570 if (!plat->clock) {
571 debug("ns16550 clock not defined\n");
572 return -EINVAL;
573 }
Simon Glass79a9da32014-09-04 16:27:34 -0600574
Heiko Schocher06f108e2017-01-18 08:05:49 +0100575 plat->fcr = UART_FCR_DEFVAL;
Marek Vasut92a744f2016-12-01 02:06:31 +0100576 if (port_type == PORT_JZ4780)
577 plat->fcr |= UART_FCR_UME;
Marek Vasutf523c9c2016-12-01 02:06:29 +0100578
Simon Glass79a9da32014-09-04 16:27:34 -0600579 return 0;
580}
Simon Glass3bf04f32014-10-22 21:37:05 -0600581#endif
Simon Glass79a9da32014-09-04 16:27:34 -0600582
583const struct dm_serial_ops ns16550_serial_ops = {
584 .putc = ns16550_serial_putc,
585 .pending = ns16550_serial_pending,
586 .getc = ns16550_serial_getc,
587 .setbrg = ns16550_serial_setbrg,
Andy Shevchenkod778fc42018-11-20 23:52:36 +0200588 .setconfig = ns16550_serial_setconfig,
589 .getinfo = ns16550_serial_getinfo,
Simon Glass79a9da32014-09-04 16:27:34 -0600590};
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800591
Simon Glass3580f6d2021-08-07 07:24:03 -0600592#if CONFIG_IS_ENABLED(OF_REAL)
Thomas Choudad53672015-12-14 20:45:09 +0800593/*
594 * Please consider existing compatible strings before adding a new
595 * one to keep this table compact. Or you may add a generic "ns16550"
596 * compatible string to your dts.
597 */
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800598static const struct udevice_id ns16550_serial_ids[] = {
Marek Vasut1a59eec2016-12-01 02:06:30 +0100599 { .compatible = "ns16550", .data = PORT_NS16550 },
600 { .compatible = "ns16550a", .data = PORT_NS16550 },
Marek Vasut92a744f2016-12-01 02:06:31 +0100601 { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 },
Marek Vasut1a59eec2016-12-01 02:06:30 +0100602 { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 },
603 { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 },
Duje Mihanovićebba78e2025-01-24 16:47:48 +0100604 { .compatible = "intel,xscale-uart", .data = PORT_NS16550 },
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800605 {}
606};
Simon Glass3580f6d2021-08-07 07:24:03 -0600607#endif /* OF_REAL */
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800608
Simon Glass9ebf3482015-12-13 21:36:59 -0700609#if CONFIG_IS_ENABLED(SERIAL_PRESENT)
Alexandru Gagniucb1ab1892017-03-27 12:54:19 -0700610
611/* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */
612#if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL)
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800613U_BOOT_DRIVER(ns16550_serial) = {
614 .name = "ns16550_serial",
615 .id = UCLASS_SERIAL,
Simon Glass3580f6d2021-08-07 07:24:03 -0600616#if CONFIG_IS_ENABLED(OF_REAL)
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800617 .of_match = ns16550_serial_ids,
Simon Glassaad29ae2020-12-03 16:55:21 -0700618 .of_to_plat = ns16550_serial_of_to_plat,
Simon Glassb75b15b2020-12-03 16:55:23 -0700619 .plat_auto = sizeof(struct ns16550_plat),
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800620#endif
Simon Glass119e7ef2020-12-22 19:30:18 -0700621 .priv_auto = sizeof(struct ns16550),
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800622 .probe = ns16550_serial_probe,
623 .ops = &ns16550_serial_ops,
Bin Mengbdb33d82018-10-24 06:36:36 -0700624#if !CONFIG_IS_ENABLED(OF_CONTROL)
Simon Glass6ef533e2015-12-04 08:58:38 -0700625 .flags = DM_FLAG_PRE_RELOC,
Bin Mengbdb33d82018-10-24 06:36:36 -0700626#endif
Thomas Chou16b2e7e2015-11-19 21:48:05 +0800627};
Walter Lozano48e5b042020-06-25 01:10:06 -0300628
Simon Glassdf65db82020-12-28 20:34:57 -0700629DM_DRIVER_ALIAS(ns16550_serial, ti_da830_uart)
Simon Glass9ebf3482015-12-13 21:36:59 -0700630#endif
Alexandru Gagniucb1ab1892017-03-27 12:54:19 -0700631#endif /* SERIAL_PRESENT */
632
Simon Glass79a9da32014-09-04 16:27:34 -0600633#endif /* CONFIG_DM_SERIAL */