wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 1 | /* |
| 2 | * COM1 NS16550 support |
Stefan Roese | 88fbf93 | 2010-04-15 16:07:28 +0200 | [diff] [blame] | 3 | * originally from linux source (arch/powerpc/boot/ns16550.c) |
Jean-Christophe PLAGNIOL-VILLARD | 0383694 | 2008-10-16 15:01:15 +0200 | [diff] [blame] | 4 | * modified to use CONFIG_SYS_ISA_MEM and new defines |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Simon Glass | 85d6531 | 2019-12-28 10:44:58 -0700 | [diff] [blame] | 7 | #include <clock_legacy.h> |
Tom Rini | dec7ea0 | 2024-05-20 13:35:03 -0600 | [diff] [blame] | 8 | #include <config.h> |
Paul Burton | 8aadc56 | 2016-09-08 07:47:29 +0100 | [diff] [blame] | 9 | #include <clk.h> |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 10 | #include <dm.h> |
| 11 | #include <errno.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 12 | #include <log.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 13 | #include <ns16550.h> |
Ley Foon Tan | a176339 | 2018-06-14 18:45:22 +0800 | [diff] [blame] | 14 | #include <reset.h> |
Simon Glass | dbf9a08 | 2023-09-26 08:14:56 -0600 | [diff] [blame] | 15 | #include <spl.h> |
Ladislav Michl | cc29442 | 2010-02-01 23:34:25 +0100 | [diff] [blame] | 16 | #include <watchdog.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 17 | #include <asm/global_data.h> |
Simon Glass | d66c5f7 | 2020-02-03 07:36:15 -0700 | [diff] [blame] | 18 | #include <linux/err.h> |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 19 | #include <linux/types.h> |
| 20 | #include <asm/io.h> |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 21 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 22 | DECLARE_GLOBAL_DATA_PTR; |
| 23 | |
Detlev Zundel | 166fb54 | 2009-04-03 11:53:01 +0200 | [diff] [blame] | 24 | #define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ |
| 25 | #define UART_MCRVAL (UART_MCR_DTR | \ |
| 26 | UART_MCR_RTS) /* RTS/DTR */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 27 | |
Simon Glass | d945a49 | 2019-09-25 08:11:14 -0600 | [diff] [blame] | 28 | #if !CONFIG_IS_ENABLED(DM_SERIAL) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 29 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 30 | #define serial_out(x, y) outb(x, (ulong)y) |
| 31 | #define serial_in(y) inb((ulong)y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 32 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE > 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 33 | #define serial_out(x, y) out_be32(y, x) |
| 34 | #define serial_in(y) in_be32(y) |
Dave Aldridge | a51bebc | 2011-09-01 22:47:14 +0000 | [diff] [blame] | 35 | #elif defined(CONFIG_SYS_NS16550_MEM32) && (CONFIG_SYS_NS16550_REG_SIZE < 0) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 36 | #define serial_out(x, y) out_le32(y, x) |
| 37 | #define serial_in(y) in_le32(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 38 | #else |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 39 | #define serial_out(x, y) writeb(x, y) |
| 40 | #define serial_in(y) readb(y) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 41 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 42 | #endif /* !CONFIG_DM_SERIAL */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 43 | |
Tom Rini | 84c0f69 | 2021-09-12 20:32:32 -0400 | [diff] [blame] | 44 | #if defined(CONFIG_ARCH_KEYSTONE) |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 45 | #define UART_REG_VAL_PWREMU_MGMT_UART_DISABLE 0 |
| 46 | #define UART_REG_VAL_PWREMU_MGMT_UART_ENABLE ((1 << 14) | (1 << 13) | (1 << 0)) |
Karicheri, Muralidharan | cbc0888 | 2014-04-09 15:38:46 -0400 | [diff] [blame] | 47 | #undef UART_MCRVAL |
| 48 | #ifdef CONFIG_SERIAL_HW_FLOW_CONTROL |
| 49 | #define UART_MCRVAL (UART_MCR_RTS | UART_MCR_AFE) |
| 50 | #else |
| 51 | #define UART_MCRVAL (UART_MCR_RTS) |
| 52 | #endif |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 53 | #endif |
| 54 | |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 55 | #ifndef CFG_SYS_NS16550_IER |
| 56 | #define CFG_SYS_NS16550_IER 0x00 |
| 57 | #endif /* CFG_SYS_NS16550_IER */ |
Prafulla Wadaskar | 6621637 | 2010-10-27 21:58:31 +0530 | [diff] [blame] | 58 | |
Simon Glass | b31fb12 | 2015-02-27 22:06:26 -0700 | [diff] [blame] | 59 | static inline void serial_out_shift(void *addr, int shift, int value) |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 60 | { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 61 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 96e230b | 2014-10-10 07:49:13 -0600 | [diff] [blame] | 62 | outb(value, (ulong)addr); |
Bernhard Messerklinger | d8427e7 | 2018-02-15 09:02:26 +0100 | [diff] [blame] | 63 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 64 | out_le32(addr, value); |
| 65 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) |
| 66 | out_be32(addr, value); |
Simon Glass | 0b31ec7 | 2015-05-12 14:55:02 -0600 | [diff] [blame] | 67 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
| 68 | writel(value, addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 69 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 70 | writeb(value, addr + (1 << shift) - 1); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 71 | #else |
| 72 | writeb(value, addr); |
| 73 | #endif |
| 74 | } |
| 75 | |
Simon Glass | b31fb12 | 2015-02-27 22:06:26 -0700 | [diff] [blame] | 76 | static inline int serial_in_shift(void *addr, int shift) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 77 | { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 78 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Simon Glass | 96e230b | 2014-10-10 07:49:13 -0600 | [diff] [blame] | 79 | return inb((ulong)addr); |
Bernhard Messerklinger | d8427e7 | 2018-02-15 09:02:26 +0100 | [diff] [blame] | 80 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_LITTLE_ENDIAN) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 81 | return in_le32(addr); |
| 82 | #elif defined(CONFIG_SYS_NS16550_MEM32) && defined(CONFIG_SYS_BIG_ENDIAN) |
| 83 | return in_be32(addr); |
Simon Glass | 0b31ec7 | 2015-05-12 14:55:02 -0600 | [diff] [blame] | 84 | #elif defined(CONFIG_SYS_NS16550_MEM32) |
| 85 | return readl(addr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 86 | #elif defined(CONFIG_SYS_BIG_ENDIAN) |
Axel Lin | b5c372d | 2015-02-28 15:55:36 +0800 | [diff] [blame] | 87 | return readb(addr + (1 << shift) - 1); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 88 | #else |
| 89 | return readb(addr); |
| 90 | #endif |
| 91 | } |
| 92 | |
Simon Glass | d945a49 | 2019-09-25 08:11:14 -0600 | [diff] [blame] | 93 | #if CONFIG_IS_ENABLED(DM_SERIAL) |
Marek Vasut | 3e97cbb | 2016-05-25 02:13:03 +0200 | [diff] [blame] | 94 | |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 95 | #ifndef CFG_SYS_NS16550_CLK |
| 96 | #define CFG_SYS_NS16550_CLK 0 |
Marek Vasut | 3e97cbb | 2016-05-25 02:13:03 +0200 | [diff] [blame] | 97 | #endif |
| 98 | |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 99 | /* |
| 100 | * Use this #ifdef for now since many platforms don't define in(), out(), |
| 101 | * out_le32(), etc. but we don't have #defines to indicate this. |
| 102 | * |
| 103 | * TODO(sjg@chromium.org): Add CONFIG options to indicate what I/O is available |
| 104 | * on a platform |
| 105 | */ |
| 106 | #ifdef CONFIG_NS16550_DYNAMIC |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 107 | static void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr, |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 108 | int value) |
| 109 | { |
| 110 | if (plat->flags & NS16550_FLAG_IO) { |
| 111 | outb(value, addr); |
| 112 | } else if (plat->reg_width == 4) { |
| 113 | if (plat->flags & NS16550_FLAG_ENDIAN) { |
| 114 | if (plat->flags & NS16550_FLAG_BE) |
J. Neuschäfer | 2c0bbf1 | 2025-02-18 14:39:45 +0100 | [diff] [blame] | 115 | out_be32((u32 *)addr, value); |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 116 | else |
J. Neuschäfer | 2c0bbf1 | 2025-02-18 14:39:45 +0100 | [diff] [blame] | 117 | out_le32((u32 *)addr, value); |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 118 | } else { |
| 119 | writel(value, addr); |
| 120 | } |
| 121 | } else if (plat->flags & NS16550_FLAG_BE) { |
| 122 | writeb(value, addr + (1 << plat->reg_shift) - 1); |
| 123 | } else { |
| 124 | writeb(value, addr); |
| 125 | } |
| 126 | } |
| 127 | |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 128 | static int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr) |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 129 | { |
| 130 | if (plat->flags & NS16550_FLAG_IO) { |
| 131 | return inb(addr); |
| 132 | } else if (plat->reg_width == 4) { |
| 133 | if (plat->flags & NS16550_FLAG_ENDIAN) { |
| 134 | if (plat->flags & NS16550_FLAG_BE) |
J. Neuschäfer | 2c0bbf1 | 2025-02-18 14:39:45 +0100 | [diff] [blame] | 135 | return in_be32((u32 *)addr); |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 136 | else |
J. Neuschäfer | 2c0bbf1 | 2025-02-18 14:39:45 +0100 | [diff] [blame] | 137 | return in_le32((u32 *)addr); |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 138 | } else { |
| 139 | return readl(addr); |
| 140 | } |
| 141 | } else if (plat->flags & NS16550_FLAG_BE) { |
| 142 | return readb(addr + (1 << plat->reg_shift) - 1); |
| 143 | } else { |
| 144 | return readb(addr); |
| 145 | } |
| 146 | } |
| 147 | #else |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 148 | static inline void serial_out_dynamic(struct ns16550_plat *plat, u8 *addr, |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 149 | int value) |
| 150 | { |
| 151 | } |
| 152 | |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 153 | static inline int serial_in_dynamic(struct ns16550_plat *plat, u8 *addr) |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 154 | { |
| 155 | return 0; |
| 156 | } |
| 157 | |
| 158 | #endif /* CONFIG_NS16550_DYNAMIC */ |
| 159 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 160 | void ns16550_writeb(struct ns16550 *port, int offset, int value) |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 161 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 162 | struct ns16550_plat *plat = port->plat; |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 163 | unsigned char *addr; |
| 164 | |
| 165 | offset *= 1 << plat->reg_shift; |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 166 | addr = (unsigned char *)plat->base + offset + plat->reg_offset; |
Paul Burton | c8acc89 | 2016-05-17 07:43:26 +0100 | [diff] [blame] | 167 | |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 168 | if (IS_ENABLED(CONFIG_NS16550_DYNAMIC)) |
| 169 | serial_out_dynamic(plat, addr, value); |
| 170 | else |
| 171 | serial_out_shift(addr, plat->reg_shift, value); |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 172 | } |
| 173 | |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 174 | static int ns16550_readb(struct ns16550 *port, int offset) |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 175 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 176 | struct ns16550_plat *plat = port->plat; |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 177 | unsigned char *addr; |
| 178 | |
| 179 | offset *= 1 << plat->reg_shift; |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 180 | addr = (unsigned char *)plat->base + offset + plat->reg_offset; |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 181 | |
Simon Glass | f8b1a24 | 2019-12-19 17:58:18 -0700 | [diff] [blame] | 182 | if (IS_ENABLED(CONFIG_NS16550_DYNAMIC)) |
| 183 | return serial_in_dynamic(plat, addr); |
| 184 | else |
| 185 | return serial_in_shift(addr, plat->reg_shift); |
Simon Glass | 6aba4fd | 2015-01-26 18:27:08 -0700 | [diff] [blame] | 186 | } |
| 187 | |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 188 | static u32 ns16550_getfcr(struct ns16550 *port) |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 189 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 190 | struct ns16550_plat *plat = port->plat; |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 191 | |
| 192 | return plat->fcr; |
| 193 | } |
| 194 | |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 195 | #else |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 196 | static u32 ns16550_getfcr(struct ns16550 *port) |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 197 | { |
Heiko Schocher | 06f108e | 2017-01-18 08:05:49 +0100 | [diff] [blame] | 198 | return UART_FCR_DEFVAL; |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 199 | } |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 200 | #endif |
| 201 | |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 202 | int ns16550_calc_divisor(struct ns16550 *port, int clock, int baudrate) |
Simon Glass | e98e01e | 2014-09-04 16:27:32 -0600 | [diff] [blame] | 203 | { |
| 204 | const unsigned int mode_x_div = 16; |
| 205 | |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 206 | return DIV_ROUND_CLOSEST(clock, mode_x_div * baudrate); |
| 207 | } |
| 208 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 209 | void ns16550_setbrg(struct ns16550 *com_port, int baud_divisor) |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 210 | { |
Simon Goldschmidt | ba2d0aa | 2018-11-02 21:28:08 +0100 | [diff] [blame] | 211 | /* to keep serial format, read lcr before writing BKSE */ |
| 212 | int lcr_val = serial_in(&com_port->lcr) & ~UART_LCR_BKSE; |
| 213 | |
| 214 | serial_out(UART_LCR_BKSE | lcr_val, &com_port->lcr); |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 215 | serial_out(baud_divisor & 0xff, &com_port->dll); |
| 216 | serial_out((baud_divisor >> 8) & 0xff, &com_port->dlm); |
Simon Goldschmidt | ba2d0aa | 2018-11-02 21:28:08 +0100 | [diff] [blame] | 217 | serial_out(lcr_val, &com_port->lcr); |
Simon Glass | c31ebfe | 2014-09-04 16:27:33 -0600 | [diff] [blame] | 218 | } |
| 219 | |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 220 | void ns16550_init(struct ns16550 *com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 221 | { |
Simon Glass | 7ec2413 | 2024-09-29 19:49:48 -0600 | [diff] [blame] | 222 | #if defined(CONFIG_XPL_BUILD) && defined(CONFIG_OMAP34XX) |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 223 | /* |
Gregoire Gentil | 6b05d0a | 2014-11-10 11:04:10 -0800 | [diff] [blame] | 224 | * On some OMAP3/OMAP4 devices when UART3 is configured for boot mode |
| 225 | * before SPL starts only THRE bit is set. We have to empty the |
| 226 | * transmitter before initialization starts. |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 227 | */ |
| 228 | if ((serial_in(&com_port->lsr) & (UART_LSR_TEMT | UART_LSR_THRE)) |
| 229 | == UART_LSR_THRE) { |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 230 | if (baud_divisor != -1) |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 231 | ns16550_setbrg(com_port, baud_divisor); |
Patrik Dahlström | 7e1bda9 | 2019-12-21 17:25:12 +0100 | [diff] [blame] | 232 | else { |
| 233 | // Re-use old baud rate divisor to flush transmit reg. |
| 234 | const int dll = serial_in(&com_port->dll); |
| 235 | const int dlm = serial_in(&com_port->dlm); |
| 236 | const int divisor = dll | (dlm << 8); |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 237 | ns16550_setbrg(com_port, divisor); |
Patrik Dahlström | 7e1bda9 | 2019-12-21 17:25:12 +0100 | [diff] [blame] | 238 | } |
Manfred Huber | f9b8ae3 | 2013-03-29 02:52:36 +0000 | [diff] [blame] | 239 | serial_out(0, &com_port->mdr1); |
| 240 | } |
| 241 | #endif |
| 242 | |
Scott Wood | 6c6f061 | 2012-09-18 18:19:05 -0500 | [diff] [blame] | 243 | while (!(serial_in(&com_port->lsr) & UART_LSR_TEMT)) |
| 244 | ; |
| 245 | |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 246 | serial_out(CFG_SYS_NS16550_IER, &com_port->ier); |
Lokesh Vutla | 42cb4b8 | 2018-08-27 15:55:24 +0530 | [diff] [blame] | 247 | #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_OMAP_SERIAL) |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 248 | serial_out(0x7, &com_port->mdr1); /* mode select reset TL16C750*/ |
wdenk | 21136db | 2003-07-16 21:53:01 +0000 | [diff] [blame] | 249 | #endif |
Ley Foon Tan | a176339 | 2018-06-14 18:45:22 +0800 | [diff] [blame] | 250 | |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 251 | serial_out(UART_MCRVAL, &com_port->mcr); |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 252 | serial_out(ns16550_getfcr(com_port), &com_port->fcr); |
Simon Goldschmidt | ba2d0aa | 2018-11-02 21:28:08 +0100 | [diff] [blame] | 253 | /* initialize serial config to 8N1 before writing baudrate */ |
| 254 | serial_out(UART_LCRVAL, &com_port->lcr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 255 | if (baud_divisor != -1) |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 256 | ns16550_setbrg(com_port, baud_divisor); |
Lokesh Vutla | 42cb4b8 | 2018-08-27 15:55:24 +0530 | [diff] [blame] | 257 | #if defined(CONFIG_ARCH_OMAP2PLUS) || defined(CONFIG_SOC_DA8XX) || \ |
| 258 | defined(CONFIG_OMAP_SERIAL) |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 259 | /* /16 is proper to hit 115200 with 48MHz */ |
| 260 | serial_out(0, &com_port->mdr1); |
Tom Rini | f28c434 | 2017-05-12 22:33:16 -0400 | [diff] [blame] | 261 | #endif |
Tom Rini | 84c0f69 | 2021-09-12 20:32:32 -0400 | [diff] [blame] | 262 | #if defined(CONFIG_ARCH_KEYSTONE) |
Vitaly Andrianov | 7bcf4d6 | 2014-04-04 13:16:53 -0400 | [diff] [blame] | 263 | serial_out(UART_REG_VAL_PWREMU_MGMT_UART_ENABLE, &com_port->regC); |
| 264 | #endif |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 265 | } |
| 266 | |
Tom Rini | 10ac24f | 2022-11-16 13:10:26 -0500 | [diff] [blame] | 267 | #if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 268 | void ns16550_reinit(struct ns16550 *com_port, int baud_divisor) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 269 | { |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 270 | serial_out(CFG_SYS_NS16550_IER, &com_port->ier); |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 271 | ns16550_setbrg(com_port, 0); |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 272 | serial_out(UART_MCRVAL, &com_port->mcr); |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 273 | serial_out(ns16550_getfcr(com_port), &com_port->fcr); |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 274 | ns16550_setbrg(com_port, baud_divisor); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 275 | } |
Tom Rini | 10ac24f | 2022-11-16 13:10:26 -0500 | [diff] [blame] | 276 | #endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */ |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 277 | |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 278 | void ns16550_putc(struct ns16550 *com_port, char c) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 279 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 280 | while ((serial_in(&com_port->lsr) & UART_LSR_THRE) == 0) |
| 281 | ; |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 282 | serial_out(c, &com_port->thr); |
Stefan Roese | 57b9988 | 2010-10-12 09:39:45 +0200 | [diff] [blame] | 283 | |
| 284 | /* |
Rasmus Villemoes | 76aaf69 | 2024-05-28 13:13:21 +0200 | [diff] [blame] | 285 | * Call schedule() upon newline. This is done here in putc |
Stefan Roese | 57b9988 | 2010-10-12 09:39:45 +0200 | [diff] [blame] | 286 | * since the environment code uses a single puts() to print the complete |
Rasmus Villemoes | 76aaf69 | 2024-05-28 13:13:21 +0200 | [diff] [blame] | 287 | * environment upon "printenv". So we can't put this schedule call |
Stefan Roese | 57b9988 | 2010-10-12 09:39:45 +0200 | [diff] [blame] | 288 | * in puts(). |
| 289 | */ |
| 290 | if (c == '\n') |
Stefan Roese | 80877fa | 2022-09-02 14:10:46 +0200 | [diff] [blame] | 291 | schedule(); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 292 | } |
| 293 | |
Tom Rini | 10ac24f | 2022-11-16 13:10:26 -0500 | [diff] [blame] | 294 | #if !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 295 | char ns16550_getc(struct ns16550 *com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 296 | { |
Tom Rini | 49b4732 | 2025-02-27 14:51:01 -0600 | [diff] [blame] | 297 | while ((serial_in(&com_port->lsr) & UART_LSR_DR) == 0) |
Stefan Roese | 80877fa | 2022-09-02 14:10:46 +0200 | [diff] [blame] | 298 | schedule(); |
Tom Rini | 49b4732 | 2025-02-27 14:51:01 -0600 | [diff] [blame] | 299 | |
Graeme Russ | 14f06e6 | 2010-04-24 00:05:46 +1000 | [diff] [blame] | 300 | return serial_in(&com_port->rbr); |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 301 | } |
| 302 | |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 303 | int ns16550_tstc(struct ns16550 *com_port) |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 304 | { |
Simon Glass | dd5497c | 2011-10-15 19:14:09 +0000 | [diff] [blame] | 305 | return (serial_in(&com_port->lsr) & UART_LSR_DR) != 0; |
wdenk | e85390d | 2002-04-01 14:29:03 +0000 | [diff] [blame] | 306 | } |
| 307 | |
Tom Rini | 10ac24f | 2022-11-16 13:10:26 -0500 | [diff] [blame] | 308 | #endif /* !CONFIG_IS_ENABLED(NS16550_MIN_FUNCTIONS) */ |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 309 | |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 310 | #ifdef CONFIG_DEBUG_UART_NS16550 |
| 311 | |
| 312 | #include <debug_uart.h> |
| 313 | |
Simon Glass | 60517d7 | 2015-10-18 19:51:23 -0600 | [diff] [blame] | 314 | static inline void _debug_uart_init(void) |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 315 | { |
Pali Rohár | 53a85a7 | 2022-05-06 11:05:16 +0200 | [diff] [blame] | 316 | struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 317 | int baud_divisor; |
| 318 | |
Pali Rohár | b318d6e | 2022-06-23 14:13:56 +0200 | [diff] [blame] | 319 | /* Wait until tx buffer is empty */ |
| 320 | while (!(serial_din(&com_port->lsr) & UART_LSR_TEMT)) |
| 321 | ; |
| 322 | |
Simon Glass | 27afb52 | 2015-01-26 18:27:09 -0700 | [diff] [blame] | 323 | /* |
| 324 | * We copy the code from above because it is already horribly messy. |
| 325 | * Trying to refactor to nicely remove the duplication doesn't seem |
| 326 | * feasible. The better fix is to move all users of this driver to |
| 327 | * driver model. |
| 328 | */ |
Marek Vasut | 3b164a5 | 2016-05-25 02:13:16 +0200 | [diff] [blame] | 329 | baud_divisor = ns16550_calc_divisor(com_port, CONFIG_DEBUG_UART_CLOCK, |
| 330 | CONFIG_BAUDRATE); |
Tom Rini | 364d002 | 2023-01-10 11:19:45 -0500 | [diff] [blame] | 331 | serial_dout(&com_port->ier, CFG_SYS_NS16550_IER); |
Lokesh Vutla | 771d69c | 2017-04-22 15:57:25 +0530 | [diff] [blame] | 332 | serial_dout(&com_port->mcr, UART_MCRVAL); |
| 333 | serial_dout(&com_port->fcr, UART_FCR_DEFVAL); |
| 334 | |
| 335 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); |
| 336 | serial_dout(&com_port->dll, baud_divisor & 0xff); |
| 337 | serial_dout(&com_port->dlm, (baud_divisor >> 8) & 0xff); |
| 338 | serial_dout(&com_port->lcr, UART_LCRVAL); |
| 339 | } |
| 340 | |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 341 | static inline int NS16550_read_baud_divisor(struct ns16550 *com_port) |
Simon Goldschmidt | e03ad21 | 2019-01-09 20:35:31 +0100 | [diff] [blame] | 342 | { |
| 343 | int ret; |
| 344 | |
| 345 | serial_dout(&com_port->lcr, UART_LCR_BKSE | UART_LCRVAL); |
| 346 | ret = serial_din(&com_port->dll) & 0xff; |
| 347 | ret |= (serial_din(&com_port->dlm) & 0xff) << 8; |
| 348 | serial_dout(&com_port->lcr, UART_LCRVAL); |
| 349 | |
| 350 | return ret; |
| 351 | } |
| 352 | |
Lokesh Vutla | 771d69c | 2017-04-22 15:57:25 +0530 | [diff] [blame] | 353 | static inline void _debug_uart_putc(int ch) |
| 354 | { |
Pali Rohár | 53a85a7 | 2022-05-06 11:05:16 +0200 | [diff] [blame] | 355 | struct ns16550 *com_port = (struct ns16550 *)CONFIG_VAL(DEBUG_UART_BASE); |
Lokesh Vutla | 771d69c | 2017-04-22 15:57:25 +0530 | [diff] [blame] | 356 | |
Simon Goldschmidt | e03ad21 | 2019-01-09 20:35:31 +0100 | [diff] [blame] | 357 | while (!(serial_din(&com_port->lsr) & UART_LSR_THRE)) { |
| 358 | #ifdef CONFIG_DEBUG_UART_NS16550_CHECK_ENABLED |
| 359 | if (!NS16550_read_baud_divisor(com_port)) |
| 360 | return; |
| 361 | #endif |
| 362 | } |
Lokesh Vutla | 771d69c | 2017-04-22 15:57:25 +0530 | [diff] [blame] | 363 | serial_dout(&com_port->thr, ch); |
| 364 | } |
| 365 | |
| 366 | DEBUG_UART_FUNCS |
| 367 | |
| 368 | #endif |
| 369 | |
Simon Glass | d945a49 | 2019-09-25 08:11:14 -0600 | [diff] [blame] | 370 | #if CONFIG_IS_ENABLED(DM_SERIAL) |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 371 | int ns16550_serial_putc(struct udevice *dev, const char ch) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 372 | { |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 373 | struct ns16550 *const com_port = dev_get_priv(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 374 | |
| 375 | if (!(serial_in(&com_port->lsr) & UART_LSR_THRE)) |
| 376 | return -EAGAIN; |
| 377 | serial_out(ch, &com_port->thr); |
| 378 | |
| 379 | /* |
Rasmus Villemoes | 76aaf69 | 2024-05-28 13:13:21 +0200 | [diff] [blame] | 380 | * Call schedule() upon newline. This is done here in putc |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 381 | * since the environment code uses a single puts() to print the complete |
Rasmus Villemoes | 76aaf69 | 2024-05-28 13:13:21 +0200 | [diff] [blame] | 382 | * environment upon "printenv". So we can't put this schedule call |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 383 | * in puts(). |
| 384 | */ |
| 385 | if (ch == '\n') |
Stefan Roese | 80877fa | 2022-09-02 14:10:46 +0200 | [diff] [blame] | 386 | schedule(); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 387 | |
| 388 | return 0; |
| 389 | } |
| 390 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 391 | int ns16550_serial_pending(struct udevice *dev, bool input) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 392 | { |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 393 | struct ns16550 *const com_port = dev_get_priv(dev); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 394 | |
| 395 | if (input) |
Mario Six | aed664a | 2018-01-15 11:09:49 +0100 | [diff] [blame] | 396 | return (serial_in(&com_port->lsr) & UART_LSR_DR) ? 1 : 0; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 397 | else |
Mario Six | aed664a | 2018-01-15 11:09:49 +0100 | [diff] [blame] | 398 | return (serial_in(&com_port->lsr) & UART_LSR_THRE) ? 0 : 1; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 399 | } |
| 400 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 401 | int ns16550_serial_getc(struct udevice *dev) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 402 | { |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 403 | struct ns16550 *const com_port = dev_get_priv(dev); |
Stefan Roese | 48b771c | 2017-08-16 17:37:15 +0200 | [diff] [blame] | 404 | |
| 405 | if (!(serial_in(&com_port->lsr) & UART_LSR_DR)) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 406 | return -EAGAIN; |
| 407 | |
Stefan Roese | 48b771c | 2017-08-16 17:37:15 +0200 | [diff] [blame] | 408 | return serial_in(&com_port->rbr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 409 | } |
| 410 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 411 | int ns16550_serial_setbrg(struct udevice *dev, int baudrate) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 412 | { |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 413 | struct ns16550 *const com_port = dev_get_priv(dev); |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 414 | struct ns16550_plat *plat = com_port->plat; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 415 | int clock_divisor; |
| 416 | |
| 417 | clock_divisor = ns16550_calc_divisor(com_port, plat->clock, baudrate); |
| 418 | |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 419 | ns16550_setbrg(com_port, clock_divisor); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 420 | |
Simon Goldschmidt | ba2d0aa | 2018-11-02 21:28:08 +0100 | [diff] [blame] | 421 | return 0; |
| 422 | } |
| 423 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 424 | int ns16550_serial_setconfig(struct udevice *dev, uint serial_config) |
Simon Goldschmidt | ba2d0aa | 2018-11-02 21:28:08 +0100 | [diff] [blame] | 425 | { |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 426 | struct ns16550 *const com_port = dev_get_priv(dev); |
Simon Goldschmidt | ba2d0aa | 2018-11-02 21:28:08 +0100 | [diff] [blame] | 427 | int lcr_val = UART_LCR_WLS_8; |
| 428 | uint parity = SERIAL_GET_PARITY(serial_config); |
| 429 | uint bits = SERIAL_GET_BITS(serial_config); |
| 430 | uint stop = SERIAL_GET_STOP(serial_config); |
| 431 | |
| 432 | /* |
| 433 | * only parity config is implemented, check if other serial settings |
| 434 | * are the default one. |
| 435 | */ |
| 436 | if (bits != SERIAL_8_BITS || stop != SERIAL_ONE_STOP) |
| 437 | return -ENOTSUPP; /* not supported in driver*/ |
| 438 | |
| 439 | switch (parity) { |
| 440 | case SERIAL_PAR_NONE: |
| 441 | /* no bits to add */ |
| 442 | break; |
| 443 | case SERIAL_PAR_ODD: |
| 444 | lcr_val |= UART_LCR_PEN; |
| 445 | break; |
| 446 | case SERIAL_PAR_EVEN: |
| 447 | lcr_val |= UART_LCR_PEN | UART_LCR_EPS; |
| 448 | break; |
| 449 | default: |
| 450 | return -ENOTSUPP; /* not supported in driver*/ |
| 451 | } |
| 452 | |
| 453 | serial_out(lcr_val, &com_port->lcr); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 454 | return 0; |
| 455 | } |
| 456 | |
Gokul Praveen | c204afd | 2024-11-26 16:21:30 +0530 | [diff] [blame] | 457 | int ns16550_serial_getinfo(struct udevice *dev, struct serial_device_info *info) |
Andy Shevchenko | d778fc4 | 2018-11-20 23:52:36 +0200 | [diff] [blame] | 458 | { |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 459 | struct ns16550 *const com_port = dev_get_priv(dev); |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 460 | struct ns16550_plat *plat = com_port->plat; |
Andy Shevchenko | d778fc4 | 2018-11-20 23:52:36 +0200 | [diff] [blame] | 461 | |
Simon Glass | dbf9a08 | 2023-09-26 08:14:56 -0600 | [diff] [blame] | 462 | /* save code size */ |
Simon Glass | cd62877 | 2025-01-10 17:00:05 -0700 | [diff] [blame] | 463 | if (!not_xpl() && !CONFIG_IS_ENABLED(UPL_OUT)) |
Simon Glass | dbf9a08 | 2023-09-26 08:14:56 -0600 | [diff] [blame] | 464 | return -ENOSYS; |
| 465 | |
Andy Shevchenko | d778fc4 | 2018-11-20 23:52:36 +0200 | [diff] [blame] | 466 | info->type = SERIAL_CHIP_16550_COMPATIBLE; |
| 467 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
| 468 | info->addr_space = SERIAL_ADDRESS_SPACE_IO; |
| 469 | #else |
| 470 | info->addr_space = SERIAL_ADDRESS_SPACE_MEMORY; |
| 471 | #endif |
| 472 | info->addr = plat->base; |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 473 | info->size = plat->size; |
Andy Shevchenko | d778fc4 | 2018-11-20 23:52:36 +0200 | [diff] [blame] | 474 | info->reg_width = plat->reg_width; |
| 475 | info->reg_shift = plat->reg_shift; |
| 476 | info->reg_offset = plat->reg_offset; |
Andy Shevchenko | ee2c922 | 2020-02-27 17:21:55 +0200 | [diff] [blame] | 477 | info->clock = plat->clock; |
| 478 | |
Andy Shevchenko | d778fc4 | 2018-11-20 23:52:36 +0200 | [diff] [blame] | 479 | return 0; |
| 480 | } |
| 481 | |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 482 | static int ns16550_serial_assign_base(struct ns16550_plat *plat, |
| 483 | fdt_addr_t base, fdt_size_t size) |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 484 | { |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 485 | if (base == FDT_ADDR_T_NONE) |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 486 | return -EINVAL; |
| 487 | |
| 488 | #ifdef CONFIG_SYS_NS16550_PORT_MAPPED |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 489 | plat->base = base; |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 490 | #else |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 491 | plat->base = (unsigned long)map_physmem(base, 0, MAP_NOCACHE); |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 492 | #endif |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 493 | plat->size = size; |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 494 | |
| 495 | return 0; |
| 496 | } |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 497 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 498 | int ns16550_serial_probe(struct udevice *dev) |
| 499 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 500 | struct ns16550_plat *plat = dev_get_plat(dev); |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 501 | struct ns16550 *const com_port = dev_get_priv(dev); |
Ley Foon Tan | a176339 | 2018-06-14 18:45:22 +0800 | [diff] [blame] | 502 | struct reset_ctl_bulk reset_bulk; |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 503 | fdt_addr_t addr; |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 504 | fdt_addr_t size; |
Ley Foon Tan | a176339 | 2018-06-14 18:45:22 +0800 | [diff] [blame] | 505 | int ret; |
| 506 | |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 507 | /* |
| 508 | * If we are on PCI bus, either directly attached to a PCI root port, |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 509 | * or via a PCI bridge, assign plat->base before probing hardware. |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 510 | */ |
| 511 | if (device_is_on_pci_bus(dev)) { |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 512 | addr = devfdt_get_addr_pci(dev, &size); |
| 513 | ret = ns16550_serial_assign_base(plat, addr, size); |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 514 | if (ret) |
| 515 | return ret; |
| 516 | } |
Wolfgang Wallner | f89c7ec | 2020-03-02 14:41:14 +0100 | [diff] [blame] | 517 | |
Ley Foon Tan | a176339 | 2018-06-14 18:45:22 +0800 | [diff] [blame] | 518 | ret = reset_get_bulk(dev, &reset_bulk); |
| 519 | if (!ret) |
| 520 | reset_deassert_bulk(&reset_bulk); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 521 | |
Simon Glass | fa20e93 | 2020-12-03 16:55:20 -0700 | [diff] [blame] | 522 | com_port->plat = dev_get_plat(dev); |
Simon Glass | 2b92398 | 2020-12-22 19:30:19 -0700 | [diff] [blame] | 523 | ns16550_init(com_port, -1); |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 524 | |
| 525 | return 0; |
| 526 | } |
| 527 | |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 528 | #if CONFIG_IS_ENABLED(OF_CONTROL) |
| 529 | enum { |
| 530 | PORT_NS16550 = 0, |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 531 | PORT_JZ4780, |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 532 | }; |
| 533 | #endif |
| 534 | |
Simon Glass | 3580f6d | 2021-08-07 07:24:03 -0600 | [diff] [blame] | 535 | #if CONFIG_IS_ENABLED(OF_REAL) |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 536 | int ns16550_serial_of_to_plat(struct udevice *dev) |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 537 | { |
Simon Glass | 9558862 | 2020-12-22 19:30:28 -0700 | [diff] [blame] | 538 | struct ns16550_plat *plat = dev_get_plat(dev); |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 539 | const u32 port_type = dev_get_driver_data(dev); |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 540 | fdt_size_t size = 0; |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 541 | fdt_addr_t addr; |
Masahiro Yamada | 09abe2b | 2016-09-26 20:45:27 +0900 | [diff] [blame] | 542 | struct clk clk; |
| 543 | int err; |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 544 | |
Simon Glass | f218eeb | 2024-09-29 19:49:37 -0600 | [diff] [blame] | 545 | addr = not_xpl() ? dev_read_addr_size(dev, &size) : |
Simon Glass | 4289c26 | 2023-09-26 08:14:58 -0600 | [diff] [blame] | 546 | dev_read_addr(dev); |
| 547 | err = ns16550_serial_assign_base(plat, addr, size); |
Bin Meng | e92e09d | 2020-04-03 18:35:32 -0700 | [diff] [blame] | 548 | if (err && !device_is_on_pci_bus(dev)) |
| 549 | return err; |
| 550 | |
Philipp Tomsich | e74958e | 2017-06-07 18:46:02 +0200 | [diff] [blame] | 551 | plat->reg_offset = dev_read_u32_default(dev, "reg-offset", 0); |
| 552 | plat->reg_shift = dev_read_u32_default(dev, "reg-shift", 0); |
Andy Shevchenko | 72fccfe | 2018-11-20 23:52:35 +0200 | [diff] [blame] | 553 | plat->reg_width = dev_read_u32_default(dev, "reg-io-width", 1); |
Paul Burton | 8aadc56 | 2016-09-08 07:47:29 +0100 | [diff] [blame] | 554 | |
Paul Burton | 8aadc56 | 2016-09-08 07:47:29 +0100 | [diff] [blame] | 555 | if (!plat->clock) |
Jonas Karlman | dba266f | 2024-08-04 15:09:52 +0000 | [diff] [blame] | 556 | plat->clock = dev_read_u32_default(dev, "clock-frequency", 0); |
| 557 | if (!plat->clock) { |
| 558 | err = clk_get_by_index(dev, 0, &clk); |
| 559 | if (!err) { |
| 560 | err = clk_get_rate(&clk); |
| 561 | if (!IS_ERR_VALUE(err)) |
| 562 | plat->clock = err; |
| 563 | } else if (err != -ENOENT && err != -ENODEV && err != -ENOSYS) { |
| 564 | debug("ns16550 failed to get clock\n"); |
| 565 | return err; |
| 566 | } |
| 567 | } |
Bin Meng | 48ab3df | 2021-02-03 22:42:25 +0800 | [diff] [blame] | 568 | if (!plat->clock) |
Tom Rini | df6a215 | 2022-11-16 13:10:28 -0500 | [diff] [blame] | 569 | plat->clock = CFG_SYS_NS16550_CLK; |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 570 | if (!plat->clock) { |
| 571 | debug("ns16550 clock not defined\n"); |
| 572 | return -EINVAL; |
| 573 | } |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 574 | |
Heiko Schocher | 06f108e | 2017-01-18 08:05:49 +0100 | [diff] [blame] | 575 | plat->fcr = UART_FCR_DEFVAL; |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 576 | if (port_type == PORT_JZ4780) |
| 577 | plat->fcr |= UART_FCR_UME; |
Marek Vasut | f523c9c | 2016-12-01 02:06:29 +0100 | [diff] [blame] | 578 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 579 | return 0; |
| 580 | } |
Simon Glass | 3bf04f3 | 2014-10-22 21:37:05 -0600 | [diff] [blame] | 581 | #endif |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 582 | |
| 583 | const struct dm_serial_ops ns16550_serial_ops = { |
| 584 | .putc = ns16550_serial_putc, |
| 585 | .pending = ns16550_serial_pending, |
| 586 | .getc = ns16550_serial_getc, |
| 587 | .setbrg = ns16550_serial_setbrg, |
Andy Shevchenko | d778fc4 | 2018-11-20 23:52:36 +0200 | [diff] [blame] | 588 | .setconfig = ns16550_serial_setconfig, |
| 589 | .getinfo = ns16550_serial_getinfo, |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 590 | }; |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 591 | |
Simon Glass | 3580f6d | 2021-08-07 07:24:03 -0600 | [diff] [blame] | 592 | #if CONFIG_IS_ENABLED(OF_REAL) |
Thomas Chou | dad5367 | 2015-12-14 20:45:09 +0800 | [diff] [blame] | 593 | /* |
| 594 | * Please consider existing compatible strings before adding a new |
| 595 | * one to keep this table compact. Or you may add a generic "ns16550" |
| 596 | * compatible string to your dts. |
| 597 | */ |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 598 | static const struct udevice_id ns16550_serial_ids[] = { |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 599 | { .compatible = "ns16550", .data = PORT_NS16550 }, |
| 600 | { .compatible = "ns16550a", .data = PORT_NS16550 }, |
Marek Vasut | 92a744f | 2016-12-01 02:06:31 +0100 | [diff] [blame] | 601 | { .compatible = "ingenic,jz4780-uart", .data = PORT_JZ4780 }, |
Marek Vasut | 1a59eec | 2016-12-01 02:06:30 +0100 | [diff] [blame] | 602 | { .compatible = "nvidia,tegra20-uart", .data = PORT_NS16550 }, |
| 603 | { .compatible = "snps,dw-apb-uart", .data = PORT_NS16550 }, |
Duje Mihanović | ebba78e | 2025-01-24 16:47:48 +0100 | [diff] [blame] | 604 | { .compatible = "intel,xscale-uart", .data = PORT_NS16550 }, |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 605 | {} |
| 606 | }; |
Simon Glass | 3580f6d | 2021-08-07 07:24:03 -0600 | [diff] [blame] | 607 | #endif /* OF_REAL */ |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 608 | |
Simon Glass | 9ebf348 | 2015-12-13 21:36:59 -0700 | [diff] [blame] | 609 | #if CONFIG_IS_ENABLED(SERIAL_PRESENT) |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 610 | |
| 611 | /* TODO(sjg@chromium.org): Integrate this into a macro like CONFIG_IS_ENABLED */ |
| 612 | #if !defined(CONFIG_TPL_BUILD) || defined(CONFIG_TPL_DM_SERIAL) |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 613 | U_BOOT_DRIVER(ns16550_serial) = { |
| 614 | .name = "ns16550_serial", |
| 615 | .id = UCLASS_SERIAL, |
Simon Glass | 3580f6d | 2021-08-07 07:24:03 -0600 | [diff] [blame] | 616 | #if CONFIG_IS_ENABLED(OF_REAL) |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 617 | .of_match = ns16550_serial_ids, |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 618 | .of_to_plat = ns16550_serial_of_to_plat, |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 619 | .plat_auto = sizeof(struct ns16550_plat), |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 620 | #endif |
Simon Glass | 119e7ef | 2020-12-22 19:30:18 -0700 | [diff] [blame] | 621 | .priv_auto = sizeof(struct ns16550), |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 622 | .probe = ns16550_serial_probe, |
| 623 | .ops = &ns16550_serial_ops, |
Bin Meng | bdb33d8 | 2018-10-24 06:36:36 -0700 | [diff] [blame] | 624 | #if !CONFIG_IS_ENABLED(OF_CONTROL) |
Simon Glass | 6ef533e | 2015-12-04 08:58:38 -0700 | [diff] [blame] | 625 | .flags = DM_FLAG_PRE_RELOC, |
Bin Meng | bdb33d8 | 2018-10-24 06:36:36 -0700 | [diff] [blame] | 626 | #endif |
Thomas Chou | 16b2e7e | 2015-11-19 21:48:05 +0800 | [diff] [blame] | 627 | }; |
Walter Lozano | 48e5b04 | 2020-06-25 01:10:06 -0300 | [diff] [blame] | 628 | |
Simon Glass | df65db8 | 2020-12-28 20:34:57 -0700 | [diff] [blame] | 629 | DM_DRIVER_ALIAS(ns16550_serial, ti_da830_uart) |
Simon Glass | 9ebf348 | 2015-12-13 21:36:59 -0700 | [diff] [blame] | 630 | #endif |
Alexandru Gagniuc | b1ab189 | 2017-03-27 12:54:19 -0700 | [diff] [blame] | 631 | #endif /* SERIAL_PRESENT */ |
| 632 | |
Simon Glass | 79a9da3 | 2014-09-04 16:27:34 -0600 | [diff] [blame] | 633 | #endif /* CONFIG_DM_SERIAL */ |