Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (c) 2014 Google, Inc |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 4 | */ |
| 5 | |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 6 | #define LOG_CATEGORY UCLASS_SPI |
| 7 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 8 | #include <common.h> |
| 9 | #include <dm.h> |
| 10 | #include <errno.h> |
Simon Glass | 0f2af88 | 2020-05-10 11:40:05 -0600 | [diff] [blame] | 11 | #include <log.h> |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 12 | #include <malloc.h> |
| 13 | #include <spi.h> |
T Karthik Reddy | 626a734 | 2021-03-17 12:31:30 +0100 | [diff] [blame] | 14 | #include <spi-mem.h> |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 15 | #include <dm/device_compat.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 16 | #include <asm/global_data.h> |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 17 | #include <dm/device-internal.h> |
| 18 | #include <dm/uclass-internal.h> |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 19 | #include <dm/lists.h> |
| 20 | #include <dm/util.h> |
| 21 | |
| 22 | DECLARE_GLOBAL_DATA_PTR; |
| 23 | |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 24 | #define SPI_DEFAULT_SPEED_HZ 100000 |
| 25 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 26 | static int spi_set_speed_mode(struct udevice *bus, int speed, int mode) |
| 27 | { |
| 28 | struct dm_spi_ops *ops; |
| 29 | int ret; |
| 30 | |
| 31 | ops = spi_get_ops(bus); |
| 32 | if (ops->set_speed) |
| 33 | ret = ops->set_speed(bus, speed); |
| 34 | else |
| 35 | ret = -EINVAL; |
| 36 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 37 | dev_err(bus, "Cannot set speed (err=%d)\n", ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 38 | return ret; |
| 39 | } |
| 40 | |
| 41 | if (ops->set_mode) |
| 42 | ret = ops->set_mode(bus, mode); |
| 43 | else |
| 44 | ret = -EINVAL; |
| 45 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 46 | dev_err(bus, "Cannot set mode (err=%d)\n", ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 47 | return ret; |
| 48 | } |
| 49 | |
| 50 | return 0; |
| 51 | } |
| 52 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 53 | int dm_spi_claim_bus(struct udevice *dev) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 54 | { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 55 | struct udevice *bus = dev->parent; |
| 56 | struct dm_spi_ops *ops = spi_get_ops(bus); |
Simon Glass | de0977b | 2015-03-05 12:25:20 -0700 | [diff] [blame] | 57 | struct dm_spi_bus *spi = dev_get_uclass_priv(bus); |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 58 | struct spi_slave *slave = dev_get_parent_priv(dev); |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 59 | uint speed, mode; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 60 | |
| 61 | speed = slave->max_hz; |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 62 | mode = slave->mode; |
| 63 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 64 | if (spi->max_hz) { |
| 65 | if (speed) |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 66 | speed = min(speed, spi->max_hz); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 67 | else |
| 68 | speed = spi->max_hz; |
| 69 | } |
| 70 | if (!speed) |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 71 | speed = SPI_DEFAULT_SPEED_HZ; |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 72 | |
| 73 | if (speed != spi->speed || mode != spi->mode) { |
Mario Six | 2d844dd | 2018-01-15 11:08:41 +0100 | [diff] [blame] | 74 | int ret = spi_set_speed_mode(bus, speed, slave->mode); |
| 75 | |
Simon Glass | b46cb63 | 2015-02-17 15:29:35 -0700 | [diff] [blame] | 76 | if (ret) |
Simon Glass | 00d9990 | 2018-10-01 12:22:24 -0600 | [diff] [blame] | 77 | return log_ret(ret); |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 78 | |
| 79 | spi->speed = speed; |
| 80 | spi->mode = mode; |
Simon Glass | b46cb63 | 2015-02-17 15:29:35 -0700 | [diff] [blame] | 81 | } |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 82 | |
Simon Glass | 00d9990 | 2018-10-01 12:22:24 -0600 | [diff] [blame] | 83 | return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 84 | } |
| 85 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 86 | void dm_spi_release_bus(struct udevice *dev) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 87 | { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 88 | struct udevice *bus = dev->parent; |
| 89 | struct dm_spi_ops *ops = spi_get_ops(bus); |
| 90 | |
| 91 | if (ops->release_bus) |
Simon Glass | 5c74fba | 2015-04-19 09:05:40 -0600 | [diff] [blame] | 92 | ops->release_bus(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 93 | } |
| 94 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 95 | int dm_spi_xfer(struct udevice *dev, unsigned int bitlen, |
| 96 | const void *dout, void *din, unsigned long flags) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 97 | { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 98 | struct udevice *bus = dev->parent; |
Simon Glass | 2d2e860 | 2019-12-06 21:42:35 -0700 | [diff] [blame] | 99 | struct dm_spi_ops *ops = spi_get_ops(bus); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 100 | |
| 101 | if (bus->uclass->uc_drv->id != UCLASS_SPI) |
| 102 | return -EOPNOTSUPP; |
Simon Glass | 2d2e860 | 2019-12-06 21:42:35 -0700 | [diff] [blame] | 103 | if (!ops->xfer) |
| 104 | return -ENOSYS; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 105 | |
Simon Glass | 2d2e860 | 2019-12-06 21:42:35 -0700 | [diff] [blame] | 106 | return ops->xfer(dev, bitlen, dout, din, flags); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 107 | } |
| 108 | |
Simon Glass | 37ad0fe | 2019-10-20 21:31:47 -0600 | [diff] [blame] | 109 | int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep, |
| 110 | uint *offsetp) |
| 111 | { |
| 112 | struct udevice *bus = dev->parent; |
| 113 | struct dm_spi_ops *ops = spi_get_ops(bus); |
| 114 | |
| 115 | if (bus->uclass->uc_drv->id != UCLASS_SPI) |
| 116 | return -EOPNOTSUPP; |
| 117 | if (!ops->get_mmap) |
| 118 | return -ENOSYS; |
| 119 | |
| 120 | return ops->get_mmap(dev, map_basep, map_sizep, offsetp); |
| 121 | } |
| 122 | |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 123 | int spi_claim_bus(struct spi_slave *slave) |
| 124 | { |
Simon Glass | 00d9990 | 2018-10-01 12:22:24 -0600 | [diff] [blame] | 125 | return log_ret(dm_spi_claim_bus(slave->dev)); |
Peng Fan | fdd88a3 | 2016-05-03 10:02:22 +0800 | [diff] [blame] | 126 | } |
| 127 | |
| 128 | void spi_release_bus(struct spi_slave *slave) |
| 129 | { |
| 130 | dm_spi_release_bus(slave->dev); |
| 131 | } |
| 132 | |
| 133 | int spi_xfer(struct spi_slave *slave, unsigned int bitlen, |
| 134 | const void *dout, void *din, unsigned long flags) |
| 135 | { |
| 136 | return dm_spi_xfer(slave->dev, bitlen, dout, din, flags); |
| 137 | } |
| 138 | |
Jagan Teki | 7cc71fd | 2019-07-22 17:22:56 +0530 | [diff] [blame] | 139 | int spi_write_then_read(struct spi_slave *slave, const u8 *opcode, |
| 140 | size_t n_opcode, const u8 *txbuf, u8 *rxbuf, |
| 141 | size_t n_buf) |
| 142 | { |
| 143 | unsigned long flags = SPI_XFER_BEGIN; |
| 144 | int ret; |
| 145 | |
| 146 | if (n_buf == 0) |
| 147 | flags |= SPI_XFER_END; |
| 148 | |
| 149 | ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags); |
| 150 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 151 | dev_dbg(slave->dev, |
| 152 | "spi: failed to send command (%zu bytes): %d\n", |
| 153 | n_opcode, ret); |
Jagan Teki | 7cc71fd | 2019-07-22 17:22:56 +0530 | [diff] [blame] | 154 | } else if (n_buf != 0) { |
| 155 | ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END); |
| 156 | if (ret) |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 157 | dev_dbg(slave->dev, |
| 158 | "spi: failed to transfer %zu bytes of data: %d\n", |
| 159 | n_buf, ret); |
Jagan Teki | 7cc71fd | 2019-07-22 17:22:56 +0530 | [diff] [blame] | 160 | } |
| 161 | |
| 162 | return ret; |
| 163 | } |
| 164 | |
Simon Glass | 9288265 | 2021-08-07 07:24:04 -0600 | [diff] [blame] | 165 | #if CONFIG_IS_ENABLED(OF_REAL) |
Simon Glass | d941aaf | 2015-06-23 15:39:05 -0600 | [diff] [blame] | 166 | static int spi_child_post_bind(struct udevice *dev) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 167 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 168 | struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 169 | |
Simon Glass | f1d50f7 | 2020-12-19 10:40:13 -0700 | [diff] [blame] | 170 | if (!dev_has_ofnode(dev)) |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 171 | return 0; |
| 172 | |
Simon Glass | aad29ae | 2020-12-03 16:55:21 -0700 | [diff] [blame] | 173 | return spi_slave_of_to_plat(dev, plat); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 174 | } |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 175 | #endif |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 176 | |
Simon Glass | d941aaf | 2015-06-23 15:39:05 -0600 | [diff] [blame] | 177 | static int spi_post_probe(struct udevice *bus) |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 178 | { |
Simon Glass | 6d70ba0 | 2021-08-07 07:24:06 -0600 | [diff] [blame] | 179 | if (CONFIG_IS_ENABLED(OF_REAL)) { |
| 180 | struct dm_spi_bus *spi = dev_get_uclass_priv(bus); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 181 | |
Simon Glass | 6d70ba0 | 2021-08-07 07:24:06 -0600 | [diff] [blame] | 182 | spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0); |
| 183 | } |
Michal Simek | 28d7e4e | 2015-10-27 13:36:42 +0100 | [diff] [blame] | 184 | #if defined(CONFIG_NEEDS_MANUAL_RELOC) |
| 185 | struct dm_spi_ops *ops = spi_get_ops(bus); |
Ashok Reddy Soma | 1d89d8c | 2019-09-17 00:11:02 -0600 | [diff] [blame] | 186 | static int reloc_done; |
Michal Simek | 28d7e4e | 2015-10-27 13:36:42 +0100 | [diff] [blame] | 187 | |
Ashok Reddy Soma | 1d89d8c | 2019-09-17 00:11:02 -0600 | [diff] [blame] | 188 | if (!reloc_done) { |
| 189 | if (ops->claim_bus) |
| 190 | ops->claim_bus += gd->reloc_off; |
| 191 | if (ops->release_bus) |
| 192 | ops->release_bus += gd->reloc_off; |
| 193 | if (ops->set_wordlen) |
| 194 | ops->set_wordlen += gd->reloc_off; |
| 195 | if (ops->xfer) |
| 196 | ops->xfer += gd->reloc_off; |
| 197 | if (ops->set_speed) |
| 198 | ops->set_speed += gd->reloc_off; |
| 199 | if (ops->set_mode) |
| 200 | ops->set_mode += gd->reloc_off; |
| 201 | if (ops->cs_info) |
| 202 | ops->cs_info += gd->reloc_off; |
T Karthik Reddy | 626a734 | 2021-03-17 12:31:30 +0100 | [diff] [blame] | 203 | if (ops->mem_ops) { |
| 204 | struct spi_controller_mem_ops *mem_ops = |
| 205 | (struct spi_controller_mem_ops *)ops->mem_ops; |
| 206 | if (mem_ops->adjust_op_size) |
| 207 | mem_ops->adjust_op_size += gd->reloc_off; |
| 208 | if (mem_ops->supports_op) |
| 209 | mem_ops->supports_op += gd->reloc_off; |
| 210 | if (mem_ops->exec_op) |
| 211 | mem_ops->exec_op += gd->reloc_off; |
| 212 | } |
Ashok Reddy Soma | 1d89d8c | 2019-09-17 00:11:02 -0600 | [diff] [blame] | 213 | reloc_done++; |
| 214 | } |
Michal Simek | 28d7e4e | 2015-10-27 13:36:42 +0100 | [diff] [blame] | 215 | #endif |
| 216 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 217 | return 0; |
| 218 | } |
| 219 | |
Simon Glass | d941aaf | 2015-06-23 15:39:05 -0600 | [diff] [blame] | 220 | static int spi_child_pre_probe(struct udevice *dev) |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 221 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 222 | struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev); |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 223 | struct spi_slave *slave = dev_get_parent_priv(dev); |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 224 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 225 | /* |
| 226 | * This is needed because we pass struct spi_slave around the place |
| 227 | * instead slave->dev (a struct udevice). So we have to have some |
| 228 | * way to access the slave udevice given struct spi_slave. Once we |
| 229 | * change the SPI API to use udevice instead of spi_slave, we can |
| 230 | * drop this. |
| 231 | */ |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 232 | slave->dev = dev; |
| 233 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 234 | slave->max_hz = plat->max_hz; |
| 235 | slave->mode = plat->mode; |
Christophe Ricard | fb0c53e | 2016-01-17 11:56:48 +0100 | [diff] [blame] | 236 | slave->wordlen = SPI_DEFAULT_WORDLEN; |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 237 | |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 238 | return 0; |
| 239 | } |
| 240 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 241 | int spi_chip_select(struct udevice *dev) |
| 242 | { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 243 | struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 244 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 245 | return plat ? plat->cs : -ENOENT; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 246 | } |
| 247 | |
Simon Glass | 5ef36f2 | 2014-11-11 10:46:22 -0700 | [diff] [blame] | 248 | int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 249 | { |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 250 | struct dm_spi_ops *ops; |
| 251 | struct spi_cs_info info; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 252 | struct udevice *dev; |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 253 | int ret; |
| 254 | |
| 255 | /* |
| 256 | * Ask the driver. For the moment we don't have CS info. |
| 257 | * When we do we could provide the driver with a helper function |
| 258 | * to figure out what chip selects are valid, or just handle the |
| 259 | * request. |
| 260 | */ |
| 261 | ops = spi_get_ops(bus); |
| 262 | if (ops->cs_info) { |
| 263 | ret = ops->cs_info(bus, cs, &info); |
| 264 | } else { |
| 265 | /* |
| 266 | * We could assume there is at least one valid chip select. |
| 267 | * The driver didn't care enough to tell us. |
| 268 | */ |
| 269 | ret = 0; |
| 270 | } |
| 271 | |
| 272 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 273 | dev_err(bus, "Invalid cs %d (err=%d)\n", cs, ret); |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 274 | return ret; |
| 275 | } |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 276 | |
| 277 | for (device_find_first_child(bus, &dev); dev; |
| 278 | device_find_next_child(&dev)) { |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 279 | struct dm_spi_slave_plat *plat; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 280 | |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 281 | plat = dev_get_parent_plat(dev); |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 282 | dev_dbg(bus, "%s: plat=%p, cs=%d\n", __func__, plat, plat->cs); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 283 | if (plat->cs == cs) { |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 284 | *devp = dev; |
| 285 | return 0; |
| 286 | } |
| 287 | } |
| 288 | |
| 289 | return -ENODEV; |
| 290 | } |
| 291 | |
| 292 | int spi_cs_is_valid(unsigned int busnum, unsigned int cs) |
| 293 | { |
| 294 | struct spi_cs_info info; |
| 295 | struct udevice *bus; |
| 296 | int ret; |
| 297 | |
Simon Glass | 07e1338 | 2020-12-16 21:20:29 -0700 | [diff] [blame] | 298 | ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 299 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 300 | log_debug("%s: No bus %d\n", __func__, busnum); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 301 | return ret; |
| 302 | } |
| 303 | |
| 304 | return spi_cs_info(bus, cs, &info); |
| 305 | } |
| 306 | |
| 307 | int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info) |
| 308 | { |
| 309 | struct spi_cs_info local_info; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 310 | int ret; |
| 311 | |
| 312 | if (!info) |
| 313 | info = &local_info; |
| 314 | |
| 315 | /* If there is a device attached, return it */ |
| 316 | info->dev = NULL; |
| 317 | ret = spi_find_chip_select(bus, cs, &info->dev); |
Bin Meng | 9741e73 | 2019-09-09 06:00:02 -0700 | [diff] [blame] | 318 | return ret == -ENODEV ? 0 : ret; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 319 | } |
| 320 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 321 | int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp, |
| 322 | struct udevice **devp) |
| 323 | { |
| 324 | struct udevice *bus, *dev; |
| 325 | int ret; |
| 326 | |
Simon Glass | 07e1338 | 2020-12-16 21:20:29 -0700 | [diff] [blame] | 327 | ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 328 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 329 | log_debug("%s: No bus %d\n", __func__, busnum); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 330 | return ret; |
| 331 | } |
| 332 | ret = spi_find_chip_select(bus, cs, &dev); |
| 333 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 334 | dev_dbg(bus, "%s: No cs %d\n", __func__, cs); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 335 | return ret; |
| 336 | } |
| 337 | *busp = bus; |
| 338 | *devp = dev; |
| 339 | |
| 340 | return ret; |
| 341 | } |
| 342 | |
| 343 | int spi_get_bus_and_cs(int busnum, int cs, int speed, int mode, |
| 344 | const char *drv_name, const char *dev_name, |
| 345 | struct udevice **busp, struct spi_slave **devp) |
| 346 | { |
| 347 | struct udevice *bus, *dev; |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 348 | struct dm_spi_slave_plat *plat; |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 349 | struct dm_spi_bus *bus_data; |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 350 | struct spi_slave *slave; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 351 | bool created = false; |
| 352 | int ret; |
| 353 | |
Thomas Fitzsimmons | 59c90f3 | 2019-09-06 07:51:19 -0400 | [diff] [blame] | 354 | #if CONFIG_IS_ENABLED(OF_PLATDATA) |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 355 | ret = uclass_first_device_err(UCLASS_SPI, &bus); |
| 356 | #else |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 357 | ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus); |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 358 | #endif |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 359 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 360 | log_err("Invalid bus %d (err=%d)\n", busnum, ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 361 | return ret; |
| 362 | } |
| 363 | ret = spi_find_chip_select(bus, cs, &dev); |
| 364 | |
| 365 | /* |
| 366 | * If there is no such device, create one automatically. This means |
| 367 | * that we don't need a device tree node or platform data for the |
| 368 | * SPI flash chip - we will bind to the correct driver. |
| 369 | */ |
| 370 | if (ret == -ENODEV && drv_name) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 371 | dev_dbg(bus, "%s: Binding new device '%s', busnum=%d, cs=%d, driver=%s\n", |
| 372 | __func__, dev_name, busnum, cs, drv_name); |
Simon Glass | d8a21f6 | 2014-11-11 10:46:23 -0700 | [diff] [blame] | 373 | ret = device_bind_driver(bus, drv_name, dev_name, &dev); |
Simon Glass | f0307e1 | 2016-11-13 14:22:05 -0700 | [diff] [blame] | 374 | if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 375 | dev_dbg(bus, "%s: Unable to bind driver (ret=%d)\n", |
| 376 | __func__, ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 377 | return ret; |
Simon Glass | f0307e1 | 2016-11-13 14:22:05 -0700 | [diff] [blame] | 378 | } |
Simon Glass | 71fa5b4 | 2020-12-03 16:55:18 -0700 | [diff] [blame] | 379 | plat = dev_get_parent_plat(dev); |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 380 | plat->cs = cs; |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 381 | if (speed) { |
| 382 | plat->max_hz = speed; |
| 383 | } else { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 384 | dev_warn(bus, |
| 385 | "Warning: SPI speed fallback to %u kHz\n", |
| 386 | SPI_DEFAULT_SPEED_HZ / 1000); |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 387 | plat->max_hz = SPI_DEFAULT_SPEED_HZ; |
| 388 | } |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 389 | plat->mode = mode; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 390 | created = true; |
| 391 | } else if (ret) { |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 392 | dev_err(bus, "Invalid chip select %d:%d (err=%d)\n", busnum, cs, ret); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 393 | return ret; |
Marek Vasut | 170013f | 2021-06-10 14:00:00 +0200 | [diff] [blame] | 394 | } else if (dev) { |
| 395 | plat = dev_get_parent_plat(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 396 | } |
| 397 | |
| 398 | if (!device_active(dev)) { |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 399 | struct spi_slave *slave; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 400 | |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 401 | ret = device_probe(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 402 | if (ret) |
| 403 | goto err; |
Simon Glass | de44acf | 2015-09-28 23:32:01 -0600 | [diff] [blame] | 404 | slave = dev_get_parent_priv(dev); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 405 | slave->dev = dev; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 406 | } |
| 407 | |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 408 | slave = dev_get_parent_priv(dev); |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 409 | bus_data = dev_get_uclass_priv(bus); |
Patrick Delaunay | fa19c65 | 2019-02-27 15:36:44 +0100 | [diff] [blame] | 410 | |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 411 | /* |
| 412 | * In case the operation speed is not yet established by |
| 413 | * dm_spi_claim_bus() ensure the bus is configured properly. |
| 414 | */ |
Ovidiu Panait | 40dcee1 | 2020-12-14 19:06:50 +0200 | [diff] [blame] | 415 | if (!bus_data->speed) { |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 416 | ret = spi_claim_bus(slave); |
| 417 | if (ret) |
| 418 | goto err; |
Vignesh R | ae56979 | 2016-07-06 10:04:28 +0530 | [diff] [blame] | 419 | } |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 420 | |
Marek Vasut | 170013f | 2021-06-10 14:00:00 +0200 | [diff] [blame] | 421 | /* In case bus frequency or mode changed, update it. */ |
| 422 | if ((speed && bus_data->speed && bus_data->speed != speed) || |
| 423 | (plat && plat->mode != mode)) { |
| 424 | ret = spi_set_speed_mode(bus, speed, mode); |
| 425 | if (ret) |
| 426 | goto err_speed_mode; |
| 427 | } |
| 428 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 429 | *busp = bus; |
Marcin Wojtas | 70d8f98 | 2019-11-21 05:38:47 +0100 | [diff] [blame] | 430 | *devp = slave; |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 431 | log_debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 432 | |
| 433 | return 0; |
| 434 | |
Marek Vasut | 170013f | 2021-06-10 14:00:00 +0200 | [diff] [blame] | 435 | err_speed_mode: |
| 436 | spi_release_bus(slave); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 437 | err: |
Patrick Delaunay | 1d83e03 | 2020-10-15 17:18:17 +0200 | [diff] [blame] | 438 | log_debug("%s: Error path, created=%d, device '%s'\n", __func__, |
| 439 | created, dev->name); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 440 | if (created) { |
Stefan Roese | 80b5bc9 | 2017-03-20 12:51:48 +0100 | [diff] [blame] | 441 | device_remove(dev, DM_REMOVE_NORMAL); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 442 | device_unbind(dev); |
| 443 | } |
| 444 | |
| 445 | return ret; |
| 446 | } |
| 447 | |
| 448 | /* Compatibility function - to be removed */ |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 449 | struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs, |
| 450 | unsigned int speed, unsigned int mode) |
| 451 | { |
| 452 | struct spi_slave *slave; |
| 453 | struct udevice *dev; |
| 454 | int ret; |
| 455 | |
| 456 | ret = spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev, |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 457 | &slave); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 458 | if (ret) |
| 459 | return NULL; |
| 460 | |
| 461 | return slave; |
| 462 | } |
| 463 | |
| 464 | void spi_free_slave(struct spi_slave *slave) |
| 465 | { |
Stefan Roese | 80b5bc9 | 2017-03-20 12:51:48 +0100 | [diff] [blame] | 466 | device_remove(slave->dev, DM_REMOVE_NORMAL); |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 467 | } |
| 468 | |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 469 | int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 470 | { |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 471 | int mode = 0; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 472 | int value; |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 473 | |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 474 | plat->cs = dev_read_u32_default(dev, "reg", -1); |
Simon Goldschmidt | a942e1a | 2018-10-30 21:09:48 +0100 | [diff] [blame] | 475 | plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency", |
| 476 | SPI_DEFAULT_SPEED_HZ); |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 477 | if (dev_read_bool(dev, "spi-cpol")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 478 | mode |= SPI_CPOL; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 479 | if (dev_read_bool(dev, "spi-cpha")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 480 | mode |= SPI_CPHA; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 481 | if (dev_read_bool(dev, "spi-cs-high")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 482 | mode |= SPI_CS_HIGH; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 483 | if (dev_read_bool(dev, "spi-3wire")) |
Jagan Teki | d3868fd | 2015-12-03 22:19:05 +0530 | [diff] [blame] | 484 | mode |= SPI_3WIRE; |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 485 | if (dev_read_bool(dev, "spi-half-duplex")) |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 486 | mode |= SPI_PREAMBLE; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 487 | |
| 488 | /* Device DUAL/QUAD mode */ |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 489 | value = dev_read_u32_default(dev, "spi-tx-bus-width", 1); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 490 | switch (value) { |
| 491 | case 1: |
| 492 | break; |
| 493 | case 2: |
| 494 | mode |= SPI_TX_DUAL; |
| 495 | break; |
| 496 | case 4: |
| 497 | mode |= SPI_TX_QUAD; |
| 498 | break; |
Vignesh Raghavendra | c063ee3 | 2019-12-05 15:46:05 +0530 | [diff] [blame] | 499 | case 8: |
| 500 | mode |= SPI_TX_OCTAL; |
| 501 | break; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 502 | default: |
Simon Glass | 6f5bed0 | 2016-11-29 20:00:13 -0700 | [diff] [blame] | 503 | warn_non_spl("spi-tx-bus-width %d not supported\n", value); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 504 | break; |
| 505 | } |
| 506 | |
Simon Glass | 4b28058 | 2017-05-18 20:09:54 -0600 | [diff] [blame] | 507 | value = dev_read_u32_default(dev, "spi-rx-bus-width", 1); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 508 | switch (value) { |
| 509 | case 1: |
| 510 | break; |
| 511 | case 2: |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 512 | mode |= SPI_RX_DUAL; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 513 | break; |
| 514 | case 4: |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 515 | mode |= SPI_RX_QUAD; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 516 | break; |
Vignesh Raghavendra | c063ee3 | 2019-12-05 15:46:05 +0530 | [diff] [blame] | 517 | case 8: |
| 518 | mode |= SPI_RX_OCTAL; |
| 519 | break; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 520 | default: |
Simon Glass | 6f5bed0 | 2016-11-29 20:00:13 -0700 | [diff] [blame] | 521 | warn_non_spl("spi-rx-bus-width %d not supported\n", value); |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 522 | break; |
| 523 | } |
| 524 | |
Jagan Teki | 96536b1 | 2016-08-08 17:12:12 +0530 | [diff] [blame] | 525 | plat->mode = mode; |
Mugunthan V N | 4b0f40c | 2015-12-23 20:39:37 +0530 | [diff] [blame] | 526 | |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 527 | return 0; |
| 528 | } |
| 529 | |
| 530 | UCLASS_DRIVER(spi) = { |
| 531 | .id = UCLASS_SPI, |
| 532 | .name = "spi", |
Simon Glass | 0ccb097 | 2015-01-25 08:27:05 -0700 | [diff] [blame] | 533 | .flags = DM_UC_FLAG_SEQ_ALIAS, |
Simon Glass | 3580f6d | 2021-08-07 07:24:03 -0600 | [diff] [blame] | 534 | #if CONFIG_IS_ENABLED(OF_REAL) |
Simon Glass | 1823034 | 2016-07-05 17:10:10 -0600 | [diff] [blame] | 535 | .post_bind = dm_scan_fdt_dev, |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 536 | #endif |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 537 | .post_probe = spi_post_probe, |
Simon Glass | 82c2f50 | 2015-01-25 08:27:11 -0700 | [diff] [blame] | 538 | .child_pre_probe = spi_child_pre_probe, |
Simon Glass | 8a2b47f | 2020-12-03 16:55:17 -0700 | [diff] [blame] | 539 | .per_device_auto = sizeof(struct dm_spi_bus), |
| 540 | .per_child_auto = sizeof(struct spi_slave), |
Simon Glass | b75b15b | 2020-12-03 16:55:23 -0700 | [diff] [blame] | 541 | .per_child_plat_auto = sizeof(struct dm_spi_slave_plat), |
Simon Glass | 9288265 | 2021-08-07 07:24:04 -0600 | [diff] [blame] | 542 | #if CONFIG_IS_ENABLED(OF_REAL) |
Simon Glass | 5d2ee05 | 2015-01-25 08:27:12 -0700 | [diff] [blame] | 543 | .child_post_bind = spi_child_post_bind, |
Simon Glass | 3fb3339 | 2016-11-13 14:22:01 -0700 | [diff] [blame] | 544 | #endif |
Simon Glass | dd82d44 | 2014-10-13 23:41:52 -0600 | [diff] [blame] | 545 | }; |
| 546 | |
| 547 | UCLASS_DRIVER(spi_generic) = { |
| 548 | .id = UCLASS_SPI_GENERIC, |
| 549 | .name = "spi_generic", |
| 550 | }; |
| 551 | |
| 552 | U_BOOT_DRIVER(spi_generic_drv) = { |
| 553 | .name = "spi_generic_drv", |
| 554 | .id = UCLASS_SPI_GENERIC, |
| 555 | }; |